Embedded thin film capacitors-theoretical limits

The large physical size of capacitors and/or excessive values of associated lead inductance are two major limitations in the development of novel packaging modules, with high packaging density, high performance and reliability along with low system cost. Embedded capacitor technology in thin film form offers a promising solution to these limitations. A design space with capacitance density and breakdown voltage as performance properties, with material dielectric constant and film thickness as parameters has been explored, focusing on tantalum pentoxide (Ta/sub 2/O/sub 5/) as the dielectric material. An inherent tradeoff is established between breakdown voltage and capacitance density for thin film capacitors. The validity of the proposed design space is illustrated with thin films of Ta/sub 2/O/sub 5/, showing deviation from the "best can achieve" breakdown voltage for films thinner than 0.4 /spl mu/m and films thicker than 1 /spl mu/m.     

High quality Al/sub 2/O/sub 3/ IPD with NH/sub 3/ surface nitridation

In this letter, the effect of surface NH/sub 3/ nitridation on the electrical properties and reliability characteristics of aluminum oxide (Al/sub 2/O/sub 3/) interpoly capacitors is studied. With NH/sub 3/ surface nitridation, the formation of an additional layer with lower dielectric constant during post-annealing process can be significantly suppressed, compared to that without nitridation treatment. Furthermore, the presence of a thin Si-N layer can make post-deposition annealing more effective in eliminating traps existing in the as-deposited films. As a result, a smoother interface and smaller electron trapping rate can contribute to the drastically reduced leakage current, enhanced breakdown field and charge to breakdown (Q/sub bd/) of Al/sub 2/O/sub 3/ interpoly capacitors with surface NH/sub 3/ nitridation.     

High-Performance barium titanate capacitors with double layer structure

High-performance barium titanate (B_aTiO₃) capacitors with excellent electrical and dielectric properties have been made by a two step deposition scheme using reactive rf magnetron sputtering. A novel double layer structure has been developed to reduce the pinholes and improve the electrical properties, such as higher dielectric constant, lower dissipation factor, higher breakdown fields and low leakage currents. Films deposited on a cooled substrate are amorphous whereas those deposited on a heated substrate are poly crystalline. Both polycrystalline and amorphous natures are verified by x-ray diffraction and scanning electron microscopy. Amorphous films have a low leakage current, a high breakdown voltage up to 2.5 x 10⁶ V/cm, and a dielectric constant less than 20. Polycrystalline films yield a high dielectric constant of 330. However, these films also have large leakage currents. The capacitors with the two layer structures,i.e. amorphous layer on top of polycrystal layer, have been shown to be much superior to those prepared by either polycrystal or amorphous layer alone for practical applications. The dielectric constant and breakdown voltage of capacitors with a double layer are found to be as high as 220 and 1.2 x 10⁶ V/cm, respectively. The leakage current is reduced to the same order as the amorphous films alone.     

Thermo-Sensitive Ba0.64Sr0.36TiO3 Thin Film Capacitors for Dielectric Type Uncooled Infrared Sensors

Ba_0.64Sr_0.36TiO₃ (BST) thin films are prepared on Pt/Ti/SiO₂/Si₃N₄/SiO₂/Si substrates by a sol-gel method. Thermo-sensitive BST thin film capacitors with a Metal-Ferroelectrics-Metal (M-F(BST)-M) structure are fabricated as the active elements of dielectric type uncooled infrared sensors. XRD are employed to analyze the crystallographic structures of the films. AFM observations reveal a smooth and dense surface of the films with an average grain size of about 35 nm. Rapid temperature annealing (RTA) process is a very efficient way to improve crystallization quality. The preferable annealing temperature is 800°C for 1 min. The butterfly shaped C-V curves of the capacitors indicate the films have a ferroelectric nature. The dielectric constant and dielectric loss of the films at 100 kHz are 450 and 0.038, respectively. At 25°C, where the thermo-sensitive capacitors work, the temperature coefficient of dielectric constant (TCD) is about 5.9 %/°C. These results indicate that the capacitors with sol-gel derived BST thin films are promising to develop dielectric type uncooled infrared sensors.     

Low-Temperature Materials and Thin Film Transistors for Flexible Electronics

This paper addresses the low-temperature deposition processes and electronic properties of silicon based thin film semiconductors and dielectrics to enable the fabrication of mechanically flexible electronic devices on plastic substrates. Device quality amorphous hydrogenated silicon (a-Si:H), nanocrystalline silicon (nc-Si), and amorphous silicon nitride (a-SiN/sub x/) films and thin film transistors (TFTs) were made using existing industrial plasma deposition equipment at the process temperatures as low as 75/spl deg/C and 120/spl deg/C. The a-Si:H TFTs fabricated at 120/spl deg/C demonstrate performance similar to their high-temperature counterparts, including the field effect mobility (/spl mu//sub FE/) of 0.8 cm/sup 2/V/sup -1/s/sup -1/, the threshold voltage (V/sub T/) of 4.5 V, and the subthreshold slope of 0.5 V/dec, and can be used in active matrix (AM) displays including organic light emitting diode (OLED) displays. The a-Si:H TFTs fabricated at 75/spl deg/C exhibit /spl mu//sub FE/ of 0.6 cm/sup 2/V/sup -1/s/sup -1/, and V/sub T/ of 4 V. It is shown that further improvement in TFT performance can be achieved by using n/sup +/ nc-Si contact layers and plasma treatments of the interface between the gate dielectric and the channel layer. The results demonstrate that with appropriate process optimization, the large area thin film Si technology suits well the fabrication of electronic devices on low-cost plastic substrates.     

Ultrathin aluminum oxide gate dielectric on N-type 4H-SiC prepared by low thermal budget nitric acid oxidation

MOS capacitors with an ultrathin aluminum oxide (Al/sub 2/O/sub 3/) gate dielectric were fabricated on n-type 4H-SiC. Al/sub 2/O/sub 3/ was prepared by room-temperature nitric acid (HNO/sub 3/) oxidation of ultrathin Al film followed by furnace annealing. The effective dielectric constant of k/spl sim/9.4 and equivalent oxide thickness of 26 /spl Aring/ are produced, and the interfacial layer and carbon clusters are not observed in this paper. The electrical responses of MOS capacitor under heating and illumination are used to identify the conduction mechanisms. For the positively biased case, the conduction mechanism is shown to be dominated by Schottky emission with an effective barrier height of 1.12/spl plusmn/0.13 eV. For the negatively biased case, the gate current is shown to be due to the generation-recombination process in depletion region and limited by the minority carrier generation rate. The feasibility of integrating alternative gate dielectric on SiC by a low thermal budget process is demonstrated.     

Deposition of uniform Zr-Sn-Ti-O films by on-axis reactivesputtering

We describe the deposition of amorphous Zr-Sn-Ti-O (aZTT) dielectric thin films using conventional on-axis reactive sputtering. Thin films of composition Zr_0.2Sn_0.2Ti_0.6 O₂ have excellent dielectric properties: 40-50-nm thick films with a dielectric constant of 50-70 were obtained, depending on the processing conditions, yielding a specific capacitance of 9-17 fF/μm². Breakdown fields were measured to be 3-5 MV/cm, yielding a figure of merit εε₀E_br=15-30 μC/cm², up to eightfold higher than conventional deposited SiO₂. Leakage currents, measured at 1.0 MV/cm, were in the range 10^-9-10^-7 A/cm². This material appears well-suited for use in Si-IC device technology, for example as storage capacitors in DRAM     

Room-Temperature Deposited Titanium Silicate Thin Films for MIM Capacitor Applications

High-k titanium silicate (i.e., TiSiO₄) thin films of various thicknesses (in the 4.5- to 160-nm range) were successfully deposited by means of a sputter deposition process at room-temperature and integrated into metal-insulator-metal (MIM) capacitors. It is shown that the TiSiO₄-based capacitors can exhibit a capacitance density as high as 30 fF/mum² while maintaining low dielectric dispersion and losses. An excellent voltage linearity was also obtained ( alpha~600 ppm/V² at 8.2 fF/mum²) together with a high dielectric constant of 16.5 and low leakage current of about 10 nA/cm² at 1 MV/cm. Our results thus show that TiSiO₄ films constitute a very promising approach for the achievement of high performance MIM capacitors     

Atomic layer deposition of high-/spl kappa/ dielectric for germanium MOS applications - substrate

In this letter, we present the use of atomic layer deposition (ALD) for high-/spl kappa/ gate dielectric formation in Ge MOS devices. Different Ge surface cleaning methods prior to high-/spl kappa/ ALD have been evaluated together with the effects on inserting a Ge oxynitride (GeO/sub x/N/sub y/) interlayer between the high-/spl kappa/ layer and the Ge substrate. By incorporating a thin GeO/sub x/N/sub y/ interlayer, we have demonstrated excellent MOS capacitors with very small capacitance-voltage hysteresis and low gate leakage. Physical characterization has also been done to further investigate the quality of the oxynitride interlayer.     

Uniqueness in activation energy and charge-to-breakdown of highly asymmetrical DRAM Al/sub 2/O/sub 3/ cell capacitors

Al/sub 2/O/sub 3/ cell capacitors for dynamic random access memory (DRAM) applications were tested using constant voltage, time-dependent dielectric breakdown (TDDB) tests. The capacitors had area-enhancing, hemispherical grain (HSG) polysilicon as bottom electrodes (BEs). These electrodes acted as points of high electric field, and eased charge injection into the Al/sub 2/O/sub 3/. As a result, the capacitors had highly asymmetric current-voltage (I-V) characteristics. Time-to-fails (TTFs) were polarity-dependent, and, thus, much worse for HSG injection. However, activation energy (E/sub a/) and charge-to-breakdown (QBD) obtained from conducting stress under opposite polarities were a unique function of the electric field only. The results point to a common, polarity-independent mechanism responsible for final breakdown, and the possibility that only the kinetics of degradation is electrode controlled. Good correlation with the thermochemical E model suggests that the breakdown mechanism in Al/sub 2/O/sub 3/ might be similar to SiO/sub 2/.     

HfO/sub 2/ MIS capacitor with copper gate electrode

Metal-insulator-semiconductor capacitors were fabricated using atomic vapor deposition HfO/sub 2/ dielectric with sputtered copper (Cu) and aluminum (Al) gate electrodes. The counterparts with SiO/sub 2/ dielectric were also fabricated for comparison. Bias-temperature stress and charge-to-breakdown (Q/sub BD/) test were conducted to examine the stability and reliability of these capacitors. In contrast with the high Cu drift rate in an SiO/sub 2/ dielectric, Cu in contact with HfO/sub 2/ seems to be very stable. The HfO/sub 2/ capacitors with a Cu-gate also depict higher capacitance without showing any reliability degradation, compared to the Al-gate counterparts. These results indicate that HfO/sub 2/ with its considerably high density of 9.68 g/cm/sup 3/ is acting as a good barrier to Cu diffusion, and it thus appears feasible to integrate Cu metal with the post-gate-dielectric ultralarge-scale integration manufacturing processes.     

Preparation of (Pb0.88La0.12)TiO3 thin films for dynamic random access memory by low pressure-metalorganic chemical vapor deposition

La-modified lead titanate (PLT) thin films were prepared by hot-wall type low pressure-metalorganic chemical vapor deposition method. Pb(dpm)₂, La(dpm)₃, and titanium tetraisopropoxide were used as source materials. The films were deposited at 500°C under the low pressure of 1000 mTorr and then annealed at 650°C for 10 min in oxygen ambient. Sputter-deposited platinum electrodes and 180 nm thick PLT thin films were employed to form MIM capacitors with the best combination of high charge storage density (26.7 μC/cm² at 3V) and low leakage current density (1.5 × 10^-7 A/cm² at 3V). The measured dielectric constant and dielectric loss were 1000∼1200 and 0.06∼0.07 at zero bias and 100 kHz, respectively.     

Electrical properties of Ta/sub 2/O/sub 5/ gate dielectric on strained-Si

High dielectric constant (high-k) thin Ta/sub 2/O/sub 5/ films have been deposited on tensilely strained silicon (strained-Si) layers using a microwave plasma enhanced chemical vapour deposition technique at a low temperature. The deposited Ta/sub 2/O/sub 5/ films show good electrical properties as gate dielectrics and are suitable for microelectronic applications. The feasibility of integration of strained-Si and high-k dielectrics has been demonstrated.     

MIM capacitors using atomic-layer-deposited high-/spl kappa/ (HfO/sub 2/)/sub 1-x/(Al/sub 2/O/sub 3/)/sub x/ dielectrics

Metal-insulator-metal (MIM) capacitors with (HfO/sub 2/)/sub 1-x/(Al/sub 2/O/sub 3/)/sub x/ high-/spl kappa/ dielectric films were investigated for the first time. The results show that both the capacitance density and voltage/temperature coefficients of capacitance (VCC/TCC) values decrease with increasing Al/sub 2/O/sub 3/ mole fraction. It was demonstrated that the (HfO/sub 2/)/sub 1-x/(Al/sub 2/O/sub 3/)/sub x/ MIM capacitor with an Al/sub 2/O/sub 3/ mole fraction of 0.14 is optimized. It provides a high capacitance density (3.5 fF//spl mu/m/sup 2/) and low VCC values (/spl sim/140 ppm/V/sup 2/) at the same time. In addition, small frequency dependence, low loss tangent, and low leakage current are obtained. Also, no electrical degradation was observed for (HfO/sub 2/)/sub 1-x/(Al/sub 2/O/sub 3/)/sub x/ MIM capacitors after N/sub 2/ annealing at 400/spl deg/C. These results show that the (HfO/sub 2/)/sub 0.86/(Al/sub 2/O/sub 3/)/sub 0.14/ MIM capacitor is very suitable for capacitor applications within the thermal budget of the back end of line process.     

Thermal-sensitive BST thin film capacitors for dielectric bolometer prepared by RF magnetron sputtering

We have been developing a monolithic microbolometer technology for uncooled infrared focal plane arrays (Uncooled IRFPAs) along the route from fabricating pixels of thin-film dielectric bolometers on micromachined silicon substrates. In the paper, the thermal-sensitive barium strontium titanate (BST) thin film capacitors for that objective prepared by Radio-Frequency Magnetron sputtering have been investigated focusing on the condition of fabrication of BST thin films. Capacitor-Temperature properties of the thermal-sensitive BST thin film capacitors have been measured with impedance analyzer. According to the Capacitor-temperature curves, these indicated that the temperature coefficient of dielectric constant (TCD) within the ambient temperature region highly depended on the Radio-Frequency Magnetron sputtering condition of fabrication of BST thin films. BST thin film capacitors with TCD-value more than 21%/K have been prepared on the optimized condition. That is a good base for preparation of dielectric bolometer mode of uncooled IRFPAs.     

Interactions between ferroelectric BaTiO3 and Si

Ferroelectric BaTiO₃ thin films were deposited on single crystal Si substrates by radio-frequency magnetron sputtering. Bilayer structures of BaTiO₃ thin films, either amorphous on polycrystalline (A/P) or polycrystalline on microcrystalline (P/M), were utilized to reduce the leakage current and to enhance the dielectric constant of the films compared to single polycrystalline and amorphous layer structures, respectively. Relatively lower charge density, determined by the capacitance-voltage measurement on the capacitors with a configuration of Au/ BaTiO/p-Si/Al, was detected for the BaTiO₃ thin film with a structure of P/M. The current-voltage characteristics of the Al/SiO₂(~1.8 nm)/p-Si/Al diodes fabricated on the Si after removing BaTiO₃ layers gave direct evidence of the preservation of the Si surface crystal by using a P/M instead of a A/P structure. This was further confirmed by the Auger electron spectroscopy analysis on the samples.     

Impact of capacitor dielectric relaxation on a 14-bit 70-MS/s pipeline ADC in 3-V BiCMOS

In this paper, phenomena of charge absorption and relaxation in the plasma enhanced chemical vapor deposition (PECVD) silicon nitride dielectric (Si/sub 3/N/sub 4/) used in the capacitors of a 45-GHz f/sub T/, 0.4-/spl mu/m L/sub min/ SiGe BiCMOS are observed and interpreted. When such capacitors are used to design a pipelined 14-bit 70-MS/s switched-capacitor analog-to-digital converter (ADC), dielectric relaxation is identified as the cause of 8-LSB-wide gaps in the integral nonlinearity, which leads to the degradation of the converter performance even at low frequencies. The effect has been analyzed via Matlab behavioral simulations and SPICE circuit simulations. Ad-hoc experimental tests aimed at detecting residual amounts of charge left in the capacitors as a memory of previous states have been also carried out. After low-density low-pressure chemical vapor deposition (LPCVD) oxide capacitors (SiO/sub 2/) are introduced in the process, a new ADC test chip delivers 72.5-dBFS SNR, 82-dBc SFDR, 11.7-bit ENOB at 70 MS/s and 1-MHz input. The circuit features a die size of 5.3 /spl times/ 5.3 mm/sup 2/ and dissipates 1 W from the 3.3-V supply.     

Dielectric properties of low loss Ba<Subscript>6−3x</Subscript>Nd<Subscript>8+2x</Subscript>Ti<Subscript>18</Subscript>O<Subscript>54</Subscript> thin films prepared by pulsed laser deposition for microwave applications

Ba_6−3xNd_8+2xTi₁₈O₅₄ with x=0.25 (BNT-0.25, or simply, BNT) dielectric thin films with a thickness of 320 nm have been prepared on Pt-coated silicon substrates by pulsed laser deposition (PLD) at the substrate temperature of 650°C in 20 Pa oxygen ambient. X-ray analysis showed that the as-deposited films are amorphous and the films remain amorphous after a postannealing at 750°C for 30 min. The dielectric constant of the BNT films has been determined to be about 80 with a low loss tan δ of about 0.006 at 1 MHz. The capacitance-voltage (C-V), capacitance-frequency, and capacitance-temperature characteristics of a BNT capacitor with Pt top electrode were measured. A low leakage-current density of 4×10⁻⁶ A/cm² at 6 V was measured, and a preliminary discussion of the leakage-current mechanism is also given. It is proposed that amorphous BNT-0.25 thin films will be a potential dielectric material for microwave applications.     

High-k Al/sub 2/O/sub 3/ gate dielectrics prepared by oxidation of aluminum film in nitric acid followed by high-temperature annealing

A simple, cost-effective, and room temperature process was proposed to prepare high-k gate dielectrics. An aluminum oxide (Al/sub 2/O/sub 3/) gate dielectric was prepared by oxidation of ultrathin Al film in nitric acid (HNO/sub 3/) at room temperature then followed by high-temperature annealing in O/sub 2/ or N/sub 2/. The substrate injection current behavior and interface trap-induced capacitance were introduced to investigate the interfacial property between the gate dielectric and Si substrate. Al/sub 2/O/sub 3/ gate dielectric MOS capacitors with and without initial SiO/sub 2/ layers were characterized. It was shown that the Al/sub 2/O/sub 3/ gate dielectrics with initial oxide exhibit better electrical properties than those without. The 650/spl deg/C N/sub 2/-POA Al/sub 2/O/sub 3/-SiO/sub 2/ sample with an equivalent oxide thickness of 18 /spl Aring/ exhibits three orders of magnitude reduction in gate leakage current in comparison with the conventional thermal SiO/sub 2/ sample.     

An Approximate Analysis of Dielectric-Ridge Loaded Waveguide (Short Papers)

The dielectric-ridge loaded waveguide is analyzed approximately in terms of coupled empty waveguide modes. Using this technique the propagation constant can be easily computed, thus allowing the prediction of the properties of a type of dielectric phase shifter. Experimental evidence is presented which indicates that a two-mode approximation yields reasonable accuracy if the dielectric ridge is on center, is relatively thin compared to the width of the waveguide, and has a low dielectric constant relative to that of free space /spl epsiv//sub 0/.