Optimizing the precision of the four-point bend test for the measurement of thin film adhesion

The four-point bend test (4PB) has emerged as the test method of choice for adhesion studies of thin films. The precision of the 4PB test is examined here by studying the effect of notch depth, pressing speed, specimen width, edge polishing, and pin spacing. It is shown that proper control of these variables is critical for obtaining high precision, statistically significant, and reproducible 4PB test data. Finite element analyses are presented in order to further understand and interpret the experimental results.     

OLED金属走线弯折过程裂纹扩展有限元分析

针对OLED面板COF(Chip on Film)连接过渡区在弯折过程中易发生金属走线断裂的问题,本文对金属走线中裂纹的扩展机理以及抑制裂纹扩展的方法进行了研究。基于复合材料界面裂纹偏转与穿透理论分析了金属走线与有机光阻界面处的裂纹扩展方式,比较了两种金属走线结构在裂纹扩展过程中的应力强度因子变化。仿真结果表明,金属走线与有机光阻的裂纹倾向于沿垂直走线的方向扩展,裂纹沿着界面扩展的趋势很小。对比两种不同金属走线(环状与条状)的应力强度因子发现,环状金属走线内部靠近孔处的应力强度因子降低了95%,能有效抑制金属走线中的裂纹扩展。     

Study on the adhesive mechanism between the Ga doped ZnO thin film and the polycarbonate substrate

The Ga doped ZnO (GZO) film was deposited on the polymer substrate at room temperature by magnetron sputtering. The resistivity is 8.9×10⁻⁴ Ω cm. The average transmittance in the visible region is over 85%. According to the resistivity and transmittance in the visible light, it is obtained that the film exhibits excellent electrical and optical properties, which satisfies the application for optoelectronic devices. However, the adhesion between the film and the polymer substrate is very weak. In order to figure out the reason of the weak adhesion, we study the adhesive mechanism between the GZO film and the polymer substrate through using depth profiling XPS method, residual stress test, and SIMS method for the first time. The residual stress of the film is a compressive stress. According to the SIMS results, an element diffusion exists at the interface. However, according to the depth profiling XPS results, there is no chemical bonding between the GZO film and the polymer substrate.     

叠层QFN器件界面层裂失效研究

为了探究造成微电子封装器件界面层裂的根源,选取了叠层QFN器件进行建模仿真,模拟了其在热加载条件下的器件应力分布情况。通过粘结强度实验,测出加载力与位移的关系,其中力的峰值为2.52N,裂纹开口位移为0.29mm,计算得到的界面断裂能为10.5N/m。采用内聚力模型(CZM)与J积分这两种数值预测方法,对芯片粘结剂与铜引脚层界面层裂失效作了研究,找到裂纹萌生的关键点;两者对裂纹扩展趋势的结论一致,在预测裂纹产生方面,CZM法比J积分法更方便。     

Investigation of interfacial delamination of a copper-epoxy interface under monotonic and cyclic loading: modeling and evaluation

Interfacial delamination is of important concern for multilayered microelectronic packages, as it is one of the most common failures observed after reliability test. Most of the work, available in open literature, focus on delamination propagation under monotonic loading rather than delamination propagation under cyclic loading. Interfacial fracture mechanics based methodologies have been proven to be efficient in handling interfacial delamination problem under monotonic loading. In this paper, the principles of interfacial mechanics have been applied in the analysis of interfacial fatigue crack propagation. Fatigue test has been conducted in studying onset of delamination and fatigue crack propagation (FCP) of an interfacial crack along a copper-epoxy interface. Models developed in this study have also been applied in the evaluation of multilayered integrated substrate test vehicles.     

Modified single cantilever adhesion test for EMC/PSR interface in thin semiconductor packages

We propose and implement an adhesion test configuration called “modified single cantilever adhesion test” (M-SCAT) that can be employed to determine the adhesion strength of epoxy molding compound (EMC) and photo solder resist (PSR) interface in thin semiconductor packages. The proposed M-SCAT method is optimal for quick and quantitative in-situ testing of the interface with strong adhesion as sample preparation and testing are simple while maintaining a low mode mixity at the crack tip. Detailed sample preparation and experimental testing to determine the critical load required for delamination are presented. A numerical procedure is followed to assess the stress and strain fields around the crack tip at the point of delamination, thus allowing for the J-integral method to be employed to determine the critical energy release rate. The proposed approach is carried out for two different EMC/PSR interfaces. The results show excellent repeatability, which allows for the test method to be used effectively to select the most ideal material set for given applications.     

Adhesion energy of printed circuit board materials using four-point-bending validated with finite element simulations

Modern printed circuit boards (PCB) are high performance products consisting of metal and dielectric materials in a multi-layered structure. Due to this build-up different failures, such as cracking or delamination, may occur during manufacturing and use leading to failure of the entire electronic device. The mismatch in the thermal expansion coefficients leads to stresses in the structure during temperature change, e.g., during the reflow process. To improve device reliability, it is critical to understand the delamination between different layers and to know the adhesion energy of the interfaces in a PCB. The adhesion energy in test PCBs was determined using four point bending (4PB) experiments before and after 15 reflow cycles. The investigations show that 4PB is applicable for determining the adhesion energy in samples made of halogen free pre-pregs and copper sheets with standard manufacturing processes. Furthermore, the applicability of the analytical adhesion energy calculation in the presence of non-linearities was examined by finite element simulations. It was found that friction between the sample and the pins of the loading device has an influence on the reaction force used for the calculation of the critical energy release rate. Plastic deformation of the 4PB sample, especially in the ductile copper layers, also will affect the analytically determined critical energy release rate. The role of both factors on the analytical approach to measure adhesion energies of PCB interfaces with 4PB will be shown and discussed.     

A simple and fundamental design rule for resisting delamination in bimaterial structures

The determination of the peeling stress in the interface between the two layers of a bimaterial structure has long been of particular interest in the microelectronic industry. This is because peeling of deposited layers on silicon wafers, and delamination of encapsulated integrated circuits continue to be of great concern. Until now beam theory has not delivered a simple method of determining the direction of the peeling stress at the free edge of the structure, although a recent paper has proposed a formulation which approximates to the reality.Past studies have focused on determining the stresses in the interface. In this paper a different approach is taken. A fundamental formulation is derived for the moment that arises in the interface as a result of the naturally occurring reversal in sign of the peeling stress. It is shown that this peeling moment M_p completely generates the additional bending needed to ensure that the radius of curvature of each layer at the interface is identical, even when they have differing flexural rigidities.The direction and magnitude of the peeling moment M_p is determined in this paper, and its value is confirmed by finite element analysis for seven test cases representing a wide range of bimaterial structures. The expression for M_p is simple and easily computed, and it provides a fundamental design rule for resisting delamination in bimaterial structures.     

HTS and PCT Reliability of Chips and Flex Substrates Assembled Using a Thermosonic Flip-Chip Bonding Process

This study assesses the high-temperature storage (HTS) test and the pressure-cooker test (PCT) reliability of an assembly of chips and flexible substrates. After the chips were bonded onto the flexible substrates, specimens were utilized to assess the HTS test and PCT reliability. After the PCT and HTS tests, the die-shear test was applied to examine changes in die-shear forces. The microstructure of the test specimens was analyzed to evaluate reliability and to identify possible failure mechanisms. When the duration of the HTS test was increased, the percentage of gold bumps that peeled off from the surface of the copper pads on the chip side increased, and a crack was present at the bonding interface between the gold bumps and chip bond pads. This crack was due to thermal stress generated during the HTS test, and degraded the die-shear force of the assembly of chips and flexible substrates. After the PCT, the crack was present at the interface between deposited layers of copper electrodes after the specimens were subjected to the PCT for various durations. Moisture penetrated into the deposited layers of the copper electrodes, deposited layers lost their adhesion, and the crack progressed from the corner into the central bond area as the test duration increased. To improve the PCT reliability of assemblies of chips and flexible substrates using the thermosonic flip-chip bonding process, one must prevent moisture from penetrating into deposited layers of copper electrodes and prevent crack formation at the interface between nickel and copper layers. Underfill would be an effective approach to prevent moisture from penetrating into deposited layers during the PCT, thereby improving the reliability of the samples during the PCT.     

Fracture behavior of isotropically conductive adhesives

The fracture behavior of several commercial, silver-filled epoxies was studied using a combination of fracture mechanics, surface science, and microscopy. Three-point bend tests revealed that the bulk fracture toughness of the silver-filled epoxies fell within a narrow range 1.1-1.3 MPa-m^0.5. Both electron and optical microscopy studies indicated that crack path deflection due to the silver-particles was the primary micromechanical deformation mechanism. Surprisingly, the interfacial fracture energies between the epoxies and a copper surface ranged from 50 to 900 J/m². Contact angle measurements on the cured epoxies indicated that some epoxy surfaces are more active than others. However, the correlation between thermodynamic work of adhesion and fracture energy is rather weak and suggests only a modest trend. In summary, although the use of contact angles/surface energies to predict adhesion is promising, much more effort is required to make it a reliable screening tool. Fortunately, the use of interfacial fracture mechanics can detect differences in adhesive strength, and should allow packaging engineers to select die attach adhesives with improved adhesion     

Impact of flip-chip packaging on copper/low-k structures

Copper/low-k structures are the desired choice for advanced integrated circuits (ICs). Nevertheless, the reliability might become a concern due to the considerably lower strength and greater coefficient of thermal expansion (CTE) of the low-k materials. To ensure successful integration of the new chips within advanced packaging products, it is essential to understand the impact of packaging on chips with copper/low k structures. In this study, flip-chip die attach process has been studied. Multilevel, multiscale modeling technique was used to bridge the large gap between the maximum and minimum dimensions. Interface fracture mechanics-based approach has been used to predict interface delamination. Both plastic ball grid array (PBGA) and ceramic ball grid array (CBGA) packages were evaluated. Critical failure locations and interfaces were identified for both packages. The impact of thin film residual stresses has been studied at both wafer level and package level. Both PBGA and CBGA packaging die-attach processes induce significantly higher crack driving force on the low-k interfaces than the wafer process. CBGA die-attach might be more critical than PBGA die-attach due to the higher temperature. During CBGA die-attach process, the crack driving force at the low-k/passivation interface may exceed the measured interfacial strength. Two solutions have been suggested to prevent catastrophic delamination in copper/low-k flip-chip packages, improving adhesion strength of low-k/barrier interface or adding tiles and slots in low-k structures to reduce possible area for crack growth.     

Adhesion studies of CVD copper metallization

The adhesion of chemical vapor deposition (CVD) Cu thin films to various barriers was observed to improve with a post-deposition anneal or a physical vapor deposition (PVD) Cu flash layer on the barrier before depositing CVD Cu. The ambient exposure of the barrier before the deposition of CVD Cu has been observed to lead to degradation of adhesion in both CVD Cu seed and CVD/PVD Cu high vacuum integrated metallization schemes. The integrated CVD and PVD Cu deposition scheme exhibits better adhesion due to the inherent annealing provided during the PVD deposition which is carried out at temperatures between 300 and 400°C. We have evaluated both qualitative and quantitative tests — tape test, Stud pull test and 4-point bend test — in understanding adhesion and observed that each of these tests give different details of interface breakdown.     

Thermomechanics of thin films and interfaces

Several mechanics and thermomechanics problems associated with the deposition of thin films on substrates are reviewed. They include: (1) Stress concentrations in interfacial cracks, and the corresponding calculation of the energy release rate for crack growth along the film-substrate interface. (2) The effect of microstructure and of stress relaxation by diffusional creep during the growth of a thin film on the residual stresses present in the film; and (3) the thermal conductivity in film-substrate assemblies, and the issue of extracting film thermal properties from composite measurements. The relation between bulk and thin film values of the thermal conductivity is discussed. The issue of interfacial thermal resistance, which may lead to interfacial temperature drops of the order of 0.6° K is also addressed, and discussed in view of the inhomogeneous interface in films deposited by electron beam evaporation or ion beam sputtering.     

Analyses of the practical adhesion strengths of the metal/polymer interfaces in electronic packaging

There is a plethora of techniques to measure the adhesion strength of metal/polymer interfaces. However, the practical adhesion strength, which is the work done in separating the film from the substrate (or one film from another), is very sensitive to the test methods and the mechanical effects, such as the residual stress, thickness and mechanical properties of the layers, strain rate, and phase angle. Deriving intrinsic-adhesion properties of the interfaces, which are independent of such parameters, from the practical adhesion-strength measurements is a formidable task. In the present work, data from the three commonly used adhesion tests; pull-out, 90°-peel, and T-peel tests are compared with the intrinsic-adhesion properties of the interface, such as the interface-fracture toughness or the interface-fracture energy, and their implications are discussed. Material systems analyzed were Cu-based lead frame/epoxy-molding compound (EMC) and Cu/Cr/polyimide.     

Current induced on a conducting strip which resides on the planar interface between two semi-infinite half-spaces

An analysis is described for determining the current induced by a known excitation on a conducting strip which resides on the planar interface between two semi-infinite homogeneous half-spaces of different electromagnetic properties. The perfectly conducting flat strip is of infinite extent and the excitation is transverse magnetic to the strip axis. An integral equation for the induced current is formulated and it is shown that its kernel which is in general a Sommerfeld-type integral can be expressed in closed form when the permeabilities of the two media are the same. Under this practical condition the integral equation is solved numerically and data are presented for cases of interest. For the electrically narrow strip, the integral equation is approximated and this approximate equation is solved analytically.     

Nanosized Glass Frit as an Adhesion Promoter for Ink‐Jet Printed Conductive Patterns on Glass Substrates Annealed at High Temperatures

Ink‐jet printed metal nanoparticle films have been shown to anneal at high temperatures (above 500 °C) to highly conductive metal films on glass or ceramic substrates, but they suffer from cracking and inadequate substrate adhesion. Here, we report printable conductive materials, with added nanosized glass frit that can be annealed at 500 °C to form a crack‐free dense microstructure that adheres well to glass substrates. This overcomes the previous challenges while still retaining the desired high film conductivity. Controlling the particle characteristics and dispersion behavior plays an important role in successfully incorporating the glass frit into the conductive inks.     

Identification of crack path of inter- and transgranular fractures in sintered silicon nitride by in situ TEM

Inter- and/or transgranular crack paths in sintered silicon nitride (Si3N4) during fracture were investigated by in situ straining experiments in a transmission electron microscope at room temperature, using a high-precision micro-indenter. By this technique, cracks introduced in an in situ manner were observed to propagate in the grain interior and along grain boundaries. High-resolution electron microscopy (HREM) observation revealed that the crack propagation takes place at an interface between Si3N4 grains and an intergranular glassy film (IGF) in the case of intergranular fractures. According to the results by previous molecular dynamics simulations, a number of dangling bonds are present at the Si3N4/IGF interface, which should result in the observed fracture behavior at the interface. On the other hand, the crack path introduced during transgranular fracture of Si3N4 grains was found to be sharp and straight. The observed crack propagated towards [1120] inside the Si3N4 grain with the crack surface parallel to the (1100) plane. The HREM observations of crack walls revealed them to be atomically flat. The atomic termination of the crack walls was identified in combination with image simulations based on atomic models of the cleaved crack walls.     

Adhesion of aluminum films on polyimide by the electromagnetic tensile test

The electromagnetic tensile test has been adapted to the measurement of the adhesion of thin aluminum alloy films on polyimide. The adhesion per unit area was found to be weakly dependent on linewidth for lines as small as 5 μm. Processing conditions affected the adhesion with plasma ash and annealing steps improving the adhesion. Al 4% Cu was somewhat more adherent than Al-0.5% Cu.     

Wet‐Responsive,Reconfigurable, and Biocompatible Hydrogel Adhesive Films for Transfer Printing of Nanomembranes

This study presents a wet‐responsive and biocompatible smart hydrogel adhesive that exhibits switchable and controllable adhesions on demand for the simple and efficient transfer printing of nanomembranes. The prepared hydrogel adhesives show adhesion strength as high as ≈191 kPa with the aid of nano‐ or microstructure arrays on the surface in the dry state. When in contact with water, the nano/microscopic and macroscopic shape reconfigurations of the hydrogel adhesive occur, which turns off the adhesion (≈0.30 kPa) with an extremely high adhesion switching ratio (>640). The superior adhesion behaviors of the hydrogels are maintained over repeating cycles of hydration and dehydration, indicating their ability to be used repeatedly. The adhesives are made of a biocompatible hydrogel and their adhesion on/off can be controlled with water, making the adhesives compatible with various materials and surfaces, including biological substrates. Based on these smart adhesion capabilities, diverse metallic and semiconducting nanomembranes can be transferred from donor substrates to either rigid or flexible surfaces including biological tissues in a reproducible and robust fashion. Transfer printing of a nanoscale crack sensor onto a bovine eye further demonstrates the potential of the reconfigurable hydrogel adhesive for use as a stimuli‐responsive, smart, and versatile functional adhesive for nanotransfer printing.     

Interfacial Fracture Investigation of Low-k Packaging Using J-Integral Methodology

In order to resolve the issues of RC time delay and high power consumption, IC chips with Cu/low-k interconnects are developed to meet the foregoing requirements. However, there is a high potential that in doing so it may contribute to interfacial cracks occurring or propagating between the copper metal and the low-k dielectric material as a result of poor adhesion and lower fracture toughness, which results from the inherent mechanical imperfection of low-k materials. This fracturing problem is one of the most urgent issues for the thermomechanical reliability of Cu/low-k interconnects, and it needs to be resolved urgently. For this reason, we propose a prediction methodology of finite-element analysis (FEA) based on J-integral value estimation to investigate the interfacial fracture opportunity of low-k packages. However, the J-integral calculation is path dependent and so crucial in FEA for a crack on an interface between dissimilar materials. Therefore, various paths with an integral contour surrounding the crack tip are considered to avoid a misunderstanding of the cracking energy. All the analytic results indicate that a rectangular contour with a proper ratio of length/width, and multilayers of element close to the delaminating surfaces, is suggested for obtaining a stable J-integral value. On the other hand, the proposed methodology has been validated by a four-point bending test and compared with the relative experimental data of multi-low-k dielectric films. Moreover, under a reliable integral contour path that crack driving force predicted using the type of interfacial crack constructed by means of the element death technique, it shows good agreement with the simulated results of embedding actual crack.