Growth of (111) HgCdTe on (100) Si by MOVPE using metalorganic tellurium adsorption and annealing

(lll)B CdTe layers free of antiphase domains and twins were directly grown on (100) Si 4°-misoriented toward<011> substrates, using a metalorganic tellurium (Te) adsorption and annealing technique. Direct growth of (lll)B CdTe on (100) Si has three major problems: the etching of Si by Te, antiphase domains, and twinning. Te adsorption at low temperature avoids the etching effect and annealing at a high temperature grows single domain CdTe layers. Te atoms on the Si surface are arranged in two stable positions, depending on annealing temperatures. We evaluated the characteristics of (lll)B CdTe and (lll)B HgCdTe layers. The full width at half maximum (FWHM) of the x-ray double crystal rocking curve (DCRC) showed 146 arc sec at the 8 |im thick CdTe layers. In Hg_1−xCd_xJe (x = 0.22 to 0.24) layers, the FWHMs of the DCRCs were 127 arc sec for a 7 (im thick layer and 119 arc sec for a 17 (im thick layer. The etch pit densities of the HgCdTe were 2.3 x 106 cm2 at 7 ^m and 1.5 x 106 cm-2 at 17 um.     

Growth and Analysis of HgCdTe on Alternate Substrates

Dislocations generated at the HgCdTe/CdTe(buffer layer) interface are demonstrated to play a significant role in influencing the crystalline characteristics of HgCdTe epilayers on alternate substrates (AS). A dislocation density >10⁸?cm^?2 is observed at the HgCdTe/CdTe interface. Networks of dislocations are generated at the HgCdTe/CdTe interface. The dislocation networks are observed to entangle. Significant dislocation reduction occurs within a few microns of the HgCdTe/CdTe interface. The reduction in dislocation density as a function of depth is enhanced by annealing. Etch pit density and x-ray diffraction full-width at half-maximum values increase as a function of the lattice mismatch between HgCdTe epilayer and the buffer layer/substrate. The experimental results suggest that only by reducing HgCdTe/CdTe lattice mismatch will the desired crystallinity be achieved for HgCdTe epilayers on AS.     

Threading and misfit-dislocation motion in molecular-beam epitaxy-grown HgCdTe epilayers

Lattice mismatch between the substrate and the absorber layer in single-color HgCdTe infrared (IR) detectors and between band 1 and band 2 in two-color detectors results in the formation of crosshatch lines on the surface and an array of misfit dislocations at the epi-interfaces. Threading dislocations originating in the substrate can also bend into the interface plane and result in misfit dislocations because of the lattice mismatch. The existence of dislocations threading through the junction region of HgCdTe IR-photovoltaic detectors can greatly affect device performance. High-quality CdZnTe substrates and controlled molecular-beam epitaxy (MBE) growth of HgCdTe can result in very low threading-dislocation densities as measured by the etch-pit density (EPD ∼ 10⁴cm⁻²). However, dislocation gettering to regions of high stress (such as etched holes, voids, and implanted-junction regions) at elevated-processing temperatures can result in a high density of dislocations in the junction region that can greatly reduce detector performance. We have performed experiments to determine if the dislocations that getter to these regions of high stress are misfit dislocations at the substrate/absorber interface that have a threading component extending to the upper surface of the epilayer, or if the dislocations originate at the cap/absorber interface as misfit dislocations. The preceding mechanisms for dislocation motion are discussed in detail, and the possible diode-performance consequences are explored.     

HgCdTe growth on (552) oriented CdZnTe by metalorganic vapor phase epitaxy

We report the growth of HgCdTe on (552)B CdZnTe by metalorganic vapor phase epitaxy (MOVPE). The (552) plane is obtained by 180 rotation of the (211) plane about the [111] twist axis. Both are 19.47 degrees from (111), but in opposite directions. HgCdTe grown on the (552)B-oriented CdZnTe has a growth rate similar to the (211)B, but the surface morphology is very different. The (552)B films exhibit no void defects, but do exhibit ∼40 μm size hillocks at densities of 10–50 cm⁻². The hillocks, however, are significantly flatter and shorter than those observed on (100) metalorganic vapor phase epitaxy (MOVPE) HgCdTe films. For a 12–14 μm thick film the height of the highest point on the hillock is less than 0.75 μm. No twinning was observed by back-reflection Laue x-ray diffraction for (552)B HgCdTe films and the x-ray double crystal rocking curve widths are comparable to those obtained on (211)B films grown side-by-side and with similar alloy composition. Etch pit density (EPD) measurements show EPD values in the range of (0.6–5)×10⁵ cm⁻², again very similar to those currently observed in (211)B MOVPE HgCdTe. The transport properties and ease of dopant incorporation and activation are all comparable to those obtained in (211)B HgCdTe. Mid-wave infrared (MWIR) photodiode detector arrays were fabricated on (552)B HgCdTe films grown in the P-n-N device configuration (upper case denotes layers with wider bandgaps). Radiometric characterization at T=120–160 K show that the detectors have classical spectral response with a cutoff wavelength of 5.22 μm at 120 K, quantum efficiency ∼78%, and diffusion current is the dominant dark current mechanism near zero bias voltage. Overall, the results suggest that (552)B may be the preferred orientation for MOVPE growth of HgCdTe on CdZnTe to achieve improved operability in focal plane arrays.     

Heteroepitaxy of HgCdTe(112) infrared detector structures on Si(112) substrates by molecular-beam epitaxy

High-quality, single-crystal epitaxial films of CdTe(112)B and HgCdTe(112)B have been grown directly on Si(112) substrates without the need for GaAs interfacial layers. The CdTe and HgCdTe films have been characterized with optical microscopy, x-ray diffraction, wet chemical defect etching, and secondary ion mass spectrometry. HgCdTe/Si infrared detectors have also been fabricated and tested. The CdTe(112)B films are highly specular, twin-free, and have x-ray rocking curves as narrow as 72 arc-sec and near-surface etch pit density (EPD) of 2 × 10⁶ cm⁻² for 8 μm thick films. HgCdTe(112)B films deposited on Si substrates have x-ray rocking curve FWHM as low as 76 arc-sec and EPD of 3-22 × 10⁶ cm⁻². These MBE-grown epitaxial structures have been used to fabricate the first high-performance HgCdTe IR detectors grown directly on Si without use of an intermediate GaAs buffer layer. HgCdTe/Si infrared detectors have been fabricated with 40% quantum efficiency and R₀A = 1.64 × 10⁴ Ωm₂ (0 FOV) for devices with 7.8 μm cutoff wavelength at 78Kto demonstrate the capability of MBE for growth of large-area HgCdTe arrays on Si.     

Long wavelength infrared, molecular beam epitaxy, HgCdTe-on-Si diode performance

In the past several years, we have made significant progress in the growth of CdTe buffer layers on Si wafers using molecular beam epitaxy (MBE) as well as the growth of HgCdTe onto this substrate as an alternative to the growth of HgCdTe on bulk CdZnTe wafers. These developments have focused primarily on mid-wavelength infrared (MWIR) HgCdTe and have led to successful demonstrations of high-performance 1024×1024 focal plane arrays (FPAs) using Rockwell Scientific’s double-layer planar heterostructure (DLPH) architecture. We are currently attempting to extend the HgCdTe-on-Si technology to the long wavelength infrared (LWIR) and very long wavelength infrared (VLWIR) regimes. This is made difficult because the large lattice-parameter mismatch between Si and CdTe/HgCdTe results in a high density of threading dislocations (typically, >5E6 cm⁻²), and these dislocations act as conductive pathways for tunneling currents that reduce the R_oA and increase the dark current of the diodes. To assess the current state of the LWIR art, we fabricated a set of test diodes from LWIR HgCdTe grown on Si. Silicon wafers with either CdTe or CdSeTe buffer layers were used. Test results at both 78 K and 40 K are presented and discussed in terms of threading dislocation density. Diode characteristics are compared with LWIR HgCdTe grown on bulk CdZnTe.     

Low temperature growth of (100) HgCdTe layers with DtBTe in metalorganic vapor phase epitaxy

Growth characteristics of (100) HgCdTe (MCT) layers by MOVPE at low temperature of 275°C were studied using ditertiarybutyltelluride as a tellurium precursor. Growths were conducted in a vertical narrow-spacing growth cell at atmospheric pressure. Cd composition of MCT layers were controlled from 0 to 0.98 using dimethylcadmium (DMCd) flow. The growth rate was constant for increase of DMCd flow. During the growth, Cd was incorporated preferentially into the MCT layers. Enhancement of Cd incorporation in the presence of Hg was also observed. Crystal quality and electrical properties were also evaluated, which showed that high quality MCT layers can be grown at 275°C. Strain in CdTe layers grown at 425 and 275°C was also evaluated. Lattice parameter of layers grown at 425°C approached bulk value at thickness of 5 μm, while layers grown at 275°C relaxed at 1 μm. The rapid strain relaxation of layers grown at 275°C was considered due to the layer growth on the strain relaxed buffer layer. The effect of the thermal stress on the relaxation of CdTe lattice strain was also discussed.     

Dislocation Reduction of HgCdTe/Si Through <Emphasis Type="Italic">Ex Situ</Emphasis> Annealing

Current growth methods of HgCdTe/Cd(Se)Te/Si by molecular-beam epitaxy (MBE) result in a dislocation density of mid 10⁶ cm⁻² to low 10⁷ cm⁻². Although the exact mechanism is unknown, it is well accepted that this high level of dislocation density leads to poorer long-wavelength infrared (LWIR) focal-plane array (FPA) performance, especially in terms of operability. We have conducted a detailed study of ex situ cycle annealing of HgCdTe/Cd(Se)Te/Si material in order to reduce the total number of dislocations present in as-grown material. We have successfully and consistently shown a reduction of one half to one full order of magnitude in the number of dislocations as counted by etch pit density (EPD) methods. Additionally, we have observed a corresponding decrease in x-ray full-width at half-maximum (FWHM) of ex situ annealed HgCdTe/Si layers. Among all parameters studied, the total number of annealing cycles seems to have the greatest impact on dislocation reduction. Currently, we have obtained numerous HgCdTe/Si layers which have EPD values measuring ~1 × 10⁶ cm⁻² after completion of thermal cycle annealing. Preliminary Hall measurements indicate that electrical characteristics of the material can be maintained.     

Selective CdTe Nanoheteroepitaxial Growth on Si(100) Substrates Using the Close-Spaced Sublimation Technique Without the Use of a Mask

The development of HgCdTe detectors requires high sensitivity, small pixel size, low defect density, long-term thermal-cycling reliability, and large-area substrates. CdTe bulk substrates were initially used for epitaxial growth of HgCdTe films. However, CdTe has a lattice mismatch with long-wavelength infrared (LWIR) and middle-wavelength infrared (MWIR) HgCdTe that results in detrimental dislocation densities above mid-10⁶ cm^?2. This work explores the use of CdTe/Si as a possible substrate for HgCdTe detectors. Although there is a 19% lattice mismatch between CdTe and Si, the nanoheteroepitaxy (NHE) technique makes it possible to grow CdTe on Si substrates with fewer defects at the CdTe/Si interface. In this work, Si(100) was patterned using photolithography and dry etching to create 500-nm to 1-μm pillars. CdTe was selectively deposited on the pillar surfaces using the close-spaced sublimation (CSS) technique. Scanning electron microscopy (SEM) was used to characterize the CdTe selective growth and grain morphology, and transmission electron microscopy (TEM) was used to analyze the structure and quality of the grains. CdTe selectivity was achieved for most of the substrate and source temperatures used in this study. The ability to selectively deposit CdTe on patterned Si(100) substrates without the use of a mask or seed layer has not been observed before using the CSS technique. The results from this study confirm that CSS has the potential to be an effective and low-cost technique for selective nanoheteroepitaxial growth of CdTe films on Si(100) substrates for infrared detector applications.     

Suppression of twin formation in CdTe(111)B epilayers grown by molecular beam epitaxy on misoriented Si(001)

CdTe(lll)B layers have been grown on misoriented Si(001). Twin formation inside CdTe(lll)B layer is very sensitive to the substrate tilt direction. When Si(001) is tilted toward [110] or [100], a fully twinned layer is obtained. When Si(001) is tilted toward a direction significantly away from [110], a twin-free layer is obtained. Microtwins inside the CdTe(111)B layers are overwhelmingly dominated by the lamellar twins. CdTe(111)B layers always start with heavily lamellar twinning. For twin-free layers, the lamellar twins are gradually suppressed and give way to twin-free CdTe(111)B layer. The major driving forces for suppressing the lamellar twinning are the preferential orientation of CdTe[11-2] along Si[1-10] and lattice relaxation. Such preferential orientation is found to exist for the CdTe(111)B layers grown on Si(001) tilted toward a direction between [110] and [100].     

TEM Characterization of HgCdTe/CdTe Grown on GaAs(211)B Substrates

A microstructural study of HgCdTe/CdTe/GaAs(211)B and CdTe/GaAs(211)B heterostructures grown using molecular beam epitaxy (MBE) was carried out using transmission electron microscopy and small-probe microanalysis. High-quality MBE-grown CdTe on GaAs(211)B substrates was demonstrated to be a viable composite substrate platform for HgCdTe growth. In addition, analysis of interfacial misfit dislocations and residual strain showed that the CdTe/GaAs interface was fully relaxed except in localized regions where GaAs surface polishing had caused small pits. In the case of HgCdTe/CdTe/GaAs(211)B, the use of thin HgTe buffer layers between HgCdTe and CdTe for improving the HgCdTe crystal quality was also investigated.     

Traces of HgCdTe Defects as Revealed by Etch Pits

The characteristics of defects in HgCdTe liquid-phase epitaxy (LPE) epilayers were investigated by using Schaake’s and Chen’s etches. By tracking the etch pits (EP), two kinds of threading dislocations with <110> and <211> orientations were observed for the first time in HgCdTe LPE epilayers. They are ascribed to perfect 60 deg dislocation and Shockley partial screw dislocations. The kinds of dislocation etch pits revealed by Schaake’s and Chen’s etches were experimentally confirmed to be correlated one-to-one. In addition to the threading dislocation etch pits, another kind of etch pits without the threading feature was also observed using both etch methods. The density of the nonthreading etch pits increases in the regions close to epilayer-substrate interfaces, scratched areas, and melt droplets. The etch pit density (EPD) varies from 10⁴ cm⁻² to 10⁷ cm⁻² from sample to sample or at different places on the same sample, indicating that they are correlated to stresses and should be considered in the assessment of HgCdTe epilayers.     

Feasibility of Localized Substrate Thinning for Reduced Dislocation Density in CdTe/Si Heterostructures

HgCdTe heteroepitaxy on low-cost, large-lattice-mismatched substrates such as Si continue to be plagued by large threading dislocation densities that ultimately reduce the operability of the thermal imaging detector array. Molecular-beam epitaxy (MBE) of 10 μm- to 15 μm-thick CdTe buffer layers has played a crucial role in reducing dislocation densities to current state-of-the-art levels. Herein, we examine the possibility that growth on locally back-thinned substrates could prove advantageous in further reducing dislocation densities in the CdTe/Si heteroepitaxial system. Using defect decoration techniques, a decrease in dislocation (etch-pit) density of up to ~42% has been measured in CdTe regions where the underlying Si substrate was chemically back-thinned to ~20 μm. A theoretical understanding is proposed, where a substrate-thickness-dependent dislocation image force is a likely cause for the experimentally observed reduction in threading dislocation density. These observations raise the prospect of combining localized substrate thinning with other techniques to further reduce dislocation densities to levels sought for HgCdTe/CdTe/Si and other large-lattice-mismatched systems.     

Te-rich liquid phase epitaxial growth of HgCdTe on Si-based substrates

The growth of high quality (111)B oriented HgCdTe layers on CdZnTe/GaAs/Si and CdTe/Si substrates by Te-rich slider liquid phase epitaxy (LPE) is reported. Although the (111) orientation is susceptible to twinning, a reproducible process yielding twin-free layers with excellent surface morphology has been developed. The electrical properties and dislocation density in films grown on these substrates are comparable to those measured in HgCdTe layers grown on bulk CdTe substrates using the same LPE process. This is surprising in view of the large lattice mismatch that exists in these systems. We will report details of both the substrate and HgCdTe growth processes that are important to obtaining these results.     

Growth and structural properties of low defect,sub-grain free CdTe substrates grown by the horizontal bridgman technique

Large area, low defect CdTe substrates are essential for high quality epitaxy of HgCdTe in infrared detector applications. Vertical Bridgman (VB) CdTe normally exhibits higher than desired dislocation density and sub-grain structure. A seeded Horizontal Bridgman (HB) technique has been used to grow CdTe single crystals which exhibit superior crystalline qualities when compared to standard VB substrates. The HB grown CdTe crystals were not intentionally doped and had resistivities in the 10⁷ ohm-cm range. The etch pit density (EPD) near the seed and the tail end sections is 5 × 10⁴ cm⁻²s, while wafers from the middle section of the ingot have EPDs in the 10⁴ cm⁻² range. Furthermore, HB EPD patterns indicate the absence of sub-grain boundaries. X-ray rocking curves are very sharp and exhibit FWHMs as low as 9 arc-sec. By comparison, the best samples from standard VB CdTe ingots exhibit x-ray rocking curves with FWHMs in the >30 arc-sec range. The IR transmission of HB material is as high as 57% in the 2.5 to 20 μm region. Results of electrical and optical characterization are presented.     

Si Wafer Thinning Techniques Compatible With Epitaxy of CdTe Buffer Layers

Reduction of threading dislocation density is critical for improving the performance of HgCdTe detectors on lattice-mismatched alternative substrates such as Si. CdTe buffer layers grown by molecular beam epitaxy (MBE), with thicknesses on the order of 8 μm to 12 μm, have helped reduce dislocation densities in HgCdTe layers. In this study, the reduction of threading dislocation densities in CdTe buffer layers grown on locally thinned Si substrates was examined. A novel Si back-thinning technique was developed that maintained an epiready front surface and achieved Si thicknesses as low as 1.9 μm. Threading dislocation densities, acquired by defect decoration techniques, were reduced by as much as 60% for CdTe buffer layers grown on these thinned regions when compared with unthinned regions. However, this reduction is inconsistent with prior notions that threading dislocation propagation is dominated by image forces. Instead, the thickness gradient of thinned Si may play a larger role.     

Molecular beam epitaxial growth of Cd<Subscript>1−y</Subscript>Zn<Subscript>y</Subscript>Se<Subscript>x</Subscript>Te<Subscript>1−x</Subscript> on Si(211)

We report on the first successful growth of the quaternary alloy Cd_1−yZn_ySe_xTe_1−x(211) on 3-in. Si(211) substrates using molecular beam epitaxy (MBE). The growth of CdZnSeTe was performed using a compound CdTe effusion source, a compound ZnTe source, and an elemental Se effusion source. The alloy compositions (x and y) of the Cd_1−yZn_ySe_xTe_1−x quaternary compound were controlled through the Se/CdTe and ZnTe/CdTe flux ratios, respectively. Our results indicated that the surface morphology of CdZnSeTe improves as the Zn concentration decreases, which fits well with our previous observation that the surface morphology of CdZnTe/Si is poorer than that of CdSeTe/Si. Although the x-ray full-width at half-maximums (FWHMs) of CdZnSeTe/Si with 4% of Zn + Se remain relatively constant regardless of the individual Zn and Se concentrations, etched-pit density (EPD) measurements exhibit a higher dislocation count on CdZnSeTe/Si layers with about 2% Zn and Se incorporated. The enhancement of threading dislocations in these alloys might be due to an alloy disorder effect between ZnSe and CdTe phases. Our results indicate that the CdZnSeTe/Si quaternary material with low Zn or low Se concentration (less than 1.5%) while maintaining 4% total Zn + Se concentration can be used as lattice-matching composite substrates for long-wavelength infrared (LWIR) HgCdTe as an alternative for CdZnTe/Si or CdSeTe/Si.     

<Emphasis Type="Italic">Ex Situ</Emphasis> Thermal Cycle Annealing of Molecular Beam Epitaxy Grown HgCdTe/Si Layers

We present the results of ex situ thermal cycle annealing (TCA) of molecular beam epitaxy grown mercury cadmium telluride (HgCdTe) on Cd(Se)Te/Si(211) composite substrates. We examined the variation in the etch pit density (EPD) and overall crystalline quality with respect to annealing temperature, number of annealing cycles, total annealing time, pre-annealed EPD/crystal quality, buffer layer quality, and buffer layer lattice constant. Using TCA we observed an order of magnitude reduction in the dislocation density of the HgCdTe layers and a corresponding decrease in x-ray full width at half maximum, when the as-grown layer EPD was on the order of 1 × 10⁷ cm⁻². Among all the parameters studied, the one with the greatest influence on reducing EPD was the number of annealing cycles. We also noticed a saturation point where the HgCdTe/Si EPD did not decrease below ∼1 × 10⁶ cm⁻², regardless of further TCA treatment or the as-grown EPD value.     

Investigation of HgCdTe p-n device structures grown by liquid-phase epitaxy

The microstructure of p-n device structures grown by liquid-phase epitaxy (LPE) on CdZnTe substrates has been evaluated using transmission electron microscopy (TEM). The devices consisted of thick (∼21-μm) n-type layers and thin (∼1.6-μm) p-type layers, with final CdTe (∼0.5 μm) passivation layers. Initial observations revealed small defects, both within the n-type layer (doped with 8×10¹⁴/cm³ of In) and also within the p-type layer but at a much reduced level. These defects were not visible, however, in cross-sectional samples prepared by ion milling with the sample held at liquid nitrogen temperature. Only isolated growth defects were observed in samples having low indium doping levels (2×10¹⁴/cm³). The CdTe passivation layers were generally columnar and polycrystalline, and interfaces with the p-type HgCdTe layers were uneven. No obvious structural changes were apparent in the region of the CdTe/HgCdTe interfaces as a result of annealing at 250°C.     

Characterization of PbSnSe/CdTe/Si (211) Epilayers Grown by Molecular Beam Epitaxy

Narrow-bandgap PbSnSe has received much attention as a promising alternative material for mid- and long-wavelength high performance of infrared detection at relatively high operating temperatures owing to the weak composition dependence of its bandgap, which can intrinsically result in better uniformity. Additionally, it possesses a high dielectric constant that is anticipated to be much more tolerant to defects. In addition, its growth by molecular beam epitaxy (MBE) can be easily accomplished in comparison with HgCdTe and many III–V quantum well and superlattice materials. However, overcoming the high lattice and thermal mismatches between PbSnSe and CdTe/Si substrates and improving the crystalline quality of PbSnSe grown on CdTe/Si substrates are challenges that require further study. Additionally, interdiffusion between CdTe and PbSnSe can take place and lead to nonuniform distributions of elements in PbSnSe. Epitaxial crystal PbSnSe alloy films were grown by MBE and were investigated by scanning and high-resolution transmission electron microscopy (STEM/HRTEM). Etch pit density (EPD) measurements were done to determine the density of threading defects in the films. EPD measurements on PbSnSe surfaces gave values in the mid-10⁶ cm⁻² range. The dislocations exposed as etch pits were found to accumulate and form small-angle grain boundaries lined up along the () direction, which is the intersection line between (100) and (211) growth planes.