A large enhancement of the maximum drift velocity of electrons in the channel of a field-effect heterotransistor

It is shown that the optical-phonon momentum quantization in a GaAs quantum well resulting from the introduction of an InAs quantum-dot barrier layer provides for the elimination of inelastic scattering of electrons by optical phonons and, thus, makes the acceleration of electrons above the saturation drift velocity possible. It is shown experimentally that the maximum drift velocity of electrons in high electric fields in AlGaAs/GaAs heterostructure with InAs quantum-dot barriers introduced into the GaAs quantum well exceeds the saturation drift velocity in bulk GaAs by as much as a factor of 10. Such a rise in the maximum drift velocity of electrons ensures increased maximum current density, transconductance, and cutoff frequency of the heterostructure field-effect transistor with quantum dots.     

Saturated vertical drift velocity of electrons in silicon carbide polytypes

Saturated drift velocities of electrons in the direction parallel to the crystal axis have been determined for the first time for a number of silicon carbide polytypes (4H, 6H, 8H, and 21R) by investigating the current-voltage characteristics of novel three-terminal n ⁺-p-n ⁺ structures intentionally designed for the purpose. The values of these velocities are 3.3×10⁶, 2×10⁶, 1×10⁶, and 4×10³ cm/s respectively. These results are in qualitative agreement with a picture involving the miniband electronic structure caused by a natural superlattice in SiC. Experiments confirm the correlation between drift velocity and width of the first miniband in the various polytypes. Fiz. Tekh. Poluprovodn. 33, 586–589 (May 1999)     

Monte Carlo calculation of the drift velocity of electrons in n-GaAs

The drift velocity of electrons in n-GaAs has been calculated by a Monte Carlo technique for a nonparabolic central valley including the wave-vector dependence of the cell-periodic part of the Bloch functions in the     

Measurement of the high-field drift velocity of electrons in inversion layers on silicon

A new technique is described for the study of high-field transport along semiconductor interfaces. The technique involves observation of the time-of-flight of a packet of carriers across a region of uniform tangential electric field at the semiconductor surface. We use the technique to measure the drift velocity of electrons along the Si-SiO2interface for tangential fields in the range 2.5-4.0 kV/cm. Drift velocities as high as 8.5 × 10⁶cm/s are observed; these values are almost 40% higher than previously reported in the literature.     

Maximum drift velocity of electrons in selectively doped InAlAs/InGaAs/InAlAs heterostructures with InAs inserts

The dependence of the electron mobility and drift velocity on the growth conditions, thickness, and doping of an InAs insert placed at the center of the quantum well in a selectively doped InAlAs/InGaAs/InAlAs heterostructure has been investigated. Record enhancement of the maximum drift velocity to (2–4) × 10⁷ cm/s in an electric field of 5 × 10³ V/cm has been obtained in a 17-nm-wide quantum well with an undoped 4-nm-thick InAs insert. In the structures with additional doping of the InAs insert, which facilitates an increase in the density of electrons in the quantum well to 4.0 × 10¹² cm^?2, the maximum drift velocity is as high as 2 × 10⁷ cm/s in an electric field of 7 × 10³ V/cm.     

A study of temperature field in a GaN heterostructure field-effect transistor

This paper presents a three-dimensional finite element based heat transfer model for a Gallium Nitride-based Heterostructure Field-Effect Transistor (henceforth referred to as GaN HFET). Analyses were carried out to study the distribution of temperature in the HFET under steady-state conditions for two different steady-current inputs. Two different substrates for the HFET, sapphire and silicon carbide (SiC), were studied. The paper discusses the effect of using a heat sink and also that of using reasonable contact resistances on the substrate side of the HFET, on the temperature profile. In all cases, the gate region of the HFET was found to attain the highest temperature. Subsequent experiments to validate the results of the computational analysis were carried out at the Oakridge National Laboratories, Knoxville, and are also presented in this paper.     

Measurement of drift velocity of electrons in silicon by exciting a diode structure with short superradiant laser pulses

The drift velocity of electrons in high-resistivity silicon was measured by studying the current pulses induced in a surface barrier diode by subnanosecond light pulses from a super-radiant gas laser. Measurements were made for electric field strengths up to ≃1.2 × 10⁴V/cm, at room temperature. The low-field mobility value obtained was 1400 ±5O cm²/V.s. The decrease of mobility for higher fields is in substantial agreement with previous results though the nonlinearity at high field is somewhat smaller than that found in other time of flight measurements. Analytical expressions that approximate the experimental trend of mobility versus field are briefly discussed.     

SiGe drift base bipolar transistor with self-aligned selectiveCVD-tungsten electrodes

A new device and process technology is developed for high-speed SiGe epitaxial base transistors. A 60-nm SiGe epitaxial base and the selectively ion-implanted collector (SIC) structure enhance the cutoff frequency to about 40 GHz. Base resistance is minimized to 165 Ω (emitter area: 0.2×3 μm²), and an f_MAX of 37.1 GHz is achieved by employing 0.2-μm EB lithography for the emitter window, selective CVD tungsten for the base electrode and a self-aligned oxide side wall for the emitter-to-base separation. Circuit simulations predict that this device could reduce the ECL gate delay to below 20 ps     

Theoretic curves of drift transistor current gain

Intrinsic common-base, short-circuit current gain analysis of drift transistors may be aided by means of a simplified approximation equation. The accuracy of the equation may be controlled by the investigator. A graphic solution for determining this parameter of moderate drift field transistors may be obtained by using the arcs of circles. The interrelation between the graphic analysis and the theoretic approximation provides a flexible yet accurate method of analyzing this parameter.     

A comment on the calculation of variation of drift transistor cut-off frequency with collector voltage

The formula commonly employed for calculating the internal cut-off frequency ƒ of a drift transistor is quite inadequate for estimating the variation of ƒ with collector voltage. It is shown that a good approximation to the rigorous treatment can be derived employing the charge control concept.     

A complementary heterostructure field effect transistor technologybased on InAs/AlSb/GaSb

A complementary heterojunction field effect transistor technology based on the InAs/AlSb/GaSb system is proposed. The structure is formed by the vertical integration of InAs n-channel and GaSb p-channel HFET devices. The superior transport properties of electrons in InAs and holes in GaSb and their band offsets to AlSb or AlSbAs yield devices with transconductances much greater than AlGaAs/GaAs n- and p-channel HFETs. It is shown that a complementary circuit fabricated from these devices could provide room-temperature performance up to six times greater than that predicted for AlGaAs/GaAs complementary circuits     

Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance

The double-gate control of silicon-on-insulator (SOI) transistors is used to force the whole silicon film (interface layers and volume) in strong inversion. This original method of transistor operation offers excellent device performance, in particular great increases in subthreshold slope, transconductance, and drain current. A simulation program and experiments on SIMOX structures are used to study the new device.     

Saturation velocity of electrons in GaAs

The saturation velocity of electrons in n-GaAs has been deduced from the v/E characteristic over a temperature range 130-400 K. The experimental values are compared with those predicted by a model assuming the velocity to be limited by intervalley scattering in the     

Photoeffect in junction field effect transistors with drift velocity saturation

Photocurrents in junction field effect transistors under homogeneous illumination are analyzed theoretically taking into account drift velocity saturation by (i) the Trofimenkoff approximation, and (ii) an abrupt transition from a linear velocity-field relation to saturation. With the drain biased into saturation, the source current decreases more steeply with illumination than the drain current increases, the assymetry being a function of saturation drift velocity. At high illumination intensities drain current saturates with illumination intensity.     

Optimization of maximum oscillation frequency of a bipolar transistor

In this communication we express the maximum oscillation frequency of a bipolar transistor as a function of vertical delay times. An optimum design criteria is hence derived. Computed results are given for a microwave power transistor.     

Fabrication and operation of a velocity modulation transistor

The velocity modulation transistor (VMT) has two channels with differing velocities. Small vertical distances between these channels can be achieved using epitaxial growth, opening the opportunity for higher speed than the high electron mobility transistor (HEMT). Experimental results from a VMT realized using the AlGaAs/GaAs system are given. The VMT channel carrier population as a function of input gate voltage is calculated for HEMTs and VMTs using a one-dimensional (1-D) numerical model. This supports a proposed equivalent circuit model for the VMT, which is used to compare VMT performance to that of HEMTs. A noise model for the VMT is developed, and this model suggests that HEMT-like noise is achievable with good carrier confinement. The dual gate, dual-channel VMT, while more complex than the HEMT, may be useful in applications such as analog-to-digital converters (ADCs) and microwave amplifiers     

Calculation of electron drift velocity at Si avalanche

In evaluating the electron drift velocity at Si avalanche, the electron distribution is obtained by solving the Boltzmann transport equation in the maximum anisotropy truncation (MAT) approximation of Baraff. Improvements are made to the MAT procedure so that the symmetrical part of the distribution function can be obtained in a straightforward manner. The temperature dependence of electron drift velocity is studied by including both optical phonon emission and absorption rather than emission alone. The calculated electron drift velocity varies from1 times 10^{7}to2.9 times 10^{7}cm/s at Si avalanche.     

New negative resistance regime of heterostructure insulated gate transistor (HIGFET) operation

We present experimental evidence for negative differential resistance in n-channel heterostructure insulated gate transistors (HIGFET's) at high gate voltages. The negative resistance is explained by an increase in the gate current related to the electron heating in the two-dimensional electron gas. This mechanism is similar to that causing the negative differential resistance in NERFET's. However, much smaller parasitic capacitance in HIGFET's may allow us to reach higher frequencies of operation.     

Enhanced heterostructure field effect transistor CAD model suitablefor simulation of mixed mode circuits

We describe a new enhanced model for deep submicron heterostructure field effect transistors (HFET's) suitable for implementation in computer aided design (CAD) software packages such as SPICE. The model accurately reproduces both above-threshold and subthreshold characteristics of both n- and p-channel deep submicron HFET's over the temperature range 250-450 K. The current-voltage (I-V) characteristics are described by a single, continuous, analytical expression for all regimes of operation, thereby improving convergence. The physics-based model includes effects such as velocity saturation in the channel, drain-induced barrier lowering (DIBL), finite output conductance in saturation, frequency dispersion, and temperature dependence. The output resistance and the transconductance are accurately reproduced, making the model suitable for simulation of mixed mode (digital/analog) circuits. The model has been extensively verified against experimental data for two HFET technologies with gate lengths down to 0.3 μm