应用于柔性电子的超薄硅基芯片研究进展北大核心

柔性电子技术在近些年得到了快速发展，越来越多的柔性电子系统需要柔性、高性能的集成电路来实现数据处理和通信。通过减薄硅基芯片可以获得高性能的柔性集成电路，但是硅基芯片减薄之后的性能有可能发生变化，并且在制备、转移、封装的过程中极易产生缺陷或者破碎，导致芯片性能退化甚至失效。因此，超薄硅基芯片的制备工艺和柔性封装技术对于制备高可靠性的柔性硅基芯片十分关键。在此背景下，文章综述了柔性硅基芯片的力学和电学特性研究进展，介绍了几种超薄硅基芯片的减薄工艺和柔性封装前沿技术，并对超薄硅基芯片在柔性电子领域的应用和发展进行了总结和展望，为柔性硅基芯片技术的进一步研究提供参考。     

A review on thermal cycling and drop impact reliability of SAC solder joint in portable electronic products

Currently, the portable electronic products trend to high speed, light weight, miniaturization and multifunctionality. In that field, solder joint reliability in term of both drop impact and thermal cycling loading conditions is a great concern for portable electronic products. The transition to lead-free solder happened to coincide with a dramatic increase in portable electronic products. Sn–Ag–Cu (SAC) is now recognized as the standard lead free solder alloy for packaging interconnects in the electronics industry. The present study reviews the reliability of different Ag-content SAC solder joints in term of both thermal cycling and drop impact from the viewpoints of bulk alloy microstructure and tensile properties. The finding of the study indicates that the best SAC composition for drop impact performance is not necessarily the best composition for optimum thermal cycling reliability. The level of Ag-content in SAC solder alloy can be an advantage or a disadvantage depending on the application, package and reliability requirements. As a result, most component assemblers are using at least two (and in many cases even more) lead-free solder sphere alloys to meet various package requirements.     

电子行业中复合材料导热模型及机理研究进展

随着电子信息产业的快速发展,电子器件和封装材料的散热及综合性能要求越来越高,因此寻求高导热、高性能的复合材料成为电子行业中一个研究趋势。从导热模型、导热机理、如何提高热导率三个方面对电子工业领域中所用高分子复合材料进行了总结。     

Adhesion evaluation on low-cost alternatives to thermosetting epoxy encapsulants

The thermosetting epoxy curing systems have been widely used as encapsulants in the electronic packaging industry. With the continual evolving of electronic product markets, material suppliers have been challenged to provide more options to meet the requirements of advanced, yet cost effective, packaging solutions. In this paper, two low-cost alternative materials have been investigated experimentally regarding their adhesion and reliability performance, and these have then been compared with the thermosetting epoxy systems. One of the materials is thermoplastic bisphenol A epoxy/phenoxy resin, and the other is an interpenetrating polymer network composed of an epoxy curing component and a free radical polymerizable component. Some formulations of the materials being studied could exhibit excellent adhesion, durability and application reliability. While reworkability is expected for these materials, they are promising as cost effective encapsulants for electronic packaging, and may be applied with appropriate processing techniques.     

无焊剂软钎焊技术研究

无焊剂软钎焊技术因其焊接过程中无焊剂残留,被广泛应用于光电器件和芯片倒装焊等方面。首先对无焊剂软钎焊的原理和工艺进行了阐述,并指出气氛保护和等离子处理是无焊剂软钎焊的两个主要技术途径。基于上述分析,采用无焊剂软钎焊工艺开展钎料润湿性研究。结果表明,还原气氛保护和等离子处理后,焊料的润湿铺展性能显著提高。     

An overview of today's thick-film technology

How thick-film systems are used in all facets of today's electronic industry, starting with their initial application in the computer and defense industries, is described. As the state of the art grew, composition suppliers broadened their lines, developing new higher performance materials to meet changing and more sophisticated packaging requirements. The present technology offers advantages of simple processing, fast and inexpensive tooling systems, economy, quick tumaround time between need and prototype, using wider tolerance active devices, high reliability, and multilevel circuit capabilities. As a result, virtually all sectors of today's electrical and electronics industries are turning to solid-state systems which utilize thick-film hybrid microcircuitry. Consumer and automotive electronic uses are exhibiting the highest rate of new thick-film circuitry adoption at the present time. Industrial usage for high power, measuring and control systems, is also increasing rapidly, and thick-film hybrid circuits are strong candidates to replace electromechanical switching devices. The use of. hybrid microcircuits is forecasted to double or triple current usage on a worldwide basis by 1975. In the future, thick films are expected to play an ever increasing role in the packaging of semicpnductor devices because of their low production cost and high performance advantages.     

Plastic encapsulated components for cars

Thermal management in electronics packaging is important. Thermal stress greatly affects reliability and aging of electronic circuits. Our group developed a thermal simulation tool named TRESCOM for investigating thermal problems in electronic packaging. We used this tool for steady-state and dynamic analyses of the thermal qualities of PLCC and CLCC components. Our investigation demonstrated the surprising result that the thermal performance of the plastic encapsulated components is superior to hermetically sealed ceramic components. We conclude that plastic packages are reliable and can compete with ceramic packages at the elevated temperatures that are found in automotive applications     

复合双性LTCC材料基础研究

随着电子技术在自动化、工业控制、医学、航天航空和日常生活等领域的广泛应用,高密度、宽温域、小尺寸、多功能、高品质等特性日益成为其发展的必然趋势,同时这些特性给传统封装技术及工艺带来了巨大的挑战。在众多的封装技术中,低温共烧陶瓷LTCC(Low Temperature Co-fired Ceramic)技术成为了国际研究的焦点,因为利用LTCC技术制备的产品不仅能具备高电流密度、小体积,而且还具备高可靠性和优良的电性能、传输特性及密封性。LTCC技术是一种先进的混合电路封装技术。它将四大无源器件,即变压器(T)、电容器(C)、电感器(L)和电阻器(R)集成,配置于多层布线基板中,与有源器件(如:功率MOS、晶体管和IC电路模块等)共同集成为一完整的电路系统。因此LTCC技术又称为混合集成技术,它能有效地提高电路的封装密度及系统的可靠性。笔者围绕LTCC技术中的低温共烧铁氧体LTCF(Low Temperature Co-fired Ferrite)材料,采用理论、实验及应用三位一体的研究模式,开发了一种新型LTCC复合介质材料,不但对该材料的复合机理进行了理论模拟而且对其在LTCC滤波器中的应用展开了研究。笔者在理论模型、材料制备和器件设计上做了一些探索性和创新性的工作,具体内容如下:(1)探索性地建立了针对LTCC陶瓷的低温烧结模型。模型基于液相烧结理论,以液相在晶粒边界引起的毛细管压力及溶解–淀析过程中化学势能的变化为烧结驱动力,将烧结温度、时间与烧结后的最终晶粒大小、相对密度联系起来,模拟出低温烧结动态过程中相对密度的变化趋势。(2)首次提出铁电–铁磁复合材料的复合理论并给予了系统的分析。讨论了复合材料中两相成分的化学结构及电磁性能在理论上对复合可能性的影响,根据材料的微观结构建立了复合模型,模型中假设铁电相均匀分布于铁磁相晶粒表面,并和气孔一起形成非磁性薄层将铁磁晶粒之间隔断,使铁磁颗粒孤立。通过对复合结构中铁磁晶粒内场变化的分析,推导出复合材料铁电/铁磁成分比与复合磁导率的关系方程;另外,利用微观结构中电流流通的等效电路,推导得到不同铁电/铁磁成分比时复合材料复数介电常数与频率的关系表达式。(3)研究了工艺条件对材料电磁性能的影响。按照工艺流程改变工艺参数预烧温度、二次球磨时间、烧结曲线中升温降温速度、烧结温度和保温时间,通过SEM、XRD等分析手段了解改变工艺参数对铁氧体材料微观结构的影响规律,通过对材料介电常数频谱、磁导率频谱及品质因数的测量得知工艺参数对材料电磁性能的影响规律,根据实验数据结果得到最佳铁氧体烧结工艺参数。(4)研究了不同掺杂离子及助熔剂的加入对低温烧结铁氧体LTCF材料的微观结构及电磁性能影响。首先研究了不同MnCO3和CuO含量对NiZn铁氧体烧结特性、微观结构及电磁性能的影响,首次发现了掺杂Mn离子的NiZn铁氧体其电磁性能对烧结温度具有敏感性。其次研究了不同助熔剂Bi2O3、WO3和Nb2O5对NiCuZn铁氧体烧结特性、微观结构及电磁性能的影响,实验揭示W6+对材料微观结构的改善;最后对低温NiCuZn铁氧体进行改性掺杂,研究稀土氧化物CeO2对其微观结构及电磁性能的影响,并给出NiCuZn铁氧体掺杂稀土元素时的磁频谱及介频谱。(5)开发了一新型的基于不同低温烧结NiCuZn铁氧体与高介电常数(BaTiOk+X)钙钛矿的具有电感、电容双性的铁电–铁磁复合材料,研究了不同铁电–铁磁含量对各组复合材料微观结构及电容电感双性的影响。并研究了不同助熔剂Bi2O3、WO3和Nb2O5对其烧结特性、微观结构及电容电感双性的影响。最后对复合材料进行稀土掺杂改性,研究稀土氧化物CeO2对其微观结构及电容电感双性的影响。(6)设计并制作出两种使用LTCC复合双性材料的3G通讯设备用带通滤波器。采用Ansoft HFSS电磁仿真软件对所建立的滤波器模型进行模拟仿真,通过调节滤波器结构参数使滤波器各性能指标达到要求,并实现生产制备。制得带通中心频率3.5 GHz,插损<2.8 dB,带宽>400 MHz,阻带衰减大于35 dB的微带式带通滤波器和带通中心频率1.4 GHz,插损<3 dB,带宽>160 MHz,阻带衰减大于30 dB的LC式带通滤波器。     

Modern IC packaging trends and their reliability implications

Reliability aspects are of extreme importance for assembly and packaging, which has become a limiting factor for both cost and performance of electronic systems. On the one hand reliability can be negatively influenced by modern front-end and packaging technology, on the other hand new applications and corresponding field requirements can result in the need for new reliability tests e.g. for mobile devices. Today the three main package trends for mobile devices towards ongoing miniaturization and higher system integration are ball grid array type packages, leadless packages, and wafer level type packages. We present reliability implications based on examples of failures in these modern packaging technologies. We highlight the importance of design for reliability based on results of simulations for a leadless package. For the future it is necessary that test conditions must follow the field requirements to guarantee optimum reliability results.     

Processing and properties of CVD diamond for thermal management

One of the many remarkable properties of diamond is its thermal conductivity, about five times that of copper and the highest of all known materials. The high thermal conductivity in combination with the relative ease of diamond film growth by chemical vapor deposition process makes the material suitable for many applications such as thermal management in high power electronic circuits. For thermal managements applications, various processing steps are needed for the diamond films, such as the metallization for reliable solder bonding, metallurgical processes for planarizing of the faceted growth surface and removal of fine-grained diamond regions with poor thermal conductivity. This paper will review the properties and processing of diamond films for thermal management applications.     

Simulation and measurement of the flip chip solder bumps with a Cu-plated plastic core

With the aim to miniaturize and to reduce the cost, the increasing demand, regarding to advanced 3D-packages as well as high performance applications, accelerates the development of 3D-silicon integrated circuits. The trend to smaller and lighter electronics has highlighted many efforts towards size reduction and increased performance in electronic products. The radio frequency (RF) performances are limited by parasitic effects due to the resistor–inductor–capacitor (RLC) network, between the wire bond connections from the dies to the lead frame. The use of flip-chip bonding technology for very fine pitch packaging allows high integration and limits parasitic inductances. Electromigration (EM) and thermomigration (TM) may have serious reliability issues for fine-pitch Pb-free solder bumps in the flip-chip technology used in consumer electronic products. A possibility to extend the reliability is the use of plastic ball in the solder bumps. Bumps containing a plastic solder balls have an excellent reliability. Using a plastic ball with a low Young modulus, the solder hardness is moderated and the stress on a ball is relaxed. Due to this, the stress does not concentrate on the solder joint which prolongs the lifetime. In this investigation, the thermal–electrical–mechanical coupling of electromigration on bumps containing a plastic solder is studied.     

Thermal properties of diamond/copper composite material

Thermal considerations are becoming increasingly important for the reliabilities of the electronics parts as the electronics technologies make continuous progress such as the higher output power of laser diodes or the higher level of integration of ICs. For this reason the desire for improving thermal properties of materials for electronics component parts is getting stronger and the material performance has become a critical design consideration for packages. To meet the demands for a high performance material for heat spreader materials and packages, a new composite material composed of diamond and copper was successfully manufactured under high pressure and high temperature. The effects of diamond particle sizes and the volume fractions of diamond on both thermal conductivity and the coefficient of thermal expansion (CTE) were investigated. The thermal conductivity of the composite material was dependent on both the particle size and the volume fraction of diamond, while the CTE was dependent only on the volume fraction of diamond. At the higher diamond volume fraction, the experimentally obtained thermal conductivities of the composite materials were above the theoretically expected values and the experimentally obtained CTE were between the two theoretical Kerner lines. This may be due to the fact that at the higher diamond volume fraction the diamond particles are closely packed to form bondings between each particle. The composite of diamond and copper have a potential for a heat spreading substrate with high performance and high reliability because not only its thermal conductivity is high but its coefficient of thermal expansion can be tailored according to a semiconductor material of electronics devices.     

Thermal management of power electronics modules packaged by a stacked-plate technique

The research presented in this paper is part of a multidisciplinary research program of the Center for Power Electronics Systems at Virginia Tech. The program supported by the Office of Naval Research focuses on the development of innovative technologies for packaging power electronics building blocks. The primary objective of this research is to improve package performance and reliability through thermal management, i.e., reducing device temperatures for a given power level. The task of thermal management involves considering trade-offs in the electrical design, package layout and geometry, materials selection and processing, manufacturing feasibility, and production cost. Based on the electrical design of a simple building block, samples of packaged modules, rated at 600 V and 3.3 kW, were fabricated using a stacked-plate technique, termed metal posts interconnected parallel plate structure (MPIPPS). The MPIPPS technique allows the power devices to be interconnected between two direct-bond copper substrates via the use of metal posts. Thermal modeling results on the MPIPPS packaged modules indicate that the new packaging technique offers a superior thermal management means for packaging power electronics modules.     

Adhesion measurement for electronic packaging applications usingdouble cantilever beam method

Multilayers and interfaces are ubiquitous in microelectronics devices, interconnect and packaging structures. As the interface integrity becomes the major concern of performance, yield, and reliability, the need to evaluate the fracture and delamination behavior of various interfaces increases. This work focused on quantifying interfacial adhesion performance of a typical electronics packaging structure, flip-chip-on-organic-substrate. A series of experiments and analyzes were conducted to investigate the adhesion and fracture behaviors of the underfill/silicon and underfill/organic substrate interfaces. The experimental techniques for the interfacial fracture experiments were developed to produce the double-cantilever-beam (DCB) specimens and to establish a reproducible testing protocol. To extract the interfacial fracture energies, a closed-form solution was developed based on a beam-on-elastic-foundation model. A two-dimensional elastoplastic finite element analysis (FEA) model was also implemented to examine effects of mode-mixity, thermal/residual stresses, and underfill plasticity. The techniques allow for reproducible determination of underfill/printed circuit board (PCB) and underfill/silicon chip interfacial adhesion strength. The developed techniques are also readily applicable to evaluate interfacial adhesion performance for many other similar electronic packaging systems. This provides capabilities in optimizing material selections and process conditions to improve interfacial adhesion performance, Additionally, the interfacial fracture energy measured with high accuracy can provide a basis for realistic modeling of thermo-mechanical reliability of electronic components     

环氧塑封料中填充剂的作用和发展

环氧塑封料占据整个半导体封装市场的90％左右,而填充剂含量占环氧塑封料的60％～90％,因此填充剂的性能直接影响环氧塑封料的加工性能、机械性能、导热性能和半导体器件的封装工艺性能、导热性能、可靠性能等。另外,当今社会电子技术日新月异,集成电路正向着超大规模、超高速、高密度、大功率、多功能、绿色环保化的方向发展,因此对环氧塑封料的性能要求愈来愈高,相应的填充剂性能也有了许多新的要求,并且也出现了许多新型填充剂。文中详细地介绍了环氧塑封料中填充剂的作用,各种填充剂对环氧塑封料和封装器件的性能影响以及环氧塑封料中填充剂的分类和发展。     

汽车电子产品环境与可靠性试验标准研究

汽车电子产品的可靠性,直接关系到整车的安全性和可靠性,因此其测试要求也比较严格。介绍了汽车电子产品环境与可靠性试验所采用的标准,并对相应标准中的试验项目进行了分析研究;同时,举例分析了试验顺序方案的制定方法。     

Physical limits and lifetime limitations of semiconductor devices at high temperatures

In many applications of electronics, a growing demand for devices being capable of operating at increased temperatures is developing. In automotive and aerospace industry, the replacement of mechanical or hydraulic systems by electronics requires harsh environmental conditions. Furthermore, the oil-well business, military, industrial, chemical, and consumer electronics show increasing interest in higher operating temperatures.In this paper, the influence of temperature on semiconductor device characteristics is discussed with regard to physical limits for device operation. Different semiconductor materials are compared with respect to high temperature electronics, and an overview of the state-of-the-art of high-temperature devices is given. With standard silicon technology, high operation temperatures (200°C) can be reached with reduced performance, the use of SiC enables electronic devices for much higher temperatures (600°C). For practical use, device lifetime becomes the limiting factor at increased temperatures, especially chip metallisation systems and packaging technologies are critical factors for device lifetime in most cases.     

AuSn合金在电子封装中的应用及研究进展

AuSn合金焊料因其具有优良的抗腐蚀、抗疲劳特性和高强度、高可靠性等优点而在气密性封装、射频和微波封装、发光二极管(LED)、倒装芯片(Flip-chip)、激光二极管(LD)、芯片尺寸封装(CSP)等方面得到广泛的应用。从电子封装无铅化和合金焊料的可靠性等方面,对AuSn合金焊料的物相结构和材料性能进行了讨论,并对AuSn合金焊料在电子封装中的应用及其研究进展进行了总结和展望。     

Chip-scale packaging of power devices and its application inintegrated power electronics modules

A power electronics packaging technology utilizing chip-scale packaged (CSP) power devices to build three-dimensional (3-D) integrated power electronics modules (IPEMs) is presented in this paper. The chip-scale packaging structure, termed die dimensional ball grid array (D²BGA), eliminates wire bonds by using stacked solder joints to interconnect power chips. D²BGA package consists of a power chip, inner solder caps, high-lead solder balls, and molding resin. It has the same lateral dimensions as the starting power chip, which makes high-density packaging and module miniaturization possible. This package enables the power chip to combine excellent thermal transfer, high current handling capability, improved electrical characteristics, and ultralow profile packaging. Electrical tests show that the V_CE(sat) and on-resistance of the D²BGA high speed insulated-gate-bipolar transistors (IGBTs) are improved by 20% and 30% respectively by eliminating the device wirebonds and other external interconnections, such as the leadframe. In this paper, we present the design, reliability, and processing issues of D²BGA package, and the implementation of these chip-scale packaged power devices in building 30 kW half-bridge power converter modules. The electrical and reliability test results of the packaged devices and the power modules are reported     

Advanced IC packaging for the future applications

The performance of electronic equipment is improving rapidly. Portable electronic equipment requires smaller and thinner packaging systems for saving space and miniaturization. In addition, highly integrated, high-speed applications demand improved electrical performance to minimize noise effects. As a result of these considerations, the role of IC packaging has expanded from its traditional role of protecting the integrity and performance of an IC, to being a central factor in the development of electronic system concepts. In developing the optimum system, packaging technology must be a prime design consideration to ensure optimum performance, reliability, and cost. Soldering technology and Printed Wiring Board (PWB) routing density are two of the major technological issues facing miniaturized packaging systems today. Chip Scale Package (CSP), which is a new concept in packaging technology has been introduced. This is an ideal technology to enable the design and manufacture of the next generation of electronic equipment, while overcoming many of the technological issues facing system development