Carrier mobility in two-dimensional disordered hopping systems

A model of the equilibrium 2D hopping mobility in a disordered organic semiconductor is formulated for arbitrary charge carrier densities and arbitrary temperatures. The calculated dependence of the 2D mobility upon inverse temperature is compared with experimental data obtained on 2D carrier transport in poly(3-hexylthiophene) thin film field-effect transistors.     

Influence of Dielectric Surface Chemistry on the Microstructure and Carrier Mobility of an n‐Type Organic Semiconductor

This paper examines the microstructure evolution of 3,4,9,10‐perylene‐tetracarboxylic bis‐benzimidazole (PTCBI) thin films resulting from conditions imposed during film deposition. Modification of the silicon dioxide interface with a hydrophobic monolayer (octadecyltrichlorosilane (OTS‐18)) alters the PTCBI growth habit by changing the unit cell contact plane. PTCBI films deposited on oxide surface have an orientation of (011), while films atop OTS‐treated oxide surface have a preferred orientation of (001). The quality of the self assembled monolayer does not appear to influence the PTCBI growth preference significantly yet it enhances the carrier mobility, suggesting that charge traps are adequately passivated due to uniform monolayer coverage. High‐quality monolayers result in n‐type carrier mobility values of 0.05 cm²V^–1s^–1 Increasing the substrate temperature during PTCBI film deposition correlates with an increase in mobility that is most significant for films deposited on OTS‐treated surface.     

Rational Design of Organic Semiconductors for Texture Control and Self‐Patterning on Halogenated Surfaces

Understanding the interactions at interfaces between the materials constituting consecutive layers within organic thin‐film transistors (OTFTs) is vital for optimizing charge injection and transport, tuning thin‐film microstructure, and designing new materials. Here, the influence of the interactions at the interface between a halogenated organic semiconductor (OSC) thin film and a halogenated self‐assembled monolayer on the formation of the crystalline texture directly affecting the performance of OTFTs is explored. By correlating the results from microbeam grazing incidence wide angle X‐ray scattering (μGIWAXS) measurements of structure and texture with OTFT characteristics, two or more interaction paths between the terminating atoms of the semiconductor and the halogenated surface are found to be vital to templating a highly ordered morphology in the first layer. These interactions are effective when the separating distance is lower than 2.5 d_w, where d_w represents the van der Waals distance. The ability to modulate charge carrier transport by several orders of magnitude by promoting “edge‐on” versus “face‐on” molecular orientation and crystallographic textures in OSCs is demonstrated. It is found that the “edge‐on” self‐assembly of molecules forms uniform, (001) lamellar‐textured crystallites which promote high charge carrier mobility, and that charge transport suffers as the fraction of the “face‐on” oriented crystallites increases.     

Estimation of Electrical Parameters of OD Organic Semiconductor Diode from Measured I‐V Characteristics

In this paper the effect of temperature on the electrical properties of organic semiconductor disperse orange dye 25 (OD) have been examined. Thin films of OD have been deposited on In₂O₃ substrates using a centrifugal machine. DC current‐voltage (I‐V) characteristics of the fabricated devices (Al/OD/In2O3) have been evaluated at varying temperatures ranging from 40 to 60°C. A rectification behavior in these devices has been observed such that the rectifying ratio increases as a function of temperature. I‐V characteristics observed in Al/OD/In2O3 devices have been classified as low temperature (≤ 50°C) and high temperature characteristics (approximately 60°C). Low temperature characteristics have been explained on the basis of the charge transport mechanism associated with free carriers available in OD, whereas high temperature characteristics have been explained on the basis of the trapped space‐charge‐limited current. Different electrical parameters such as traps factor, free carrier density, trapped carrier density, trap density of states, and effective mobility have been determined from the observed temperature dependent I‐V characteristics. It has been shown that the traps factor, effective mobility, and free carrier density increase with increasing values of temperature, whilst no significant change has been observed in the trap density of states.     

High‐Performance Phototransistors Based on Single‐Crystalline n‐Channel Organic Nanowires and Photogenerated Charge‐Carrier Behaviors

The photoelectronic characteristics of single‐crystalline nanowire organic phototransistors (NW‐OPTs) are studied using a high‐performance n‐channel organic semiconductor, N,N′‐bis(2‐phenylethyl)‐perylene‐3,4:9,10‐tetracarboxylic diimide (BPE‐PTCDI), as the photoactive layer. The optoelectronic performances of the NW‐OPTs are analyzed by way of their current–voltage (I–V) characteristics on irradiation at different wavelengths, and comparison with corresponding thin‐film organic phototransistors (OPTs). Significant enhancement in the charge‐carrier mobility of NW‐OPTs is observed upon light irradiation as compared with when performed in the dark. A mobility enhancement is observed when the incident optical power density increases and the wavelength of the light source matches the light‐absorption range of the photoactive material. The photoswitching ratio is strongly dependent upon the incident optical power density, whereas the photoresponsivity is more dependent on matching the light‐source wavelength with the maximum absorption range of the photoactive material. BPE‐PTCDI NW‐OPTs exhibit much higher external quantum efficiency (EQE) values (≈7900 times larger) than thin‐film OPTs, with a maximum EQE of 263 000%. This is attributed to the intrinsically defect‐free single‐crystalline nature of the BPE‐PTCDI NWs. In addition, an approach is devised to analyze the charge‐transport behaviors using charge accumulation/release rates from deep traps under on/off switching of external light sources.     

Oligothiophenes in organic thin film transistors – Morphology,stability and temperature operation

We have investigated a series of oligothiophenes in organic thin film transistors (TFTs), with special emphasis on their thin film morphology related to device performance and application requirements. The transistor performance was studied for devices fabricated at different substrate temperatures during semiconductor deposition (ranging from room temperature to 120 °C). A significant dependence of thin film morphology on the substrate temperature was observed, whereas the charge carrier mobility in devices occurs almost unaffected. We have tested the long-term stability of 78 transistor devices (shelf-life in ambient conditions) over a period up to 100 days. Only a small degradation in mobility by less than one order of magnitude was observed. Investigations at elevated temperatures during TFT operation (room temperature to 105 °C) show that devices with α,α′-hexylsexithiophene (Hex-6T-Hex) degrade in their charge carrier mobility by a factor of 8, but completely recover to their initial value of 0.7 cm²/Vs after a short period of storage at room temperature in ambient conditions.     

Ultrahigh Tunability of Room Temperature Electronic Transport and Ferromagnetism in Dilute Magnetic Semiconductor and PMN‐PT Single‐Crystal‐Based Field Effect Transistors via Electric Charge Mediation

Multiferroic heterostructures composed of complex oxide thin films and ferroelectric single crystals have aroused considerable interest due to the electrically switchable strain and charge elements of oxide films by the polarization reversal of ferroelectrics. Previous studies have demonstrated that the electric‐field‐control of physical properties of such heterostructures is exclusively due to the ferroelectric domain switching‐induced lattice strain effects. Here, the first successful integration of the hexagonal ZnO:Mn dilute magnetic semiconductor thin films with high performance (111)‐oriented perovskite Pb(Mg_1/3Nb_2/3)O₃‐PbTiO₃ (PMN‐PT) single crystals is reported, and unprecedented charge‐mediated electric‐field control of both electronic transport and ferromagnetism at room temperature for PMN‐PT single crystal‐based oxide heterostructures is realized. A significant carrier concentration‐tunability of resistance and magnetization by ≈400% and ≈257% is achieved at room temperature. The electric‐field controlled bistable resistance and ferromagnetism switching at room temperature via interfacial electric charge presents a potential strategy for designing prototype devices for information storage. The results also disclose that the relative importance of the strain effect and interfacial charge effect in oxide film/ferroelectric crystal heterostructures can be tuned by appropriately adjusting the charge carrier density of oxide films.     

High‐Density Carrier Accumulation in ZnO Field‐Effect Transistors Gated by Electric Double Layers of Ionic Liquids

Very recently, electric‐field‐induced superconductivity in an insulator was realized by tuning charge carrier to a high density level (1 × 10¹⁴ cm^?2). To increase the maximum attainable carrier density for electrostatic tuning of electronic states in semiconductor field‐effect transistors is a hot issue but a big challenge. Here, ultrahigh density carrier accumulation is reported, in particular at low temperature, in a ZnO field‐effect transistor gated by electric double layers of ionic liquid (IL). This transistor, called an electric double layer transistor (EDLT), is found to exhibit very high transconductance and an ultrahigh carrier density in a fast, reversible, and reproducible manner. The room temperature capacitance of EDLTs is found to be as large as 34 µF cm^?2, deduced from Hall‐effect measurements, and is mainly responsible for the carrier density modulation in a very wide range. Importantly, the IL dielectric, with a supercooling property, is found to have charge‐accumulation capability even at low temperatures, reaching an ultrahigh carrier density of 8×10¹⁴ cm^?2 at 220 K and maintaining a density of 5.5×10¹⁴ cm^?2 at 1.8 K. This high carrier density of EDLTs is of great importance not only in practical device applications but also in fundamental research; for example, in the search for novel electronic phenomena, such as superconductivity, in oxide systems.     

Benzodithiophene Copolymer—A Low‐Temperature,Solution‐Processed High‐Performance Semiconductor for Thin‐Film Transistors

Poly(4,8‐didodecyl‐2,6‐bis‐(3‐methylthiophen‐2‐yl)‐benzo[1,2‐b:4,5‐b′]dithiophene) self‐assembled on appropriate substrates from solution and formed highly structured thin films at low temperatures. As an as‐prepared thin‐film semiconductor without thermal annealing, it exhibited excellent field‐effect transistor properties with mobility of ～ 0.15 cm² V^–1 s^–1 in thin‐film transistors.     

Entanglement of Conjugated Polymer Chains Influences Molecular Self‐Assembly and Carrier Transport

The influence of polymer entanglement on the self‐assembly, molecular packing structure, and microstructure of low‐M_w (lightly entangled) and high‐M_w (highly entangled) poly (3‐hexylthiophene) (P3HT), and the carrier transport in thin‐film transistors, are investigated. The polymer chains are gradually disentangled in a marginal solvent via ultrasonication of the polymer solution, and demonstrate improved diffusivity of precursor species (coils, aggregates, and microcrystallites), enhanced nucleation and crystallization of P3HT in solution, and self‐assembly of well‐ordered and highly textured fibrils at the solid–liquid interface. In low‐M_w P3HT, reducing chain entanglement enhances interchain and intrachain ordering, but reduces the interconnectivity of ordered domains (tie molecules) due to the presence of short chains, thus deteriorating carrier transport even in the face of improving crystallinity. Reducing chain entanglement in high‐M_w P3HT solutions increases carrier mobility up to ≈20‐fold, by enhancing interchain and intrachain ordering while maintaining a sufficiently large number of tie molecules between ordered domains. These results indicate that charge carrier mobility is strongly governed by the balancing of intrachain and interchain ordering, on the one hand, and interconnectivity of ordered domains, on the other hand. In high‐M_w P3HT, intrachain and interchain ordering appear to be the key bottlenecks to charge transport, whereas in low‐M_w P3HT, the limited interconnectivity of the ordered domains acts as the primary bottleneck to charge transport.     

Growth of Large Crystalline Grains of Vanadyl‐Phthalocyanine without Epitaxy on Graphene

The performance of organic semiconductor thin films in electronic devices is related to their crystal structure and morphology, with charge transport mobility dependent on the degree of crystallinity and on the crystallographic orientation. Here organic molecular beam deposition of vanadyl phthalocyanine is studied on graphene and it is shown that crystalline grains up to several micrometers across can be formed at substrate temperatures of 155 °C, compared to room temperature grain sizes of ≈30 nm. Transmission electron microscopy confirms the presence of long range order at elevated substrate temperatures and reveals that the molecules are stacked in an edge‐on orientation, but are not epitaxially aligned to the graphene. The crystalline grain sizes are significantly larger on graphene than on disordered substrates such as graphene oxide and silicon oxide. The effect on charge transport is probed by conducting atomic force microscopy, with the high temperature films on graphene showing increased mobility and uniformity and decreased trap density. These results illustrate an important advantage for the integration of graphene electrodes with organic semiconductor devices: the homogeneous surface of graphene results in high diffusion and low nucleation rates for thin film growth, encouraging the formation of highly crystalline films even with nonepitaxial growth.     

Temperature‐Dependent Electrical Transport in Polymer‐Sorted Semiconducting Carbon Nanotube Networks

The temperature dependence of the electrical characteristics of field‐effect transistors (FETs) based on polymer‐sorted, large‐diameter semiconducting carbon nanotube networks is investigated. The temperature dependences of both the carrier mobility and the source‐drain current in the range of 78 K to 293 K indicate thermally activated, but non‐Arrhenius, charge transport. The hysteresis in the transfer characteristics of FETs shows a simultaneous reduction with decreasing temperature. The hysteresis appears to stem from screening of charges that are transferred from the carbon nanotubes to traps at the surface of the gate dielectric. The temperature dependence of sheet resistance of the carbon nanotube networks, extracted from FET characteristics at constant carrier concentration, specifies fluctuation‐induced tunneling as the mechanism responsible for charge transport, with an activation energy that is dependent on film thickness. Our study indicates inter‐tube tunneling to be the bottleneck and implicates the role of the polymer coating in influencing charge transport in polymer‐sorted carbon nanotube networks.     

Highly Efficient Charge Transport in a Quasi‐Monolayer Semiconductor on Pure Polymer Dielectric

The study of monolayer organic field‐effect transistors (MOFETs) provides an effective way to investigate the intrinsic charge transport of semiconductors. To date, the research based on organic monolayers on polymeric dielectrics lays far behind that on inorganic dielectrics and the realization of a bulk‐like carrier mobility on pure polymer dielectrics is still a formidable challenge for MOFETs. Herein, a quasi‐monolayer coverage of pentacene film with orthorhombic phase is grown on the poly (amic acid) (PAA) dielectric layer. More significantly, charge density redistribution occurs at the interface between the pentacene and PAA caused by electron transfer from pentacene to the PAA dielectric layer, which is verified by theoretical simulations and experiments. As a consequence, an enhanced hole accumulation layer is formed and pentacene‐based MOFETs on pure polymer dielectrics exhibit bulk‐like carrier mobilities of up to 13.7 cm² V^?1 s^?1 from the saturation region at low V_GS, 9.1 cm² V^?1 s^?1 at high V_GS and 7.6 cm² V^?1 s^?1 from the linear region, which presents one of the best results of previously reported MOFETs so far and indicates that the monolayer semiconductor growing on pure polymer dielectric could produce highly efficient charge transport.     

Metal–Insulator–Semiconductor Coaxial Microfibers Based on Self‐Organization of Organic Semiconductor:Polymer Blend for Weavable,Fibriform Organic Field‐Effect Transistors

With the increasing importance of electronic textiles as an ideal platform for wearable electronic devices, requirements for the development of functional electronic fibers with multilayered structures are increasing. In this paper, metal–polymer insulator–organic semiconductor (MIS) coaxial microfibers using the self‐organization of organic semiconductor:insulating polymer blends for weavable, fibriform organic field‐effect transistors (FETs) are demonstrated. A holistic process for MIS coaxial microfiber fabrication, including surface modification of gold microfiber thin‐film coating on the microfiber using a die‐coating system, and the self‐organization of organic semiconductor–insulator polymer blend is presented. Vertical phase‐separation of the organic semiconductor:insulating polymer blend film wrapping the metal microfibers provides a coaxial bilayer structure of gate dielectric (inside) and organic semiconductor (outside) with intimate interfacial contact. It is determined that the fibriform FETs based on MIS coaxial microfiber exhibit good charge carrier mobilities that approach the values of typical devices with planar substrate. It additionally exhibits electrical property uniformity over the entire fiber surface and improved bending durability. Fibriform organic FET embedded in a textile is demonstrated by weaving MIS coaxial microfibers with cotton and conducting threads, which verifies the feasibility of MIS coaxial microfiber for use in electronic textile applications.     

The Role of OTS Density on Pentacene and C60 Nucleation,Thin Film Growth,and Transistor Performance

In organic thin film transistors (OTFTs), charge transport occurs in the first few monolayers of the semiconductor near the semiconductor/dielectric interface. Previous work has investigated the roles of dielectric surface energy, roughness, and chemical functionality on performance. However, large discrepancies in performance, even with apparently identical surface treatments, indicate that additional surface parameters must be identified and controlled in order to optimize OTFTs. Here, a crystalline, dense octadecylsilane (OTS) surface modification layer is found that promotes two‐dimensional semiconductor growth. Higher mobility is consistently achieved for films deposited on crystalline OTS compared to on disordered OTS, with mobilities as high as 5.3 and 2.3 cm² V^?1 s^?1 for C₆₀ and pentacene, respectively. This is a significant step toward morphological control of organic semiconductors which is directly linked to their thin film charge carrier transport.     

Organic Field Effect Transistors Based on Graphene and Hexagonal Boron Nitride Heterostructures

Enhancing the device performance of single crystal organic field effect transistors (OFETs) requires both optimized engineering of efficient injection of the carriers through the contact and improvement of the dielectric interface for reduction of traps and scattering centers. Since the accumulation and flow of charge carriers in operating organic FETs takes place in the first few layers of the semiconductor next to the dielectric, the mobility can be easily degraded by surface roughness, charge traps, and foreign molecules at the interface. Here, a novel structure for high‐performance rubrene OFETs is demonstrated that uses graphene and hexagonal boron nitride (hBN) as the contacting electrodes and gate dielectric layer, respectively. These hetero‐stacked OFETs are fabricated by lithography‐free dry‐transfer method that allows the transfer of graphene and hBN on top of an organic single crystal, forming atomically sharp interfaces and efficient charge carrier‐injection electrodes without damage or contamination. The resulting heterostructured OFETs exhibit both high mobility and low operating gate voltage, opening up new strategy to make high‐performance OFETs and great potential for flexible electronics.     

Graphene flakes at the SiO2/organic-semiconductor interface for high-mobility field-effect transistors

We demonstrate that high-transconductance organic thin film transistors can be achieved by depositing electrochemically exfoliated graphene flakes at the gate-dielectric/organic semiconductor (OS) interface. This effect is applicable to both, solution processed, polymer-based and vacuum-evaporated small-molecule OS-based transistors. Poly(3-hexylthiophene) (P3HT) transistors exhibit a factor of seven higher charge carrier mobility, while pentacene transistors exhibit a fourfold increase in charge carrier mobility, if graphene flakes are present at the dielectric/OS interface.     

A quantum mechanical mobility model for scaled NMOS transistors with ultra-thin high-K dielectrics and metal gate electrodes

A quantum mechanical model of electron mobility for scaled NMOS transistors with ultra-thin SiO₂/HfO₂ dielectrics (effective oxide thickness is less than 1 nm) and metal gate electrode is presented in this paper. The inversion layer carrier density is calculated quantum mechanically due to the consideration of high transverse electric field created in the transistor channel. The mobility model includes: (1) Coulomb scattering effect arising from the scattering centers at the semiconductor–dielectric interface, fixed charges in the high-K film and bulk impurities, and (2) surface roughness effect associated with the semiconductor–dielectric interface. The model predicts the electron mobility in MOS transistors will increase with continuous dielectric layer scaling and a fixed volume trap density assumption in high-K film. The Coulomb scattering mobility dependence on the interface trap density, fixed charges in the high-K film, interfacial oxide layer thickness and high-K film thickness is demonstrated in the paper.     

Programmable Persistent Interfacial Metallic State Induced by Frozen Ions in Inorganic–Glass Solid Electrolyte

Electric field control of charge carrier density through dielectric layers has long been a key technology in the semiconductor industry and condensed‐matter physics. The new carrier‐doping method by the electric double layers (EDLs) opens up the route to access clean carrier doping with high carrier density, but this method is not practical for a switching device due to its slow response to the electric field. However, if this slow response could be stopped at room temperature as an extreme case, the EDL method can become the practical means for materials design, which produces a persistent carrier‐doped state without impurity introduction or continuous supply of external electric fields. Here, it is demonstrated that the thermally programmable persistent interfacial metallic state can be realized around room temperature by all‐solid heterointerface devices using an inorganic–glass solid electrolyte as a gate insulator. The proposed device, in this study, could pave the way for designing a new category of a highly carrier‐doped semiconductor.     

Carrier mobility in inversion layers of Si–thin Ta2O5 structures

The behaviour of carrier mobility in the inversion channel of gateless p-MOSFETs with thin (7-50 nm) Ta₂O₅ layers, having a dielectric constant of (23-27) and prepared by rf sputtering of Ta in an Ar-O₂ mixture, has been investigated. It is shown that independently of the high dielectric constant of the layers, the transport properties in the channel are strongly affected by defects in Ta₂O₅/Si system in the form of oxide charge and interface states. These defects act as scattering centers and are responsible for the observed minority carrier mobility degradation. Both, the oxide and the interface state charges are virtually independent on the oxygen content (in the range 10-30%) during the sputtering process. A reduction of the oxide charge and the density of interface states with increasing Ta₂O₅ film thickness was found, which results in the observed increase of the inversion channel mobility with thickness. It is assumed that the bond defects (broken or strained Ta-bonds as well as weak Si-O bonds in the transition region between Ta₂O₅ and Si) are much more probable sources of defect centers rather than Ta and O vacancies or impurities.