Experimental investigation of temperature and relative humidity effects on resonance frequency and quality factor of CMOS-MEMS paddle resonator

This paper reports an experimental approach to analyse the performance of an externally actuated CMOS-MEMS paddle resonator with proof mass. The surface morphology test of the device is performed with the help of field emission scanning electron microscopy (FESEM), before and after the reliability tests. The effects of temperature variation on the resonance frequency response of the fabricated CMOS-MEMS resonator is analysed under the variation of temperature from 25 °C to 80 °C inside a custom made environmental chamber at a constant relative humidity (32%RH). In the next step, the variation in the quality factor of the MEMS resonator is studied under the effect of varying temperature. Finally, the resonance frequency behavior is analysed under the variation of relative humidity from 32%RH to 90%RH at a constant temperature of 25 °C. The device is found to be eroded and there are some wastes of humidity on it. A total change of 6.9 Hz in resonance frequency is recorded from 25 °C to 80 °C. The drop in the resonance frequency of the MEMS device is found to be 137 MHz/°C with the rise in temperature. Under the temperature variation from 25 °C to 80 °C, the quality factor is found to be nonlinear. A total change of 1.3 Hz in the resonance frequency is observed from 32%RH to 90%RH. The resonance frequency is found to be − 21.8 MHz/RH% with an increasing humidity level.     

Nano-gap micro-electro-mechanical bulk lateral resonators with high quality factors and low motional resistances on thin silicon-on-insulator

The design, fabrication and experimental investigation of 22–25 MHz fragmented-membrane MEM bulk lateral resonators (BLR) with 100 nm air-gaps on thin (1 and 6 μm) silicon-on-insulator (SOI) are reported. Quality factors as high as 120,000 and motional resistances of as little as 60 kΩ are measured under vacuum at room temperature, with 12 V DC bias and low AC power. The temperature influence on the resonance frequency and quality factor is studied and discussed between 80 K and 320 K. Significant quality factor increase and motional resistance reduction are reported at cryogenic temperature. The paper shows that high-quality factor MEM resonators can be integrated on partially depleted thin SOI, which can be a substrate of choice for the fabrication of future integrated hybrid MEMS–CMOS integrated circuits for communication applications.     

Microwave properties and applications of Y–Ba–Cu–O thin films grown on various substrates

Microwave properties of YBa₂Cu₃O_7-δ (YBCO) films grown on (100) LaAlO₃ (LAO), (110) NdGaO₃ (NGO) and (001) SrLaAlO₄ (SLAO) substrates were studied in the form of a microstrip ring resonator at temperatures above 20 K. The YBCO resonator on a SLAO substrate showed microwave properties better than or comparable to other YBCO resonators on LAO substrates. For the YBCO resonators on LAO and SLAO substrates, both Q_U and f₀ appeared to decrease as the temperature was raised. Meanwhile the resonator on a NGO substrate showed different behaviors with Q_U showing a peak at ∼70 K, which are attributed to the unique temperature dependence of the loss tangent of the NGO substrate. An X-band oscillator with a YBCO ring resonator coupled to the circuit was prepared and its properties were investigated at low temperatures. The frequency of the oscillator signal appeared to change from 7.925 GHz at 30 K to 7.878 GHz at 77 K, which was mostly attributed to the change in f₀ of the YBCO ring resonator. The signal power appeared to be more than 4.5 mW at 30 K and 2.1 mW at 77 K, respectively. At 55 K, the frequency of the oscillator signal was 7.917 GHz with the 3 dB-linewidth of 450 Hz.     

Temperature stability of a piezoresistive MEMS resonator including self-heating

Temperature stability of a piezoresistive 1.5 μm thin SOI resonator at 74 MHz is presented. As compared to capacitive resonators the self-heating due to the bias current causes a further decrease of the resonator frequency, in addition to the well-known dependency on ambient temperature. The interpretation of the resonance frequency as a device temperature is not obvious anymore under self-heating due to the inhomogeneous temperature distribution.     

Young's modulus of a sintered Cu joint and its influence on thermal stress

Al₂O₃ chips and pure Cu plates were joined by Cu nanoparticles at 250 °C and 350 °C, and the Young's moduli of the sintered Cu were evaluated by nanoindentation tests. The average Young's moduli were 52.7 ± 19.8 GPa and 76.5 ± 29.7 GPa at 250 °C and 350 °C, respectively, indicating that the sintered structures were strengthened at higher temperatures. The calculation results indicated that the joint at 350 °C has a high Young's modulus, but make the stress higher than the chip strength, resulting in breakage of the chip during 65/250 °C power cycling.     

Simulation and fabrication of HF microelectromechanical bandpass filter

A high-frequency (HF) micromechanical bandpass filter fabricated using the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process and the post-process has been investigated in this study. The area of the filter is about 150×200 μm². The filter is composed of two resonators, which are joined by a coupling beam. Each resonator contains a membrane, four supported beams and two fixed electrodes, and the membrane is supported by four supported beams. The filter requires a post-process to etch the sacrificial layer, and to release the suspended structures. The post-process needs only one wet etching to etch silicon dioxide layer. The filter contains a sensing part and a driving part. When applying a driving voltage to the driving part, the sensing part generates a change in capacitance. The capacitance variation of the sensing part is converted into the output voltage by a sensing circuitry. Experiments show that the filter has a center frequency of about 39.6 MHz and a bandwidth of 330 kHz.     

Growth temperature dependence of epitaxial Gd2O3 films on Si(1 1 1)

This article reports on the epitaxy of crystalline high κ oxide Gd₂O₃ layers on Si(1 1 1) for CMOS gate application. Epitaxial Gd₂O₃ thin films have been grown by Molecular Beam Epitaxy (MBE) on Si(1 1 1) substrates between 650 and 750 °C. The structural and electrical properties were investigated depending on the growth temperature. The C–V measurements reveal that equivalent oxide thickness (EOT) equals 0.7 nm for the sample deposited at the optimal temperature of 700 °C with a relatively low leakage current of 3.6 × 10^?2 A/cm² at |V_g ? V_FB| = 1 V.     

Optimized 2.4 GHz voltage controlled oscillator with a high-Q MWCNT network-based pulse-shaped inductor

This paper focuses on the use of a high-Q Multi-Wall Carbon Nano-Tube (MWCNT)-based pulse-shaped inductor in the implementation of an LC differential voltage-controlled oscillator (LCVCO). The topology integrates a micro-scaled capacitor and a MWCNT network-based inductor together with the CMOS circuits. The CMOS circuits were designed to enhance the quality factor and to control the oscillation amplitude. The high quality factor of the inductor improves the overall quality factor and phase noise of the oscillator. The measurement results show that the LCVCO operates at 2.3982 GHz and achieves a phase noise of ?133.3 dBc/Hz at 1 MHz away from the carrier frequency. The VCO produces frequency tuning from 2.07 GHz to 2.77 GHz (29.16%) with an ultra low power consumption of 1.7 mW from a 0.6 V supply voltage. The output power level of the VCO is ?10 dBm, with an improved quality factor of 49.     

Microelectromechanical resonator manufactured using CMOS-MEMS technique

The fabrication of a microelectromechanical resonator using the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process and a post-process has been implemented. The resonator requires only one wet etching post-process. The suspended structures in the resonator consist of a membrane and four beams. The post-process utilizes an etchant to etch the sacrificial layer, and to release the suspended structures. Easy execution and low cost are the advantages of the post-process. The resonator comprises a driving part and a sensing part. The sensing part produces a change in capacitance when applying a driving voltage to the driving part in the resonator. A circuitry is used to convert the capacitance variation of the sensing part into the voltage output. Experimental results show that the resonant frequency of the resonator is about 39.5 MHz and the quality factor is 806.     

Stress in three-dimensionally integrated sensor systems

The ability to incorporate gas sensing devices into always-on wearable technology such as smart phones, tablets, and wrist watches will revolutionize the environmental health and safety industry by providing individuals with a convenient way to detect harmful chemicals in the environment. Although thin metal oxide films have shown their gas-sensing ability, several challenges must still be overcome in order to enable full CMOS integration with a reduced cost of production. A micromachined tin oxide (SnO₂) gas sensor on a suspended membrane is presented and its operation, heat flux away from the membrane, and stress generation are analyzed. The device operates based on the adsorption of oxygen at its surface when heated to temperatures between 250 ^∘C and 550 ^∘C, where the presence of oxygen ions results in the formation of a depletion region inside the SnO₂ layer. The thermal flux away from the heated membrane is calculated, resulting in a total power loss of 32.5 mW. In this calculation, the heat flux through the membrane as well as the air conduction and radiation are accounted for. The stress through the membrane is calculated to be around 500 MPa to 550 MPa with a maximum displacement of 6.6 μm through its middle. The intrinsic stress through the tin oxide layer is analyzed during film growth using the Volmer-Weber model, resulting in a 200 MPa stress and a 1.69 J/m² surface free energy of the deposited material. The use of spray pyrolysis, a CMOS-friendly deposition technique, in order to deposit the SnO₂ layer on the membrane resulted in a total thermo-mechanical stress of 380 MPa.     

Solid state cavity QED: Strong coupling in organic thin films

We review our research efforts to develop solid state integrated devices that operate in the strong coupling limit of cavity quantum electrodynamics (QED) for eventual application in high speed optical switching, optical computing, and quantum computing. Our devices contain J-aggregates of (organic) cyanine dyes which, by virtue of their molecular arrangement and strong dipolar coupling, exhibit a collective narrow linewidth high oscillator strength optical transition. Using J-aggregates, the strong coupling limit can be reached at room temperature with large coupling strengths (Rabi-splitting >250 meV) in exciton–polariton microcavity structures. We demonstrate that high quality nanoscale thick J-aggregate films can be uniformly deposited over macroscopic substrates, engineered at the molecular level, and patterned into single or multi-dimensional photonic bandgap structures. Our unique methods for depositing J-aggregates enabled us to structure light emitting devices that demonstrated the first ever electrically pumped polariton emission, uniquely accomplished in room temperature operation. Additionally, we demonstrated critically coupled resonators that concentrate nearly all of the incident light into 5 nm thick J-aggregate films, yielding a record high effective absorption constant of 6.8 × 10⁶ cm⁻¹ for films with thickness that is less than 1% of the incident light wavelength. Such remarkable optical properties, enabled by scalable deposition techniques, suggest that J-aggregates are a unique materials platform on which to demonstrate integrated exciton–polariton devices with the far reaching properties of polaritons in the optical domain.     

Storage moduli,loss moduli and damping factor of GaAs and Ga1−xMnxAs thin films using DMA 2980

The spin injector part of spintronic FET and diodes suffers from fatigue due to rising heat on the depletion layer. In this study the stiffness of Ga_1−xMn_xAs spin injector in terms of storage modulus with respect to a varying temperature, 45 °C≤T≤70 °C was determined. It was observed that the storage modulus for MDLs (Manganese Doping Levels) of 0%, 1% and 10% decreased with increase in temperature while that with MDLs of 20% and 50% increase with increase in temperature. MDLs of 20% and 50% appear not to allow for damping but MDLs ≤20% allow damping at temperature range of 45 °C≤T≤70 °C. The magnitude of storage moduli of GaAs is smaller than that for ferromagnetic Ga_1−xMn_xAs systems. The loss moduli for GaAs were found to reduce with increase in temperature. Its magnitude of reducing gradient is smaller than Ga_1−xMn_xAs systems. The two temperature extremes show a general reduction in loss moduli for different MDLs at the study temperature range. From damping factor analysis, damping factors for ferromagnetic Ga_1−xMn_xAs was found to increase with decrease in MDLs contrary to GaAs which recorded the largest damping factor at 45 °C≤T≤70 °C. Hence, MDL of 20% shows little damping followed by 50% while MDL of 0% has the most damping in an increasing trend with temperature.     

Design and simulation of a π/2-mode spatial-harmonic magnetron

Design and 3D numerical simulations of a 37.5 GHz spatial-harmonic magnetron (SHM) are presented. The effect of geometrical parameters of the side resonators of the anode block on output power are considered using the results of a theory based on the single harmonic approximation approach. This theory enables determination of the optimum geometrical parameters of the side resonators. SHM design evaluation is carried out via numerical simulations performed with a 3D particle-in-cell (PIC) code embedded in CST-Particle Studio. Effect of varying the external quality factor and DC-anode voltage on output power, efficiency and stability of operation are also considered. The presented SHM shows stable operation in the π/2-mode over a range of DC anode voltages extending from 12.4 kV to 13 kV and for an axial magnetic flux density equal to 0.53 T. RF output power of the SHM varies from 25 kW to 47 kW over these voltages with a maximum efficiency of around 18.5%.     

Dual-resonance concurrent oscillator

This paper studies a new dual-band CMOS class-C voltage-controlled oscillator (VCO). The oscillator consists of a dual-resonance LC resonator in shunt with two pairs of capacitive cross-coupled nMOSFETs. The proposed oscillator has been implemented with the TSMC 0.18 μm CMOS technology, and it shows a frequency tuning range with two frequency bands and a small tuning hysteresis is measured. The oscillator can generate differential signals at 2.4 GHz and 6.9 GHz and it also can generate concurrent frequency oscillation while the circuit is biased around the bias with frequency tuning hysteresis. With the supply voltage of V_DD = 1.1 V, the VCO-core current and power consumption of the oscillator are 2.90 mA and 3.19 mW, respectively. The die area of the class-C oscillator is 0.9 × 0.97 mm². Overvoltage stress is applied to the oscillator, measurement indicates the concurrent oscillation is sensitive to overvoltage stress.     

The influence of thickness and ammonia flow rate on the properties of AlN layers

Undoped AlN layers have been grown on c-plane sapphire substrates by metal-organic chemical vapor deposition in order to study the effects of ammonia (NH₃) flow rate and layer thickness on the structural quality and surface morphology of AlN layers by high-resolution X-ray diffraction, scanning electron microscopy, and atomic force microscopy. Lower NH₃ flow rate improves crystallinity of the symmetric (0 0 0 2) plane in AlN layers. Ammonia flow rate is also correlated with surface quality; pit-free and smooth AlN surfaces have been obtained at a flow rate of 70 standard cm³ per minute. Thicker AlN films improve the crystallinity of the asymmetric (1 0 1̄ 2) plane.     

A simple CMOS process compatible high performance parallel-stacked spiral inductor for advanced RF analog circuit applications

A high Q on-chip inductor with some unique structures has been fabricated with 0.13 μm CMOS compatible process for the first time. The unique structures including parallel stacked, line via between inter-metal layers, and use the top signal pad as the under path of the inductor instead of conventional bottom signal pad. These structures offer advantages of reducing resistance, high Q value, simple preparing process and small chip area. Experimental results show that the measured peak Q and peak-Q frequency can attain 7.06 and 1.8 GHz, respectively for the structure with four metal layers in parallel, 15 μm in metal width, 5.5 turns in wire number,and an area of 204×240 μm². The results have a better potential for advanced mobile communication applications.     

Sub-1 V,pico-watt subthreshold CMOS voltage reference circuit with dual temperature compensation

A pico-watt CMOS voltage reference is developed using an SK Hynix 0.18 µm CMOS process. The proposed architecture is resistorless and consists of MOSFET circuits operated in the subthreshold region. A dual temperature compensation technique is utilized to produce a near-zero temperature coefficient reference output voltage. Experimental results demonstrate an average reference voltage of 250.7 mV, with a temperature coefficient as low as 3.2 ppm/°C for 0 to 125 °C range, while the power consumption is 545 pW under a 420 mV power supply at 27 °C. The power supply rejection ratio and output noise without any filtering capacitor at 100 Hz are −54.5 dB and 2.88 µV/Hz^1/2, respectively. The active area of the fabricated chip is 0.00332 mm².     

The effect of annealing temperature on the electronic parameters and carrier transport mechanism of Pt/n-type Ge Schottky diode

The Pt nano-film Schottky diodes on Ge substrate have been fabricated to investigate the effect of annealing temperature on the characteristics of the device. The germanide phase between Pt nano-films and Ge substrate changed and generated interface layer PtGe at 573 K and 673 K, Pt₂Ge₃ at 773 K. The current–voltage(I - V) characteristics of Pt/n-Ge Schottky diodes were measured in the temperature range of 183–303 K. Evaluation of the I - V data has revealed an increase of zero-bias barrier height Φ_B0 but the decrease of ideality factor n with the increase in temperature. Such behaviors have been successfully modeled on the basis of the thermionic emission mechanism by assuming the presence of Gaussian distributions. The variation of electronic transport properties of these Schottky diodes has been inferred to be attributed to combined effects of interfacial reaction and phase transformation during the annealing process. Therefore, the control of Schottky barrier height at metal/Ge interface is important to realize high performance Ge-based CMOS devices.     

Current–voltage and capacitance–voltage characteristics of Al Schottky contacts to strained Si-on-insulator in the wide temperature range

The electrical characteristics of Al/strained Si-on-insulator (sSOI) Schottky diode have been investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements in the wide temperature range of 200–400 K in steps of 25 K. It was found that the barrier height (0.57–0.80 eV) calculated from the I–V characteristics increased and the ideality factor (1.97–1.28) decreased with increasing temperature. The barrier heights determined from the C–V measurements were higher than those extracted from the I–V measurements, associated with the formation of an inhomogeneous Schottky barrier at the interface. The series resistance estimated from the forward I–V characteristics using Cheung and Norde methods decreased with increasing temperature, implying its strong temperature dependence. The observed variation in barrier height and ideality factor could be attributed to the inhomogeneities in Schottky barrier, explained by assuming Gaussian distribution of barrier heights. The temperature-dependent I–V characteristics showed a double Gaussian distribution with mean barrier heights of 0.83 and 1.19 eV and standard deviations of 0.10 and 0.16 eV at 200–275 and 300–400 K, respectively. From the modified Richardson plot, the modified Richardson constant were calculated to be 21.8 and 29.4 A cm⁻² K⁻² at 200–275 and 300–400 K, respectively, which were comparable to the theoretical value for p-type sSOI (31.6 A cm⁻² K⁻²).     

Broadband bandpass filters using slotted resonators fed by interdigital coupled lines for improved upper stopband performances

This paper proposes new broadband microstrip bandpass filters based on slotted linear tapered-line resonator (SLTR) and slotted step impedance resonator (SSIR) structures for size reduction and improved stopband performances. A comprehensive treatment of slotted resonators and both ends of the resonator with interdigital coupled lines is described. The design concept is demonstrated by two filter examples including one with an SLTR and another one with an SSIR. These filters have not only compact size but also a wider upper stopband resulting from resonator bandstop characteristics. The simulated and experimental results of stopband performances are better than 15 dB for a frequency range up to 25 GHz.