低成本CDMA2000基站低噪声放大电路设计

CDMA基站低噪声放大电路是无线通信系统中的关键组成部分,其性能的好坏将影响整个通信系统的性能。文章重点研究CDMA2000基站低噪声放大电路,对低噪声放大电路进行了讨论分析,采用理论分析与微波电路仿真相结合的方法设计出一款基于GaAs HEMT的CDMA2000基站两级低噪声平衡放大电路,并将设计结果付诸实践。设计的两级GaAs低噪声放大器在824MHz～849MHz频率范围内实现噪声系数小于0.8dB,增益达到29dB。     

CDMA基站中低噪声放大器设计

叙述一种应用于CDMA2000基站前端的低噪声放大器的设计方案,根据基站接收系统架构确定低噪声放大器指标,利用安捷伦的先进设计系统软件进行仿真设计,仿真结果表明放大器工作频率在810～850 MHz频率范围内增益为18 dB左右,噪声系数0.8 dB,输入回波损耗大于15 dB,输出回波损耗大于12 dB.经实际调试与测量表明结果达到了指标要求,准备应用于杭州某通信公司的产品中.     

CDMA基站杂散发射对GSM基站干扰情况分析

中国联通公司CDMA基站的开通运行近两年来,随着发射设备技术参数的下降等各种原因的出现,它对相邻的中国移动GSM基站的干扰越来越多。笔者在实际工作中发现这类干扰大多数由CDMA基站杂散发射偏大引起。我们先了解GSM基站受干扰时背景噪声电平的大小。根据国家通信行业的标准,GSM基站接收机灵敏度电平Pr′为-104dBm,GSM基站所需的载波干扰比值C/I为9dB。而在实际工作中,由于考虑到环境噪声和多径干扰对基站的影响,我们一般将GSM基站接收机灵敏度电平降低3dB,由此得出GSM基站容许的最大干扰电平I为:I=Pr′+3dBm-C/I=-104dBm+3…     

新品传真

中兴CDMA2000 1x基站、交换产品及CDMA短消息产品亮相昆交会 6月6日－10日,中兴通讯在2001年中国昆明出口商品交易会上展示了其自主开发的国内首套CDMA2000 1X移动基站、交换系统、CDMA短消息产品及首款机卡分离CDMA手机ZTE802。中兴通讯在现场利用CDMA2000 1X基站、交换系统进行了语音、数据与图像的综合传送,最高传输速率可达144kbit／s,演示了CDMA网络与GSM网络互通电话,在CDMA网络内收发短消息,及在CDMA网络与GSM网络之间互发短消息等内容。中兴路由器从高端做起 ZXR10－TSR是中兴通讯针对当前急剧扩展的网…     

新型节能CDMA网络基站建设探索

对基带池、无空调间机房等新型节能CDMA网络基站的建设进行了描述,介绍了新型节能CDMA网络基站的建设方式,同时对其他类型的新型基站进行了探索,对从事CDMA网络基站建设的同行有一定的借鉴作用.     

CDMA系统中RSSI异常问题的分析

1 前言 RSSI（Received Signal Strength Indicator）在CDMA系统中是热量接收信号的强度指示,也是判断反向链路工作状态（是否正常）以及系统是否有外界干扰的一个重要且不可缺少的指标。在目前的CDMA系统中只有IKSSI值在-110～-103dB才是正常范围,若该值大于-103dB或小于-110dBN该基站小区出现RSSI异常告警。     

EPON技术在CDMA基站业务承载中的应用

从EPON承栽TDM业务的原理出发,结合CDMA基站业务承载的技术要求和现实需求,提出了通过EPON进行CDMA基站业务承载的方案,以解决CDMA基站业务承载、室内覆盖业务承载及今后Femtocell业务承载的需求.     

EPON在CDMA基站业务承载中的应用

文章从EPON承载TDM业务的原理出发,结合CDMA基站业务承载的技术要求和现实需求,提出了通过EPON进行CDMA基站业务承载的方案.以满足CDMA基站业务承载、室内覆盖业务承载及今后Femtocell业务承载的需求.经过实际验证,此应用效果良好,具有较高的实用和推广价值.     

浅述IS-95CDMA网络的射频规划与设计(上)

介绍IS－95CDMA的特点和无线网络的设计目标；提出了在规划和设计IS－95CDMA网络时，进行射频设计（如链路设计、基站设置和计算机仿真）的基本理论和方案流程。     

浅述IS-95 CDMA网络的射频规划与设计(下)

介绍了IS－95CDMA的特点和无线网络的设计目标；提出了在规划和设计IS－95CDMA网络时，进行射频设计（如链路设计、基站设置和计算机仿真）的基本理论和方案流程。     

A dual-b and RF front-end of direct conversion receiver for wireless CDMA cellular phones with GPS capability

A highly integrated direct conversion receiver for cellular code division multiple access (CDMA) and GPS applications is successfully developed using a 0.5-/spl mu/m SiGe BiCMOS technology. The receiver consists of two low-noise amplifiers (LNAs), a dual-band mixer, two voltage-controlled oscillators (VCOs), a local-oscillator signal generation block, and channel filters. The CDMA LNA achieves a noise figure of 1.3 dB, an input-referred third-order intercept point (IIP3) of 10.9 dBm, and a gain of 15.3 dB with a current consumption of 9.8 mA in the high-gain mode. The mixer for the CDMA mode achieves an uncalibrated input-referred second-order intercept point of 53.7 dBm, an IIP3 of 6.4 dBm, a noise figure of 7.2 dB and a voltage gain of 37.2 dB. The phase noise of the CDMA VCO is approximately -133 dBc/Hz at a 900-kHz offset from a 1.762-GHz operating frequency. It exceeds all the CDMA requirements when tested on a handset.     

移动通信系统中光纤直放站的设计

移动通信系统引入光纤直放站后使基站接收端的噪声发生变化,通过对光纤直放站之间的传输距离分析以及引入光纤直放站后基站接收端的噪声变化分析发现,噪声增量主要由直放站增益和基站发射机至直放站的路径损耗决定,并进一步推导出光纤直放站的上行增益应比路径损耗小8 dB,而其下行增益的设计应充分考虑到系统上下行的平衡。最后,设计了系统噪声系数为3 dB,上行增益为30 dB,下行输出功率设为36 dBm的光纤直放站。实际投放后发现,网络盲区的比例减小到3.18%,说明该直放站的效果相当显著,并且性能稳定,与原基站兼容性好。     

A direct conversion receiver with an IP2 calibrator for CDMA/PCS/GPS/AMPS applications

A second-order intercept point (IP2) calibration technique is developed using common-mode feedback (CMFB) circuitry in a direct-conversion receiver for wireless CDMA/PCS/GPS/AMPS applications. The IP2 calibrator is capable of providing different CMFB gain to tune its common-mode output impedance for each of the positive and negative mixer outputs. The CDMA mixer applying this method achieved a second-order input intercept point (IIP2) of 64 dBm, a third-order input intercept point (IIP3) of 4 dBm, a noise figure of 6.5 dB and a voltage gain of 42.2 dB. This result shows a 20 dB improvement from an uncalibrated IIP2 of 44 dBm. The receiver RFIC is implemented in a 0.5-/spl mu/m SiGe BiCMOS process, and it operates from a 2.7 to 3.1 V single power supply.     

CDMA蜂窝系统中的干扰及影响

分析ＣＤＭＡ蜂窝系统的基站发射机对ＥＴＡＣＳ蜂窝系统基站接收机的干扰，提出ＣＤＭＡ基站同ＥＴＡＣＳ基站间必须有保护措施，该保护措施至少提供１１４ｄＢ的损耗。本文结合北京等地区的电磁环境测试数据，应用将干扰的影响等效为基站噪声系数上升的方法，分析了外干扰对ＣＤＭＡ系统的影响，结果表明当外干扰达到－１０８ｄＢｍ时覆盖区将减少３０％。     

Optical time-division multiplexed transmission at 8 Gbit/s using single laser and semiconductor optical power amplifier

The authors report transmission over 57 km of single-mode fibre in a two-channel, 8 Gbit/s optical time-division multiplexed system experiment using a transmitter with a single laser and a semiconductor optical power amplifier at the transmitter output. The amplifier operates with a net gain of 11.5 dB, which corresponds to 0.8 dB gain compression, and a fibre coupled output power of +6 dBm. The amplifier facet output power for which the gain is compressed by 3 dB is +13 dBm. The experimental system uses neither an isolator nor an optical filter.<>     

A 0.13 μm CMOS UWB RF Transmitter with an On‐Chip T/R Switch

This paper presents a fully integrated 0.13 μm CMOS MB‐OFDM UWB transmitter chain (mode 1). The proposed transmitter consists of a low‐pass filter, a variable gain amplifier, a voltage‐to‐current converter, an I/Q up‐mixer, a differential‐to‐single‐ended converter, a driver amplifier, and a transmit/receive (T/R) switch. The proposed T/R switch shows an insertion loss of less than 1.5 dB and a Tx/Rx port isolation of more than 27 dB over a 3 GHz to 5 GHz frequency range. All RF/analog circuits have been designed to achieve high linearity and wide bandwidth. The proposed transmitter is implemented using IBM 0.13 μm CMOS technology. The fabricated transmitter shows a ?3 dB bandwidth of 550 MHz at each sub‐band center frequency with gain flatness less than 1.5 dB. It also shows a power gain of 0.5 dB, a maximum output power level of 0 dBm, and output IP3 of +9.3 dBm. It consumes a total of 54 mA from a 1.5 V supply.     

A Fully Integrated Direct-Conversion Receiver for CDMA and GPS Applications

This paper describes a fully integrated zero-IF receiver for cellular CDMA and GPS applications. The single-chip zero-IF receiver integrates the entire signal path for CDMA and GPS bands, including a low-noise amplifier (LNA), I/Q down-converters, baseband channel selection filters (CSFs), a voltage-controlled oscillator (VCO), and a local oscillator (LO) distribution circuit for each band. The cellular-band LNA achieves a noise figure (NF) of 1.2 dB, input third-order intercept point (IIP3) of 11 dBm, and gain of 15.5 dB. Cellular I/Q down-converter and baseband circuitries show 9-dB composite NF, 9 dBm IIP3 and 60-dBm input second-order intercept point (IIP2) without IIP2 calibration. The measured LO leakage is less than -110 dBm at LNA input. The phase noise of the cellular VCO is -134 dBc/Hz at 900-kHz offset with 1.76-GHz carrier frequency. Total GPS signal path achieves NF of 1.7 dB and gain of 74 dB with 42-mA current. The receiver is fabricated in a 0.35-mum SiGe BiCMOS process and packaged in a 6 mm times 6 mm 40-pin micro-lead-frame. Handset measurements report that the receiver meets or exceeds all of the CDMA-2000 requirements     

一种带功率检测和自适应偏置的CDMA功率放大器

设计了一款包含功率检测和自适应线性化偏置电路的CDMA功率放大器,功率检测器能根据输入信号的大小来调整功率管的偏置点,大幅提升低功率输出时的效率,从而提升系统整体效率;自适应线性化偏置能有效抑制功率放大器的增益压缩和相位失真,改善其线性度.采用2 μm InGaP/GaAs HBT晶体管工艺成功流片,测试结果表明,与普...     

A CDMA Dual-Band Zero-IF Receiver With Integrated LNAs and VCOs in an Advanced SiGe BiCMOS Process

This paper describes one of the first dual PCS- and CEL-band CDMA receivers that includes LNAs and VCOs on a single die. The PCS-band LNA achieves a noise figure (NF) of 1.5dB and IP3 of +7.5 dBm at 16-dB gain. The PCS demodulating mixer achieves an NF of 5 dB, IP3 of +5 dBm and uncalibrated IP2 of +60 dBm. The PCS VCO is capable of -134 dBc/Hz phase noise at 3.9 GHz and 1.25-MHz offset. A copper BiCMOS process was chosen for both performance and cost benefits, compared with lower geometry CMOS     

Development of the Base Station Transceiver Subsystem in the CDMA Mobile System

The base station transceiver subsystem (BTS) of the CDMA Mobile System is interfaced to mobile stations over the air and to the wired network through a packet switched interconnection network. The potential benefits of CDMA technology are achieved when the transmitter and the receiver are properly designed and implemented. The physical layer of the air interface at the base station is implemented with the CDMA ASICs and control circuits in the channel card of the BTS. We present the design perspectives and structural illustration of the BTS. Base station modem ASICs and their control to implement the CDMA receiver, baseband and RF signal processing blocks, and BTS controller are described. Elaborate power control is essential to ensure the high capacity which is one of advantages of the CDMA technology. The closed loop reverse link power control and the forward link power control operated in the BTS are described.