Demonstration of using multi-band 16-QAM OFDM modulation with direct-detection in 10 GHz bandwidth for 37.3-Gb/s PON

We propose and experimentally demonstrate a 37.3 Gb/s passive optical network using four-band orthogonal-frequency-division-multiplexing (OFDM) channels within 10 GHz bandwidth. Here, the required sampling rate and resolution of digital-to-analog/analog-to-digital (DA/AD) converter are only 5 GS/s and 8 bits to accomplish the 40 Gb/s OFDM downstream rate. Moreover, to reduce the power fading and fiber chromatic dispersion issues, a $-$ 0.7 chirp parameter Mach-Zehnder modulator is used for the four-band OFDM modulation scheme. Downstream negative power penalty of $-$ 0.37 dB can be obtained at the bit error rate of $3.8\times 10^{-3}$ after 20 km standard single mode fiber transmission without dispersion compensation.     

A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-\Updelta\Upsigma ADC with 1.5 cycle quantizer delay and improved STF

A 1 GS/s continuous-time delta-sigma modulator (CT- $\Updelta\Upsigma$ M) with 31 MHz bandwidth, 76.3 dB dynamic range and 72.5 dB peak-SNDR is reported in a 0.13 μm CMOS technology. The design employs an excess loop delay (ELD) of more than one clock cycle for achieving higher sampling rate. The ELD is compensated using a fast-loop formed around the last integrator by using a sample-and-hold. Further, the effect of this ELD compensation scheme on the signal transfer function (STF) of a feedforward CT- $\Updelta\Upsigma$ architecture has been analyzed and reported. In this work, an improved STF is achieved by using a combination of feed-forward, feed-back and feed-in paths and power consumption is reduced by eliminating the adder opamp. This CT- $\Updelta\Upsigma$ M has a conversion bandwidth of 31 MHz and consumes 34 mW from the 1.2 V power supply. The relevant design trade-offs have been investigated and presented along with simulation results.     

A 97 dB 400 MHz rail to rail fully differential opamp based on split length FGMOS-MOS cell

Recently introduced MOS-FGMOS split length cell has been used to increase the DC gain of a fully differential op amp. Resultant proposed opamp structure exhibits gain of 97 dB and unity gain bandwidth of 400 MHz with power consumption of 1.2 mW. An opamp design has been verified with Cadence Spectre using a 130 nm technology at 1.2 V and has a slew rate of \(53\,\hbox {V}/\mu \hbox {s}\) with a phase margin of \(78^{\circ }\) .     

A Wide Tuning Range Voltage Controlled Oscillator with a High Tunable Active Inductor

This paper presents a wide tuning range CMOS voltage controlled oscillator (VCO) with a high-tunable active inductor circuit. In this VCO circuit, the coarse frequency is achieved by tuning the integrated active inductor circuit. The VCO circuit is designed in 0.18  \(\upmu \hbox {m}\) CMOS process and simulated with Cadence Spectra. The simulation results show the frequency tuning range from 120 MHz to 2 GHz resulting in a tuning range of 94 %. The phase noise variation is from \(-\) 80 to \(-\) 90 dBc/Hz at a 1 MHz frequency offset, and output power variation is from \(-\) 4.7 to \(+\) 11.5 dBm. The active inductor power consumption is 2.2 mW and the total power dissipation is 7 mW from a 1.8 V DC power supply. By comparing the proposed VCO circuit with the general VCO topology, the results show that this VCO architecture by using the novel, high-tunable and low power active inductor circuit, presents a better performance regarding low chip size, low power consumption, high tuning range and high output power.     

Design of an Ultra-Wideband Microstrip Patch Antenna Suspended by Shorting Pins

Designing a compact wideband microstrip patch antenna which is composed of a folded-patch feed, a symmetric E-shaped edge and shorting pins is presented in this paper. One pin is applied in order to expand the impedance bandwidth. Two other pins are utilized to miniaturize the size of patch as well. The measured impedance bandwidth ( $\text{ VSWR}\le 2$ ) of the fabricated antenna is more than 90 % in the frequency range 3.92–10.67 GHz for ultra-wideband (UWB) applications. The antenna size is $0.438\lambda _{0}\times 0.365\lambda _{0}\times 0.170\lambda _{0}$ at its center operating frequency. Also, radiation patterns with acceptable stability within the bandwidth are obtained. In addition, the effects of some key parameters are investigated to describe the performance of the proposed design.     

Theory and design of a CT \Updelta\Upsigma modulator with low sensitivity to loop-delay variations

This paper presents a 3rd-order, 3-bit continuous-time (CT) $\Updelta\Upsigma$ Δ Σ modulator for an LTE radio receiver. A return-to-zero (RZ) pulse, centered in the sampling period by a quadrature clock, is used in the innermost DAC to reduce the sensitivity to loop-delay variations in the modulator, and omit implementing the additional loop delay compensation usually needed in CT modulators. The performance and stability of the NRZ/NRZ/RZ feedback scheme is thoroughly analysed using a discrete-time model. The modulator has been implemented in a 65 nm CMOS process, where it occupies an area of 0.2 × 0.4 mm². It achieves an SNR of 71 dB and an SNDR of 69 dB over a 9 MHz bandwidth with an oversampling ratio of 16, and a power consumption of 7.5 mW from a 1.2 V supply.     

Low Voltage Low Cost Quadrature Oscillator Based on Active Inductor

This paper presents a new low voltage low cost quadrature oscillator, which consists of two LC negative oscillators based on active inductor. In this quadrature oscillator, the back-gates of the core transistors are used as coupling terminals to provide the quadrature outputs. The proposed floating active inductor has a two layer transistor structure. The quadrature oscillator has been implemented with the chart 0.18  \(\upmu \) m CMOS technology. At the supply voltage of 1.2 V, the total power consumption is 16 mW. The phase noise at 1 MHz frequency offset is \(-\) 111.8 dBc/Hz at the oscillation frequency of 3.946 Hz.     

A broadband, differential transimpedance amplifier in 0.35 μm SiGe BICMOS technology for 10 Gbit/s fiber optical front-ends

This study focuses on 10 Gbit/s differential transimpedance amplifier. At the beginning of the work, the amplifier circuit is deeply analyzed and is optimized for the best phase linearity over the bandwidth resulted in a group delay variation less than 1 ps. The amplifier circuit is designed with 0.35 μm SiGe heterojunction bipolar transistor BICMOS process. 9 GHz bandwidth, almost 58 dBΩ transimpedance gain with less than 11.18 pA/ $ \sqrt {\text{Hz}} $ averaged input-referred noise current are achieved. Electrical sensitivity is 15 μA_pp. Power consumption is 71 mW at 3.3 V single power supply.     

A Low-Voltage and Low-Power 3-GHz CMOS LC VCO for S-Band Wireless Applications

A fully integrated 0.18- \(\upmu \hbox {m}\) CMOS LC-tank voltage-controlled oscillator (VCO) suitable for low-voltage and low-power S-band wireless applications is proposed in this paper. In order to meet the requirement of low voltage applications, a differential configuration with two cross-coupled pairs by adopting admittance-transforming technique is employed. By using forward-body-biased metal oxide semiconductor field effect transistors, the proposed VCO can operate at 0.4 V supply voltage. Despite the low power supply near threshold voltage, the VCO achieves wide tuning range by using a voltage-boosting circuit and the standard mode PMOS varactors in the proposed oscillator architecture. The simulation results show that the proposed VCO achieves phase noise of \(-\) 120.1 dBc/Hz at 1 MHz offset and 39.3 % tuning range while consuming only \(594~\upmu \hbox {W}\) in 0.4 V supply. Figure-of-merit with tuning range of the proposed VCO is \(-\) 192.1 dB at 3 GHz.     

A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier

We present a 2nd-order 4-bit continuous-time (CT) delta-sigma modulator (DSM) employing a 2nd-order loop filter with a single operational amplifier. This choice strongly reduces the power consumption, since operational amplifiers are the most power hungry blocks in the DSM. The DSM has been implemented in a 65 nm CMOS process, where it occupies an area of \(0.08\,\hbox {mm}^2\) . It achieves an SNDR of 64 dB over a 500 kHz signal bandwidth with an oversampling ratio of 16. The power consumption is \(76\,\upmu \hbox {W}\) from a 800 mV power supply. The DSM figure-of-merit is 59 fJ/conversion. The CT DSM is well suited for the receiver of an ultra-low-power radio.     

On turbo encodedBicm

The superior performance of the binary turbo codes has stimulated vigorous efforts in generating bandwidth efficient modulation schemes adhering to these codes. Several approaches for the integration of turbo-coding and modulation have emerged in recent years but none seem to dominate. In the bit interleaved coded modulation (Bicm) scheme is used to achieve high bandwidth and power efficiency, while separating coding and modulation. As is now well known, theBicm scheme achieves capacity remarkably close to the constellation channel capacity. The turbo-Bicm scheme enjoys high coding diversity (well suited for fading channels), high flexibility as well as design and implementation simplicity, while maintaining good power efficiency. The system comprises one standard turbo code, an interleaver, a mapper and a modulator at the transmitter, corresponding to a demodulator, a de-interleaver and a turbo decoder at the receiver. A modified system, which improves on performance by incorporating the demodulation in the iterative decoding procedure, is investigated, and some performance gain is demonstrated, especially for low rate codes. Information theoretic arguments for the somewhat minor potential improvement in performance are detailed. The preferred mapper and interleaver for this system are considered. Extending previous works, for higher level modulations, we analyze a system including a convolutional code, an interleaver, a differential encoder (De), a mapper and a modulator at the transmitter. As for theBpsk modulation, the serial concatenation of a convolutional code withDe outperforms the single convolutional code. The serial concatenation withDe approach is analyzed also for a turbo code, where it is found to fail in achieving performance improvement. Several structures for the serial concatenation withDe are examined. These results are substantiated through the ‘spectral thinning’ phenomena of the weight distribution of the convolutional and turbocodes.     

A Novel Design of Low Power Rectenna for Wireless Sensor and RFID Applications

In this paper, an efficient microstrip rectenna operating on ISM band with high harmonic rejection is presented. By using rotated E-shaped strip in the radiating patch, a new resonance at lower frequencies (2.4 GHz) can be achieved. Also by embedding cutting a rectangular slot with protruded interdigital strip inside the slot in the feed line a frequency band-stop performance can be achieved. The proposed structure has a major advantage in high harmonic rejection. The rectenna with integrated monopole antenna can eliminate the need for an low pass filter placed between the antenna and the diode as well as produce higher output power, with maximum conversion efficiency of 74 % using a 1 K \(\Omega \) load resistor at a power density of \(0.3\,\hbox {mW/cm}^{2}\) .     

A Novel 2.5–3.1 GHz Wide-Band Low-Noise Amplifier in 0.18 \upmu \hbox {m} CMOS

Aiming for the simultaneous realization of constant gain, accurate input and output impedance matching and minimum noise figure (NF) over a wide frequency range, the circuit topology and detailed design of wide broadband low noise amplifier (LNA) are presented in this paper. A novel 2.5–3.1 GHz wide-band LNA with unique characteristics has been presented. Its design and layout are done by TSMC 0.18  \(\upmu \hbox {m}\) technology. Common gate stage has been used to improve input matching. In order to enhance output matching and reduce the noise as well, a buffer stage is utilized. Mid-stages which tend to improve the gain and reverse isolation are exploited. The proposed LNA achieves a power gain of 15.9 dB, a NF of 3.5 dB with an input return loss less than \(-\) 11.6, output return loss of \(-\) 19.2 to \(-\) 19 and reverse isolation of \(-\) 38 dB. The LNA consumes 54.6 mW under a supply voltage of 2 V while having some acceptable characteristics.     

A 3–10 GHz Ultra Wideband Receiver LNA in 0.13 \mu m CMOS

A fully integrated low-power, low-complexity ultra wideband (UWB) 3–10 GHz receiver front-end in standard 130 nm CMOS technology is proposed for UWB radar sensing applications. The receiver front-end consists of a full UWB band low-noise amplifier and an on-chip diplexer. The on-chip diplexer has a 1 dB insertion loss and provides a \(-\) 30 dB isolation. The diplexer switch was co-designed with the receiver input matching network to optimize the power matching while simultaneously achieving good noise matching performance. The receiver low-noise amplifier provides a 3–10 GHz bandwidth input matching and a power gain of 17 dB. The overall receiver front-end consumes an average power of 13 mW. The core area of the transceiver circuit is 500 \(\mu \) m by 700 \(\mu \) m.     

Key-Dependent Message Security: Generic Amplification and Completeness

Key-dependent message (KDM) secure encryption schemes provide secrecy even when the attacker sees encryptions of messages related to the secret-key sk. Namely, the scheme should remain secure even when messages of the form f(sk) are encrypted, where f is taken from some function class $\mathcal{F}$ . A KDM amplification procedure takes an encryption scheme which satisfies $\mathcal{F}$ -KDM security, and boosts it into a $\mathcal{G}$ -KDM secure scheme, where the function class $\mathcal{G}$ should be richer than $\mathcal{F}$ . It was recently shown by Brakerski et al. (TCC 2011) and Barak et al. (EUROCRYPT 2010) that a strong form of amplification is possible, provided that the underlying encryption scheme satisfies some special additional properties. In this work, we prove the first generic KDM amplification theorem which relies solely on the KDM security of the underlying scheme without making any other assumptions. Specifically, we show that an elementary form of KDM security against functions in which each output bit either copies or flips a single bit of the key (a.k.a. projections) can be amplified into KDM security with respect to any function family that can be computed in arbitrary fixed polynomial-time. Furthermore, our amplification theorem and its proof are insensitive to the exact setting of KDM security, and they hold in the presence of multiple-keys and in the symmetric-key/public-key and the CPA/CCA cases. As a result, we can amplify the security of most known KDM constructions, including ones that could not be amplified before. Finally, we study the minimal conditions under which full-KDM security (with respect to all functions) can be achieved. We show that under strong notion of KDM security, the existence of fully homomorphic encryption which allows to encrypt the secret-key (i.e., “cyclic-secure”) is not only sufficient for full-KDM security, as shown by Barak et al., but also necessary. On the other hand, we observe that for standard KDM security, this condition can be relaxed by adopting Gentry’s bootstrapping technique (STOC 2009) to the KDM setting.     

Performance Analysis of 4\times 4 and 8\times 8 MIMO System,to Achieve Higher Spectral Efficiency in Rayleigh and Rician Fading Distributions

The proposed work deals with the performance analysis of \(4 \times 4\) and \(8 \times 8\) multiple input multiple output (MIMO) wireless communication system to achieve higher spectral efficiency in Rayleigh and Rician fading distributions. The key channel model used is spatial multiplexing. Singular value decomposition is used to carry out the simulation of \(4\times 4\) and \(8\times 8\) MIMO channel. This scheme also employs the Waterfilling algorithm which allocates the power in all sub-channels improving the Spectral Efficiency. Next generation wireless communication systems require implementations of MIMO to realize higher spectral efficiency.     

Distributed Orthogonal and Quasi-Orthogonal Space-Time Block Code with Embedded AAF/DAF Matrix Elements in Wireless Relay Networks with Four Relays

We consider cooperative networks of one source, four relays, and one destination. Each of them has a single antenna. The four relays use a proposed full rate distributed quasi orthogonal space time block code (DQOSTBC) scheme. If the channel state between the source and a relay is above a threshold, we select the elements of the DQOSTBC matrix to be the decode-and-forward (DAF) type; if it is below the threshold, the corresponding elements are the amplify-and-forward (AAF) type. Thus the proposed scheme is a DQOSTBC matrix with embedded adaptive DAF/AAF elements. The bit error rate (BER) simulation results show that the proposed DQOSTBC is approximately 7 dB better than the traditional DQOSTBC (all matrix elements are fixed as DAF type) at a BER of $10^{-3}$ because traditional DQOSTBC loses full diversity due to errors in the information received. The proposed DQOSTBC is about 3 dB better than the rate 1/2 DOSTBC also proposed with adaptive DAF/AAF matrix elements at a BER of $10^{-3}$ at the same spectral efficiency of 2 bits/s/Hz.     

A High Gain and Low Flicker Noise CMOS Mixer with Low Flicker Noise Corner Frequency Using Tunable Differential Active Inductor

This paper presents the design of a high conversion gain and low flicker noise down conversion CMOS double balanced Gilbert cell mixer using \(0.18\,\upmu \hbox {m}\) CMOS technology. The high conversion gain and low flicker noise mixer is implemented by using a differential active inductor (DAI) circuit and cross-coupled current injection technique within the conventional double-balanced Gilbert cell mixer. A cross-coupled current bleeding circuit is used to inject the current to the switching stage to decrease the flicker noise. Instead of spiral inductor, a DAI with high tunability of the inductor and quality factor is used to tune out the parasitic capacitance effect and decrease the leakage current that has a harmonic component and produce the flicker noise. By tuning the DAI, the flicker noise corner frequency is reduced to 150 Hz. The proposed circuit is simulated with Cadence Spectra and the simulation results shows the NF of 11.2 dB, conversion gain of 23.7 dB and IIP3 of \(-6\)  dB for an RF frequency of 2.4 GHz. The excellent LO-RF, LO-IF, RF-LO and RF-IF isolations of \(-60, -110, -52\) and \(-64\)  dB are achieved respectively. The total power consumption is 10.5 mW from a 1.8 V DC power supply.     

Performance Analysis of Microwave Radio Refractivity on Radio Field Strength and Radio Horizon Distance Over Akure,Nigeria

Surface radio refractivity studies are being carried out in Akure, \((7.15^{\circ }\hbox {N}, 5.12^{\circ }\hbox {E})\) South-Western Nigeria, by in-situ measurement of atmospheric pressure, temperature, and relative humidity using Wireless Weather Station (Integrated Sensor Suit, ISS). Five years of measurement (January, 2007–December, 2011) were used to compute the surface radio refractivity and its diurnal, daily, seasonal and yearly variations are analyzed. The results were then used to compute radio horizon distance \((\hbox {R}_\mathrm{DH})\) and examine the field strength (FSV) variability. Results obtained show that the surface radio refractivity, \(\hbox {N}_\mathrm{s}\) , varies with the time of the day as well as the seasons of the year. High values of \(\hbox {N}_\mathrm{s}\) were recorded in the morning and evening hours while the values were minima around 1,500 h local time. An average value of surface radio refractivity of 364.74 N-units was obtained for this location. The annual maximum mean of FSV is 15.24 dB and the minimum is 2.20 dB. This implies that the output of a receiving antenna in Akure may generally be subject to variations not less than 2 dB in a year, but can be as high as 15 dB.     

Analysis of L-probe Proximity Fed Annular Ring Patch Antenna for Wireless Applications

In the present paper, annular ring patch antenna with L-probe feeding has been analyzed using modal expansion cavity model. The proposed antenna shows wide band and ultra wide band operation which depends on the position of L-probe feeding and position of the shorting pin. For the fundamental \(\hbox {TM}_{11}\) mode, the bandwidth and gain is found to be 38.85 % and 7.8 dBi while for higher order \(\hbox {TM}_{12}\) mode bandwidth is obtained 58.71 % with corresponding gain of 6.1 dBi. The effect of shorting pin on the proposed antenna is also studied and it is found that the radiating structure is more compact in nature and improves the bandwidth upto 47.37 % with 8.0 dBi gain. Further, the proposed antenna has broadside radiation pattern over the entire bandwidth. The theoretical results are compared with IE3D simulated results which are in good agreement.