Two-phase modulation technique for three-level inverter-fed AC drives

Two-phase dipolar and unipolar modulation techniques for three-level three-phase inverters are suggested and compared with conventional three-phase pulsewidth modulation (PWM) techniques. Two-phase PWMs with 60/spl deg/ (0/spl deg/ and /spl plusmn/30/spl deg/ shift) and 120/spl deg/ cycles are investigated from the point of view of harmonic losses, motor voltage spectra, and torque pulsations. It is shown that two-phase dipolar PWMs have no advantages in comparison with three-phase PWMs, while two-phase unipolar PWMs-in contrast with three-phase PWMs-considerably decrease the motor harmonic losses and torque pulsations in the whole motor voltage region. At the same time, the inverter neutral point control requires reversing to three-phase PWM technique for the duration of the control.     

A novel and simple current controller for three-phase PWM powerinverters

A new feedback current controller for three-phase pulsewidth modulation (PWM) power inverters is presented. To achieve robustness, fast dynamical response, reduced switching frequency, and simple hardware implementation, an improved three-level hysteresis sliding-mode controller is used. All voltage vectors are accurately selected in order to minimize the current error     

Phase-Shifted Carrier PWM Technique for General Cascaded Inverters

Phase-shifted carrier (PSC) pulsewidth modulation (PWM) in its conventional form is a good solution for single-phase Cascaded inverters as alternative phase opposition disposition (APOD) PWM for single-phase diode clamped inverters. PSC distributes the switching angles of APOD PWM waveform among the legs uniformly and reduces the switching frequency of each leg. This paper proposes a modified PSC technique based on partly shifted carriers for all disposition types including phase disposition (PD) which is suitable for three-phase cascaded inverters. Simulation results are also included for using carrier-based space-vector PWM (SVPWM).     

Optimal control of three-level PWM inverters

An harmonic loss-minimized optimal PWM strategy for three-level inverters is investigated. The different PWM methods for low-, middle-, and high-speed regions are presented. It is shown that, for three-level inverters, the optimized strategy in all speed regions differs from the optimal PWM strategy of two-level inverters. The developed optimal control ensures a minimum of harmonic losses for a predetermined number of commutations of three-level PWM inverters and for a given value of the fundamental harmonic voltage     

Fuzzy-tuning current-vector control of a three-phase PWM inverterfor high-performance AC drives

This paper proposes a new discrete fuzzy-tuning current-vector control (FTC) scheme for three-phase pulsewidth modulation (PWM) inverters. The proposed current control scheme can achieve fast transient responses and, at the same time, have very low total harmonic distortion in output current during steady-state operation. The proposed FTC scheme generates quasi-optimum PWM patterns by using a closed-loop control technique with instantaneous current feedback. The proposed FTC scheme has been realized using a single-chip digital signal processor (TMS320C14) from Texas Instruments. Experimental results are given to verify the proposed fuzzy-tuning current control strategy for three-phase PWM inverters     

A novel three-phase utility interface minimizing line currentharmonics of high-power telecommunications rectifier modules

Based on the combination of a three-phase diode bridge and a DC/DC boost converter, a new three-phase three-switch three-level pulsewidth modulated (PWM) rectifier system is developed. It can be characterized by sinusoidal mains current consumption, controlled output voltage, and low-blocking voltage stress on the power transistors. The application could be, e.g., for feeding the DC link of a telecommunications power supply module. The stationary operational behavior, the control of the mains currents, and the control of the output voltage are analyzed. Finally, the stresses on the system components are determined by digital simulation and compared to the stresses in a conventional six-switch two-level PWM rectifier system     

Minimum-loss vector PWM strategy for three-phase inverters

A novel vector PWM method for three-phase voltage-controlled inverters is described. The so-called minimum-loss vector PWM (MLVPWM) strategy is characterized by the minimum amount of switching losses incurred in the inverter switches. Comparative analysis proving superiority of the MLVPWM technique over the existing regular-sampling PWM methods, and results of experimental investigation of a prototype modulator are presented     

A 3-D generalized direct PWM algorithm for multilevel converters

A three-dimensional (3-D) generalized direct pulse width modulation (PWM) algorithm is proposed for multilevel converters in a three-phase, four-wire system. It is proved to be equivalent to the newly proposed generalized 3-D space vector modulation (SVM). However, the direct PWM greatly simplifies the calculation process and is much easier to implement in digital controllers. The direct PWM can be used in all applications needing a 3-D control vector, such as active filters, uninterruptible power supplies, etc. Simulation and experimental results are given to show the validity of the proposed control strategy.     

A novel random PWM technique with low computational overhead and constant sampling frequency for high-volume, low-cost applications

A novel random pulse-width modulation (PWM) technique for three-phase voltage-source inverters, characterized by low computational overhead, a variable switching frequency, and a constant sampling frequency, is presented. The technique is based on two strategies: 1) the so-called arithmetic PWM (APWM), which yields the same switching patterns as the classic space-vector modulation, but with minimal computational effort and 2) randomization of switching periods by varying the delay of switching cycles with respect to corresponding sampling cycles. Simplicity of the technique, named a variable-delay random PWM (VDRPWM) method, allows its implementation in cheap, low-end processors. It makes the VDRPWM the best choice for high-volume, low-cost applications, such as domestic and automotive ac drives and UPSs. The random aspect of the technique has a mitigating effect on the acoustic and electromagnetic noise emitted by the supplied system. This feature has been confirmed by experiments with a 40-hp induction motor drive.     

三电平PWM整流器双闭环系统的设计与仿真

三电平PWM整流器多采用电压控制外环和电流控制内环组成的双闲环控制系统。电压外环的作用是根据直流电压Udc的大小决定三电平PWM整流器输出功率的大小和方向以及三相电流的给定信号。电流内环的作用是使整流器的实际输入电流能够跟踪电流给定,实现单位功率因数或功率因数可变。文中主要研究了三电平PWM整流器的系统设计,并进行了仿真。结果表明,所设计的双闭环系统具有良好的抗扰动性能,动态响应也得到了明显的改善。     

Harmonics in voltage-source PWM inverters

The performance of an induction motor fed by PWM inverters is mainly determined by the harmonic contents of the output voltage. This paper presents a method of numerically calculating the harmonics in the output voltage waveform. Equal pulse-width modulation and siunsoidal PWM are studied. Analysis has been done for single-phase and three-phase bridge inverters. A systematic procedure is given for computing the harmonics and the results are. tabulated.     

Advanced Control and Analysis of Cascaded Multilevel Converters Based on P-Q Compensation

This paper introduces new controls for the cascaded multilevel power converter. This converter is also sometimes referred to as a ldquohybrid converterrdquo since it splits high-voltage/low-frequency and low-voltage/pulsewidth-modulation (PWM)-frequency power production between ldquobulkrdquo and ldquoconditioningrdquo converters respectively. Cascaded multilevel converters achieve higher power quality with a given switch count when compared to traditional multilevel converters. This is a particularly favorable option for high power and high performance applications such as naval ship propulsion. This paper first presents a new control method for the topology using three-level bulk and conditioning inverters connected in series through a three-phase load. This control avoids PWM frequency switching in the bulk inverter. The conditioning inverter uses a capacitor source and its control is based on compensating the real and reactive (P-Q) power difference between the bulk inverter and the load. The new control explicitly commands power into the conditioning inverter so that its capacitor voltage remains constant. A unique space vector analysis of hybrid converter modulation is introduced to quantitatively determine operating limitations. The conclusion is then generalized for all types of controls of the hybrid multilevel converters (involving three-level converter cells). The proposed control methods and analytical conclusions are verified by simulation and laboratory measurements.     

A synchronization technique for static delta-modulated PWMinverters

A synchronization technique for static delta-modulated PWM inverters is presented. This control strategy removes the frequency modulation inherent in the delta-modulated inverter. Furthermore, synchronization of the PWM pulses with the reference signal ensures balanced phase voltages in three-phase applications. The performance of the modulator is analyzed using digital simulations and is verified with experimental circuits     

Graphical phasor analysis of three-phase PWM converters

A graphical steady-state analysis technique based on the complex 0-sequence, forward-rotating, and backward-rotating (0fb) phasors is described for balanced three-phase PWM inverters, rectifiers and cycloconverters. The technique avoids the cumbersome algebra of the 0fb transformation, and the coupling between the subcircuits resulting from the real direct-axis/quadrature-axis (dq) transformation. Using symmetric and de-coupled subcircuits that are time-invariant under steady state, the graphical method makes the analysis of three-phase converters straightforward and insightful. In the paper, time-invariant transient models with respect to an arbitrary reference node are first derived for all three-phase converter components. Application of the component models to steady-state analysis is demonstrated for the buck-boost inverter. The steady-state equivalent circuits for the popular buck and boost inverters, rectifiers, and cycloconverters are given along with the steady-state values for their capacitor voltages and inductor currents     

Application of a three-level NPC inverter as a three-phase four-wire power quality compensator by generalized 3DSVM

A two-level four-leg inverter has been developed for the three-phase four-wire power quality compensators. When it is applied to medium and large capacity compensators, the voltage stress across each switch is so high that the corresponding dv/dt causes large electromagnetic interference. The multilevel voltage source inverter topologies are good substitutes, since they can reduce voltage stress and improves output harmonic contents. The existing three-level neutral point clamped (NPC) inverter in three-phase three-wire systems can be used in three-phase four-wire systems also, because the split dc capacitors provide a neutral connection. This paper presents a comparison study between the three-level four-leg NPC inverter and the three-level NPC inverter. A fast and generalized applicable three-dimensional space vector modulation (3DSVM) is proposed for controlling a three-level NPC inverter in a three-phase four-wire system. The zero-sequence component of each vector is considered in order to implement the neutral current compensation. Both simulation and experimental results are given to show the effectiveness of the proposed 3DSVM control strategy. Comparisons between the 3DSVM and the 3-D hysteresis control strategy are also achieved.     

Efficiency Analysis of PWM Inverter Fed Three-Phase and Dual Three-Phase High Frequency Induction Machines for Low/Medium Power Applications

A performance analysis of three-phase and dual three-phase (DTP) induction pulsewidth modulation (PWM) inverter-fed motor drives is conducted in this paper. The focus is on the efficiency performance of high-frequency DTP machines compared to their three-phase counterparts in low/medium power applications. For this purpose, a DTP machine, having two sets of stator three-phase windings spatially shifted by 30 electrical degrees (asymmetrical six-phase winding configuration), was tested for both six-phase and three-phase winding configurations under the same magnetic conditions. Simulation and experimental results are presented to evaluate the efficiency performance of three-phase and dual-three induction motor drives employing PWM voltage source inverters.     

Four-wire dynamic voltage restorer based on a three-dimensional voltage space vector PWM algorithm

A modified voltage space vector pulse-width modulated (PWM) algorithm for a four-wire dynamic voltage restorer (DVR) is described. The switching strategy based on a three-dimensional (3-D) /spl alpha//spl beta/O voltage space is applicable to the control of three-phase four-wire inverter systems such as the split-capacitor PWM inverter and the four-leg PWM inverter. In contrast to the conventional voltage space vector PWM method, it controls positive, negative and zero sequence components of the terminal voltages instantaneously. Three 3-D modulation schemes are analyzed with respect to total harmonic distortion (THD), weighted total harmonic distortion (WTHD), neutral line ripple and switching loss over the whole range of the modulation index when the DVR experiences both balanced and unbalanced sags with phase angle jumps. Experimental results from a 9 kW DVR system using a split-capacitor PWM inverter are presented to validate the simulation results.     

A dual two-level inverter scheme with common mode voltage elimination for an induction motor drive

Pulse-width modulated (PWM) inverters are known to generate common mode voltages which cause motor bearing currents in the induction motor drives. They also result in leakage currents which act as sources of conducted electromagnetic interference in the drive system. The common mode voltage generated by a conventional three-level inverter can be eliminated by switching only the voltage space vectors which do not produce the common mode voltage. This paper presents a PWM switching strategy to eliminate common mode voltage using the open-end winding configuration for the induction motor. The switching strategy presented in this paper, does not generate any alternating common mode voltages in the drive system and hence the electrostatic coupling of the common mode voltage, which results in the bearing currents and the leakage currents, is avoided. The proposed scheme is devoid of neutral point voltage fluctuations and does not require neutral point clamping diodes, when compared to the common mode elimination scheme based on the conventional three-level inverter topology. Also, the present scheme uses a single dc-link with half the voltage compared to the conventional three-level inverter based scheme.