A 24-channel implantable neural recording based on time and frequency-division multiplexing

This paper presents a novel approach to encapsulate prerecorded neural signals in implantable neural recording microsystems. We have increased the number of channels and the reconstructed neural signal quality in the receiver by combining time-division-multiplexing (TDM) and frequency-division-multiplexing (FDM) method. Reducing the number of channels in each TDM module is the fundamental advantage of this method that leads to reduced crosstalk noise. We evaluate some possible configurations and propose an optimized system that has less power dissipation and area occupation than other configurations. A 24-channel implantable neural recording based on the optimized system is designed in both system and circuit level. In this system, first, channels are divided into three 8-channel groups then after multiplexing in the time domain, they are combined together by FDM method. Finally, a frequency modulator wirelessly transmits neural signals to an external setup. In addition, we adjust local carrier frequencies and the bandwidth of TDM to synchronize detection without transmitting pilot carrier. To justify the system operation, using 0.18 μm CMOS technology, we design the system in circuit level. The designed circuit consumes a power of 1.39 mW at a supply voltage of 1.8 V. This leads to a power consumption of 58 μW per channel.     

Design of an active CMOS subharmonic mixer with enhanced transconductance

This paper presents a wideband Gilbert subharmonic mixer (SHM) that partly overcomes the fundamental trade-off between radio frequency (RF) and intermediate frequency (IF) currents. Compared to the conventional SHM, the proposed SHM features large gain, low noise figure (NF) and moderate linearity over a wide bandwidth by concurrent usage of regulated-cascode RF-stage and inductive connection between RF and LO stages. Numerical analyses along with circuit-level simulations are given to evaluate the performance of the proposed mixer and facilitate its optimum design. Simulations using a 0.18 μm RF-CMOS process demonstrate that the proposed mixer, at a fixed IF of 100 MHz, exhibits more than 5 dB and 2 dB improvements in conversion gain (CG) and NF, respectively.     

Design of microstrip wide stopband quad-band bandpass filters for multi-service communication systems

This paper presents two planar high performance quad-channel bandpass filters, which are designed based on a novel circular multi-mode resonator. In this paper and for the first time, the proposed resonator is utilized to achieve quad passbands. It consists of diverged feeding lines that are coupled to etched circular cells. The first filter has quite close channels at 2.62, 2.88, 4.34 and 4.67 GHz, which make it appropriate for frequency division duplex (FDD) scheme. Meanwhile, the second filter is designed for WCDMA and WiMAX applications. Both filters are able to attenuate the harmonics up to 19 GHz with a maximum harmonic level of −20 dB. The insertion losses and return losses of both filters at all channels are better than 1.2 dB and 17.5 dB, respectively. The harmonic attenuation method is presented employing a LC equivalent circuit of the proposed resonator. In order to verify the designing methodology, the proposed filters are fabricated and measured where there are good agreements between the simulation and measurement results.     

Economic and system impact of hybrid Raman–EDFA amplification in a 40 × 40 Gbps optical transmission network with DPSK modulation

Demands of modern high-bandwidth services drive the need to constantly improve existing optical amplification technology beyond its current bounds. In this paper, we demonstrate a hybrid broadband amplification scheme which is capable of improving the system performance of a wavelength-division-multiplexed (WDM) network. We present the study of optical signals with differential-phase-shift keying (DPSK) modulation at 40 Gbps and its transmission in a 50-GHz spaced, 40-channel WDM system over an 80-km link with hybrid optical amplification. A comparison of the system and cost impacts of a Raman-only amplification scheme with two hybrid Raman–erbium doped fiber amplifier schemes (Hybrids I and II) is performed. It is shown that one of the proposed hybrid schemes (Hybrid II) outperforms the other by (i) improving the tolerance to signal input power by 17 dB and (ii) increasing the system reach by 55 km for input signal power of 5 dBm, for a bit error rate (BER) performance of 10⁻¹².     

A wavelength routing device by using cyclic AWGs and tunable FBGs

This paper presents a dense wavelength-division multiplexing (DWDM) routing device based on a pair of 1 × N and N × 1 cyclic array waveguide gratings (AWGs) and tunable fiber Bragg gratings (FBGs) to configure all channels in a dynamic network. With the AWG cyclic spectral routing rule, all the DWDM channels (e.g., more than 8 DWDM channels can be configured based on a pair of cyclic 1 × 8 and 8 × 1 AWGs) can be added and dropped by using the multiple tunable FBGs to reflect the channels that need to be dropped to the drop port as well as to reflect the local DWDM channels that are same as the drop wavelength channels to the output port. Three DWDM channels are demonstrated to verify that all the DWDM channels can be added and dropped in one pair of cyclic AWGs. The results show that the proposed DWDM routing device is feasible to use and offers more flexibility in all-optics dynamic networks.     

UWB Metamaterial-based miniaturized planar monopole antennas

In this paper, ultra wide band (UWB) metamterial based compact planar antennas have been designed and experimentally verified. Four novel unit cells have been realized and each unit cell dispersion characteristics are numerically calculated which follows CRLH-TL properties. These four CRLH-TL unit cells are loaded into monopole antennas which result, four open-ended MTM antennas respectively. Further, a novel via free version of CRLH-TL unit cells have been designed, which increases the fabrication flexibility. The compactness has been achieved by realizing ZOR (zeroth order resonance) mode and its bandwidth is increased by realizing small shunt capacitance and large shunt inductance. Further, by optimizing CRLH-TL unit cells, two closely spaced zeroth-order and first-order resonance modes are merged into a single pass band, which gives wide bandwidth. The each proposed antenna has a compact dimension of 0.27 λ₀ × 0.19 λ₀ × 0.02 λ₀ (22 × 15 × 1.6 mm³), where λ₀ is a free space wavelength at 3.8 GHz. The four proposed antennas have S₁₁ < −10 dB impedance bandwidths of 8.4 GHz, 8.5 GHz, 8.2 GHz and 8.3 GHz respectively. The optimum gain, good efficiency, desired radiation characteristics in frequency domain analysis and less distortion of waves in time domain analysis have been achieved for proposed antennas, which are most suitable for UWB applications. The CST-MWS has been used for the parametric study of the proposed antennas. A good agreement has been observed between simulated and experimental results.     

Broadband proximity fed ring microstrip antenna arrays

Various gap-coupled array configurations of ring microstrip antennas and rectangular slot cut ring microstrip antennas with proximity fed slot cut ring microstrip antenna for larger bandwidth and gain are proposed. The rectangular slot in ring patch reduces its orthogonal TM₀₁ and TM₀₂ mode resonance frequencies and along with TM₁₀ modes of fed and parasitic ring patches, yields broadband response. The gap-coupled configuration with ring patch and slot cut ring patch yields bandwidth of nearly 430 MHz with broadside radiation pattern and peak gain of more than 9 dBi. By gap-coupling ring patches along all the edges of proximity fed pair of slot cut ring patch, a 3 × 3 ring microstrip antenna array is realized. It yields bandwidth of more than 460 MHz with peak gain of more than 10 dBi. To further improve upon the bandwidth, a 3 × 3 array of ring patches in which rectangular slot is first cut on the edges of ring patch which are gap-coupled along x-axis and further cut inside the patches which are gap-coupled along x and diagonal axes, is proposed. Both of these configurations yield bandwidth of more than 500 MHz (>45%) with a peak gain of around 10 dBi.     

Configuration of more than N DWDM channels with only one N × N cyclic-AWG-based wavelength routing device

A wavelength routing device based on only one N × N cyclic arrayed waveguide grating (AWG) having easy extended channels configuration is presented in this paper. It is easy to extend the dense wavelength division multiplexing (DWDM) channel configuration through this wavelength routing device. According to the cyclic wavelength of AWG, the wavelength routing devices are easy to configure more than N extended DWDM channels through cascading more proper tunable fiber Bragg gratings (FBGs). With only one 8 × 8 AWG, two different wavelength routing structures were built to evaluate static crosstalk and the bit-error-rate (BER). Three of the 16 inputted DWDM channels were demonstrated to verify that the proposed wavelength routing device, with only one 8 × 8 AWG, could configure extended DWDM channels without interfering with other channels. The results show that the wavelength routing device can produces a better performance and offers a cheaper way to extend the DWDM channel configuration for a dynamic network.     

A low voltage and low power parallel electronically tunable resistor with linear and nonlinear characteristics

In this paper a bilateral resistive circuit is designed and presented with is work as a positive and negative electronically tunable resistor and has zero DC offset. The proposed topology is designed by paralleling two electronically tunable resistors to obtain lower resistive values and decreasing nonlinearity percent. The proposed topology is low voltage and low power and with proper transcurrent circuit, its current–voltage characteristics can be linear, expansive (square) and compressive (square root). Its supply voltages are ±1 V and its dynamic range is ±1 V too. The designed circuit is simulated in an industrial 65 nm CMOS process. The linear version is tunable over the wide resistance range of 7 kΩ–37 GΩ.     

Design and analysis of implantable CPW fed bowtie antenna for ISM band applications

A novel implantable coplanar waveguide (CPW) fed crossed bowtie antenna is proposed for short-range biomedical applications. The antenna is designed to resonate at 2.45 GHz, one of the industrial-scientific-medical (ISM) bands. It is investigated by use of the method of moments design equations and its simulation software (IE3D version 15). The size of the antenna is 371.8 mm³ (26 mm × 22 mm × 0.65 mm). The simulated and analyzed return losses are −23 and −25 dB at the resonant frequency of 2.45 GHz. We have analyzed some more performances of the proposed antenna and the results show that the proposed antenna is a perfect candidate for implantation. The proposed antenna has substantial merits like low profile, miniaturization, lower return loss and better impedance matching with high gain over other implanted antennas.     

Charge cross talk in sub-lithographically shrinked 32 nm Twin Flash™ memory cells

The extended scalability of Twin Flash memory cells down to 32 nm half pitch is demonstrated in a conventional planar cell layout. Starting with 63 nm line space array and doubling the number of word lines, a cell size of 0.0112 μm² can be achieved. By dividing available space into 43 nm cell width and 20 nm space between adjacent cells the electrical cell characteristics could be maintained the same as in the previous 63 nm generation. It was found that the proposed aggressive shrinking of the cell spacing in word line direction results in a cross talk of 300 mV when both neighboring cells are programmed to the highest MLC level. The charge cross talk in charge trapping memory (CT) cells is reported for the first time and becomes an issue when cell spacing between Twin Flash and other CT cells as e.g. TANOS approaches the 20 nm mark.     

Study on crosstalk characteristic of carbon nanotube through silicon vias for three dimensional integration

Coupling noise induced by through silicon vias (TSVs) is expected to be a major concern for three dimensional integrated circuits (3-D ICs) system design. Using equivalent electrical parameters for carbon nanotube (CNT) TSV interconnects, a lumped crosstalk noise model is introduced to capture the TSV-to-TSV coupling noise in CNT via based 3-D ICs and validated with multiple conductor transmission line (MTL) simulation results. The effect of geometrical and material parameters involved on the noise transfer function and peak crosstalk noise, such as insulation thickness, TSV–TSV spacing, TSV height, TSV radius, substrate conductivity and metallic CNT density, is investigated with the proposed model. Simulation results show that the TSV coupling can be divided into three frequency behavior regions. Three approaches using driver sizing, grounded vias shielding and air gap-based silicon-on-insulator (SOI) technique are proposed to mitigate TSV crosstalk coupling noise. The proposed approaches are demonstrated in frequency- and time- domain simulations. They provide the reduction in full-band noise transfer function by an average of 11.71 dB, 24.85 dB and 3.46 dB, and the decrease in 1 GHz peak noise voltage by 53.24 mV, 40.72 mV and 15.1 mV.     

Temperature-dependent ambipolar electrical characteristics of pentacene-based thin-film transistors: The impact of opposite-sign charge carriers

The temperature-dependent electrical and charge transport characteristics of pentacene-based ambipolar thin-film transistors (TFTs) were investigated at temperatures ranging from 77 K to 300 K. At room temperature (RT), the pentacene-based TFTs exhibit balanced and high charge mobility with electron (μ_e) and hole (μ_h) mobilities, both at about 1.6 cm²/V s. However, at lower temperatures, higher switch-on voltage of n-channel operations, almost absent n-channel characteristics, and strong temperature dependence of μ_e indicated that electrons were more difficult to release from opposite-signed carriers than that of holes. We observed that μ_e and μ_h both followed an Arrhenius-type temperature dependence and exhibited two regimes with a transition temperature at approximately 210–230 K. At high temperatures, data were explained by a model in which charge transport was limited by a dual-carrier release and recombination process, which is an electric field-assisted thermal-activated procedure. At T < 210 K, the observed activation energy is in agreement with unipolar pentacene-based TFTs, suggesting a common multiple trapping and release process-dominated mechanism. Different temperature-induced characteristics between n- and p-channel operations are outlined, thereby providing important insights into the complexity of observing efficient electron transport in comparison with the hole of ambipolar TFTs.     

Time domain analysis for foldable thin UWB monopole antenna

In this paper, the time domain analysis of an Ultra Wide Band antenna flexible circular monopole antenna is presented. The antenna is fabricated on liquid crystalline polymer flexible substrate with a compact geometry that makes it suitable for wearable applications under different bending conditions. The antenna is fed by coplanar waveguide transmission line and has a compact total size of 40 × 22 mm². Moreover, the antenna has good radiation efficiency (97%) over the bandwidth. The presented antenna has a good performance over the operating spectrum for straight and bending configurations. The design principals along with simulation and experimental results are presented in this contribution.     

CMOS linear high performance push amplifier for WiMAX power amplifier

In this work a novel and efficient approach is proposed to optimize the linearity and efficiency of power amplifiers used in mobile WiMAX applications. A linear and high performance push amplifier is designed and implemented in 0.18 μm CMOS technology to enhance the linearity of a class-E switched-mode power amplifier. The proposed push amplifier consists of two sections; analog and switching sections. The analog section provides required linearity and the switching section guarantees satisfying total efficiency level. Each block is designed and optimized to meet required specifications. The core power amplifier which is a class-E switched-mode power amplifier is also designed to have maximum possible efficiency. The implemented circuit is simulated using HSPICERF and TSMC models for active and passive elements. The proposed power amplifier provides a maximum output power of 25 dBm and a power added efficiency (PAE) as high as 48% at 2.5 GHz operation frequency and supply voltage of 1.8 V. At 1 dB compression point this PA exhibits 23 dBm of output power with 42% PAE and 4.5% EVM which was appropriate for 64QAM OFDM signals.     

A low phase noise and low spur PLL with auto frequency control circuit for L1-band GPS receiver

A low phase noise and low spur phase-locked loop (PLL) for L1-band global positioning system receiver is proposed in this paper. For obtaining low phase noise for PLL, All-PMOS LC-VCO with varactor-smoothing technique and noise-filtering technique is adopted. To reduce the reference spur, a low current-mismatch charge pump is carefully designed. A quasi-closed-loop auto frequency control circuit is used to accelerate the lock process of PLL. The PLL is fabricated in 180 nm CMOS Mixed-Signal process while it operates under 1.8 V supply voltage. The measured output frequency of PLL is 1.571 GHz and output power is −1.418 dBm. The in-band phase noise is −98.1 dBc/Hz @ 100 kHz, while the out-band phase noise is −130.3 dBc/Hz @ 1 MHz. The reference spur is −75.8 dBc at 16.368 MHz offset. When quasi closed-loop AFC is working, the measured lock time is about 10.2 μs.     

Hexagonal boundary Sierpinski carpet fractal shaped compact ultrawideband antenna with band rejection functionality

In this paper a second iteration Sierpinski carpet fractal shape UWB antenna with hexagonal boundary is presented. The antenna covers the frequency band from 3 GHz to 12 GHz (VSWR ≤ 2). The proposed antenna has the capability to reject 5.15–5.825 GHz band assigned for IEEE802.11a and HIPERLAN/2 which is achieved by embedding a ‘Y’ shaped slot in the radiator that extends to the central conductor of the CPW feed as well. A fabricated prototype is developed where the simulation and experimental results are in good agreement. Measured peak antenna gain varies from 1.25 dBi to 6 dBi within the band. The proposed antenna has a compact size of 33 mm × 32 mm that includes the substrate around the radiating element. Time domain characteristic reveal that the antenna is non-dispersive with a variation of measured group delay within 0.5 ns over the entire band.     

A Regenerative Prescaled Clock Recovery for High-Bit-Rate OTDM Systems

A regenerative prescaled clock recovery device based on an optoelectronic version of the Miller divider has been tested in high-bit-rate OTDM systems. Tests at 4 × 2.5 and 4 × 10 Gbit/s have been performed to characterize the locking range and the frequency response of the device. The timing jitter of the recovered signal in the case of the 4 × 10 Gbit/s OTDM system does not exceed 0.5 ps. Finally, a comparison of two bit-error-rate measurements (with and without the clock recovery system) were carried out for the 4 × 10 Gbit/s OTDM system. The relevant penalty for each channel is negligible, while the maximum received power difference among the four channels at a bit error rate value of 10 ^− 10 is around 0.7 dB.     

A low-voltage low-power CMOS fully differential linear transconductor with mobility reduction compensation

A highly linear fully differential CMOS transconductor architecture based on flipped voltage follower (FVF) is proposed. The linearity of the proposed architecture is improved by mobility reduction compensation technique. The simulated total harmonic distortion (THD) of the proposed transconductor with 0.4V_pp differential input is improved from ?42 dB to ?55 dB while operating from 1.0 V supply. As an example of the applications of the proposed transconductor, a 4th-order 5 MHz Butterworth Gm-C filter is presented. The filter has been designed and simulated in UMC 130 nm CMOS process. It achieves THD of ?53 dB for 0.4V_pp differential input. It consumes 345 μw from 1.0 V single supply. Theoretical and simulated results are in good agreement.