洱海流域环保移动执法系统的研究与实现

为了提高洱海流域环保执法的质量和效率,改进环保现场执法手段,解决"执法人员少、执法任务重"的矛盾,以及规范执法流程,针对洱海流域环保执法的特点,基于SOA架构,采用移动互联网络等最新技术,构建了一套基于Android平台的洱海流域环保移动执法系统,实现了现场取证、现场记录、及时上传、打印、实时查询、人员定位和移动办公等功能,以加强执法能力,实现跨地区的全方位的移动执法。     

基于CDMA信道倍增的警用移动视频监控系统

基于通过应用公安信息化手段以提高公安部门现场执法效能的目的,提出基于CDMA多通道技术的巡逻车视频监控系统。系统通过捆绑多个CDMA链路通道,并在传输控制中使用多路捆绑处理,实现实时采集和传输现场执法数据,及时跟踪记录执法现场。系统实现了远程扁平化指挥,可以有效控制局势和精确打击犯罪,并对警察保护自身合法权益提供有效保障。     

基于PCIe总线的航空视频采集记录系统的设计

PCIe总线不仪硬件接口简单,软件和PCI总线完全兼容,而且传输速度数十倍于PCI总线.针对载机任务系统实时视频采集记录的需求,设计了一种基于PCIe总线的航空视频采集记录系统,利用现场可编程逻辑器件(FPGA)实现了视频数据流的编解码和PCIe桥接口的设计,简化了硬件接口设计,提高了系统的工作效率.系统在某型数字化对...     

IP传输逼近演播室中心

最近英国的一则消息称BSkyB新闻局将采用便携的流媒体设备Streambox ACT-L3新闻采集设备来扩大实况报道和录像报道的能力.该设备与Windows和Mac兼容,使记者可以在现场通过不同的低带宽的IP网传送高质量的图像,使新闻记者具有了前所未有的灵活性.BSkyB为此更新了过时的设备,取而代之的是通过Inmarsat宽带全球局域网（BGAN）或通过DSL、本地Wi-Fi、旅店的互联网等IP传输网传输现场新闻.可以直接使用卫星电话和其他IP网络连接演播室进行视音频传输和记录.但此举是否意味着传统的微波回传或SNG就是BSkyB所说的过时技术尚不好定论,但对上述技术的冲击和长远的影响是不言而喻的!     

基于i.MX35的挖掘机视频监控系统设计

挖掘机等工程机械需要对施工现场的视觉盲区进行视频监控,确保作业安全.为了满足安全需求,研制了基于i.MX35的挖掘机视频监控系统,使用i.MX35作为视频主处理器、ADV7180作为NTSC/PAL摄像头输出视频的解码芯片、eMMC或PATA接口固态硬盘作为视频存储介质,实现对挖掘机等工程机械作业现场的视频监控、记录与回放等功能,能够显著提高生产效率、保证作业安全,可以广泛应用于挖掘机等工程机械的控制系统中.     

现场采集单元虚拟化实践

现场采集单元是动环监控系统的最小子系统,包含采样、数据处理、数据中继等功能.通过将现场采集单元的功能进一步划分为基于硬件的采集功能和基于软件的处理功能,进而将软件处理功能组成虚拟现场监控单元池,由云平台进行承载,现场硬件和云平台统一运行在专用IP网络中,实现现场监控单元的虚拟化.     

现场数据采集解决方案及应用实例

分析了企业信息管理系统存在的问题,介绍了一种现场数据采集解决方案,给出了一种基于现场总线的数据采集和管理系统,重点介绍实际应用中遇到的原有仪表接入采集系统的问题,详细给出了以LED及LCD为显示输出的仪表的改造方案.     

通用型多通道高速数据采集记录仪

目前数据采集记录仪体积较大,采样频率低,记录通道少,记忆空间易受干扰而多变。本系统以Xilinx的Virtex-5系列现场可编程门阵列(FPGA)芯片XC5VLX30作为核心控制单元;采用ADI公司的高速AD进行模数转换;外围采用多片并口存储器作为存储单元,延长记录时间。本系统能够采样16通道以上、精确度8位模拟信号,采样速率能达500 Mbps以上,并把采样数据无线传输给上位机进行处理。     

二维加速度采集系统的设计

系统基于MODEL1221加速度传感器,利用MSP430F1611单片机对加速度传感器采集到的信号进行处理并通过串口上传给上位机.本文给出了加速度传感器和MSP430单片机的特性,以及系统的硬件构成和软件流程.通过现场试验,证明该系统能够达到二维加速度采集的设计要求.     

3G／4G移动高清指挥调度系统的应用与效果探析

随着经济的快速发展．城市治安管理不可避免地存在盲点．使犯罪分子抱有侥幸心理,认为有机可乘．从而破坏城市治安环境、威胁到人民生命财产安全。然而．当前的现状是巡逻和执勤警员在执行治安任务时．存在执法取证难．上级指挥信息沟通难等问题。不能记录执法过程信息．上级领导和监控中心不能实时了解一线治安执法现状等情况．只能通过常规的通信手段或逐级上报的方式．严重影响了重要治安事件的快速决策与指挥调度。同样情况通常也出现在抢险救灾、城市管理等一切紧急突发事件上．这种情况往往要求决策者第一时间掌握现场情况．从而快速作出决断．正确处理突发事件。     

一款切合实际的30A能量计

本文介绍了一款集成了30A检测电阻器LTC2947.     

A Nyquist-rate delta-sigma A/D converter

This paper describes an analog-to-digital converter which combines multiple delta-sigma modulators in parallel so that time oversampling may be reduced or even eliminated. By doubling the number of Lth-order delta-sigma modulators, the resolution of this architecture is increased by approximately L bits. Thus, the resolution obtained by combining M delta-sigma modulators in parallel with no oversampling is similar to operating the same modulator with an oversampling rate of M. A parallel delta-sigma A/D converter implementation composed of two, four, and eight second-order delta-sigma modulators is described that does not require oversampling. Using this prototype, the design issues of the parallel delta-sigma A/D converter are explored and the theoretical performance with no oversampling and with low oversampling is verified. This architecture shows promise for obtaining high speed and resolution conversion since it retains much of the insensitivity to nonideal circuit behavior characteristic of the individual delta-sigma modulators     

A charge-domain D/A conversion system

In this article, a new multiplication type D/A conversion system using CCD is proposed and the result of simulations for evaluating its performance is reported. The system consists of a recursive charge divider which divides input charge-packet Qin sequentially into output charge-packets Qin · 2^-i and two charge-packet accumulators which accumulates output charge-packets from the recursive divider selectively according to digital input signal bits starting from MSB. The system converts input digital signal bit by bit, fully in charge-domain, thus the power consumption for this system is supposed to be very low. Also in this article, an effective method to achieve higher accuracy for splitting a charge-packet into two equal-sized packets using very simple hard-ware structure is proposed. As the result of simulations, we have found that the upper limit of accuracy for the conversion is determined by transfer efficiency of CCD, and within this range a trade-off relationship exists among conversion-accuracy, circuit-size and conversion-rate. This unique relationship enables to reduce the circuit size of D/A converter significantly maintaining the accuracy of conversion by slowing down the conversion-rate. This D/A converter is appropriate especially for the system integration because of its simple structure, tolerance to the fabrication error and low power consumption inherrent in the nature of CCD. By using of this system, it is expected to be possible to realize a focal plane image processor performing parallel analog operations such as DCT conversion with CCD imager incorporated on the same Si chip by the same MOS process technology.     

A monolithic video A/D converter

The design and measured performance of a fully parallel monolithic 8-bit A/D converter is reported. The required comparators and combining logic were designed and fabricated with a standard high-performance triple-diffused technology. A bipolar comparator circuit giving good performance with high input impedance is described. Circuit operation is reported at sample rates up to 30 megasamples per second (MS/s), with analog input signal power at frequencies up to 6 MHz. Full 8-bit linearity was achieved. An SNR of 42-44 dB was observed at input signal frequencies up to 5.3 MHz.     

一种识别说话者的新方法

在能够自动识别视频中的说话者的系统中,大部分采用的是声音和唇部运动相结合的方法。文中则采用了另一种方法有效地达到了目的,即通过检测人体头部和手部的运动来鉴别说话者。基于演讲者在说话时通常会伴有头部运动或是手部运动,该方法既能实现说话者的检测,又能避免由于观测点过远而导致无法判断人唇部运动的局限性。在系统的实施过程中,运用了多种图像处理方法,并且对三帧差运动法做出了改善,使其能更高效、更准确地检测到头部和手部的运动。经过多个不同的视频测试后,本系统的F1 score高达91．91％,从而验证了该系统的可行性。     

A charge-balancing monolithic A/D converter

The quest for a minimum-parts-count DPM led to the development of this monolithic, low power analog-to-digital converter. It incorporates the analog and digital functions historically implemented separately with specialized process technologies into a chip with full /spl plusmn/3 digit accuracy. The integration of resistors, compensation capacitors, and an oscillator reduces the external component complement to three capacitors and one adjustable reference. TTL compatible outputs include sign, overrange, and under range information in addition to the three digit strobes and the BCD data outputs. The logic operates between +5 V and ground, the linear section between +5 V and -5 V. The paper describes the conversion algorithm and its CMOS implementation, emphasizing the analog design of this innovative device.     

A Convenient Multivariate Gram-Charlier Type A Series

It is often necessary to approximate the probability density function of a random variable from given statistical moments. The Gram-Charlier Type A series is one well known method for such representations. In this note, the Gram-Charlier Type A series is generalized to the multidimensional case.     

高速高精度A/D转换器

本文介绍了用于观测太阳磁场的天文望远镜系统的高速高精度局部级联式多阈值A/D转换器。文章着重讨论了,为实现高速、高精度所采用的技术要点,并提出了研制高速高精度A/D转换器所必须考虑的有关问题。 我们所研制的A/D转换器,分辨率为1mV,相对误差0.025％,字长12位,前面接采样保持电路后,速度为10万次/秒。     

A stereo audio sigma-delta A/D-converter

A stereo sigma delta A/D-converter for audio applications is presented. In this converter, two identical cascaded fourth-order sigma-delta modulators and a sophisticated multistage linear-phase FIR decimation filter with oversampling ratio of 64 are implemented on the same die. The analog part is designed to operate at a low voltage with a low power consumption. Techniques to achieve simultaneously a high performance and a low power consumption are discussed in details. The minimum stopband attenuation of the decimator is more than 120 dB and the passband ripple of the overall converter is less than 0.0003 dB. The first decimation stage is a special tapped comb filter, whereas the remaining stages are realized without general multipliers by simultaneously implementing all the filter coefficients by using special bit-serial networks. For the integrated overall stereo converter, the power consumption and the signal-to-noise ratio are 180 mW and 97 dB (85 mW and 95 dB) for a 5 V (3 V) power supply. The circuit die area is only 4.7 mm×5.5 mm using a 1.2 μm double-poly BiCMOS process     

A superconducting tracking A/D converter

The design and fabrication of a superconducting A/D converter using Josephson technology are described. The 4-b A/D converter circuit was fabricated using a ten-level all-Nb technology. It uses a self-aligned lift-off process to define the Nb-Al₂O₃ -Nb Josephson junctions. Results from experiments performed on the prototype system at a few kilohertz sampling rate are presented