一种X波段船舶导航雷达射频接收机设计

根据一种X波段船舶导航雷达的总体技术指标,研制了一款与之配套的低噪声镜像抑制射频前端接收机。整个接收机由限幅、低噪声放大、镜像抑制混频三个主要功能模块构成。在研制过程中采取由独立到集成的研制思路,在每个独立模块的性能经测试符合技术指标的基础上再进行整个接收机的集成设计及实验测试,给出了接收机的噪声及链路增益测试曲线。测试结果表明：该射频接收机在9.36 GHz~9.46 GHz频率范围内具有3.6 dB的噪声系数及2.5 dB的链路增益,镜像抑制度达到30 dB,各项性能指标均满足船舶导航雷达使用要求。整个前端模块体积小、成本低,适合民用领域的规模化生产。     

一种宽带谐波雷达接收前端的设计

谐波雷达是一种对非线性目标进行探测和识别的系统。为了提高系统抗复杂电磁环境的能力,本文根据可变频发射谐波雷达探测系统的技术需求,提出了一种宽带谐波接收前端的设计方案。对涉及的合成扫频信号发生、基波抑制、镜像频率抑制、大动态范围宽带接收以及低噪声等关键技术进行了分析,提出了解决方案,对接收前端的关键器件给出了具体设计指标。通过对谐波雷达接收前端系统的仿真与分析,实物研制与测试,验证了方案的可行性。     

带温漂补偿的小型化毫米波单脉冲雷达接收前端

介绍一种用于非相参雷达导引头的毫米波接收前端小型化低温漂设计技术。采用多芯片混合集成电路和镜频抑制混频器技术,设计了一种小型化三通道高放混频接收前端。针对非相参雷达特点,对接收机本振采用频率漂移的温度补偿技术,保证了全温范围内接收机对信号频率的稳定跟踪。测试结果表明,接收前端噪声系数低于4.0 dB,镜频抑制大于25 dB,全温范围内温度漂移小于0.6 MHz/℃。     

0.18μm CMOS宽带镜像抑制混频器的设计

采用TSMC 0.18 μm CMOS工艺,设计了一种位于3.0~3.4 GHz之间,用于雷达接收机前端的宽带镜像抑制混频器.整个混频器包含3个多相滤波器,1个本振缓冲放大器,4个核心Gilbert混频器单元.通过ADS2003仿真,镜像抑制度为60 dB,达到预期结果.利用设计出的宽带镜像抑制混频器,可以直接和低噪声放大器组成接收前端电路,避免片外滤波器的使用,大大提高了集成度.     

基于半主动导引头的通道间对消算法研究

针对半主动雷达导引头的工作特点,导引头接收天线不仅接收到目标回波信号,还会收到地面雷达发射的探测直达波。直达波功率高于回波功率数个量级,导致目标回波信号被淹没,造成目标检测概率降低、测角误差增大等不利影响,需对直达波进行抑制。基于半主动导引头平台,本文提出一种有效抑制直达波的通道间对消算法,可极大的提高信干噪比,有利于目标检测及目标特征的进一步提取。本算法简捷有效易于导引头平台实现,具有较高的推广应用价值。     

被动雷达导引头信号分选算法研究及仿真

被动雷达导引头所接收的信号是随机交迭的不匹配信号,如何在接收到的信号脉冲流中分离出目标雷达的脉冲序列,是被动雷达导引头信号处理技术的基础。针对被动雷达导引头信号分选技术介绍了几种常用算法的原理,讨论了各种算法的缺陷,并结合机载雷达的特点,对序列差直方图法（SDIF）进行了仿真和分析。经过改进后,SDIF算法更适合应用于高信号密度和高实时性要求的场合,具有一定的实用价值。     

X波段微波低噪声混合集成接收前端

介绍了低噪声GaAsFET用作单脉冲跟踪雷达前端放大时的持点、系统构成以及低噪声放大器和镜像抑制混频器的设计方法和制作。测试结果性能满意，在近1GHZ频率范围内系统总噪声系数小于2．5dB，放大器增益大于20dB，混频器镜像抑制度大于20dB，三路放大器之间幅度不平衡小于0．8dB，相位不平衡小于7°。该混合集成微波前端已成功地用于某型火控雷达，对海面上低空小目标进行跟踪。     

L波段数字声广播接收机CMOS集成模拟前端

本文设计了使用CMOS工艺,单片集成的L波段数字声广播(DAB)接收机模拟前端.接收机前端应用了三种方法来提高镜像抑制度:低中频双正交weaver结构比一般的同相/正交(I/Q)两路下变频结构具有更高的镜像抑制能力;镜像抑制低噪声放大器(LNA)提供了额外的镜像信号抑制;具有相位和幅度校正功能的本振驱动器提供了更精确的正交本振信号.仿真显示接收机前端对镜像信号的抑制超过65dB,其级联噪声指数为4dB,输出三阶交调指数为22dBm.接收机前端使用TSMC 0.25μm CMOS工艺制作,版图核心面积为9mm²,目前正在测试中.     

机载预警雷达海面多目标航迹起始算法研究

描述了一种应用于信息对抗领域的6~18GHz宽带接收前端设计,针对接收前端噪声系数、增益、动态范围等技术指标进行设计与分析,并对关键电路进行设计与仿真,使其能满足技术指标要求。电路基于MCM多芯片微组装技术,集成了MMIC有源放大器芯片、无源均衡器、衰减器芯片等,电路具有超宽带、低噪声、大动态和良好的多通道幅相一致性等特点,同时结构上采用集成一体化设计,提高了接收前端组件可靠性和稳定性,便于整机集成,广泛应用于电子对抗雷达接收系统。     

一种宽带零中频收发前端设计

针对数字相控阵雷达通道数众多,而零中频架构具有小体积、低成本的优势,介绍了一种宽带零中频收发前端的设计。该方案采用了ADI公司的宽带正交调制器ADL5375作为发射上变频器,宽带正交解调器ADL5380作为接收下变频器,以AD9862的发射路径和接收路径分别作为DAC和ADC。经过硬件软件的测试,幅相不平衡约在0.22 dB/10.2°,镜像抑制比达8.343 dB。各功能模块性能良好,可以作为适合FPGA通用的宽带零中频收发前端平台。     

提高接收机无虚假响应动态范围的研究

复杂的电磁环境要求侦察接收机同时具有高的灵敏度和高的动态范围,侦察接收机中的虚假响应制约着接收机动态范围的提高。侦察接收机中的射频模拟前端由放大器、滤波器及混频器等多级模块构成,其产生的虚假响应是实现大动态接收机的技术瓶颈之一。工程上要有效提高接收系统的无虚假响应动态范围,需要针对接收机射频模拟前端采取优化系统设计、采用高性能器件、提高线性度等很多措施。     

采用LTCC技术的X波段接收前端MCM设计

多芯片组件(MCM)是目前实现机载雷达接收前端小型化的最有效途径。文中对X波段全频段多功能接收前端的组成、采用LTCC技术的MCM设计实现及实物测试数据进行了叙述和分析,给出了采用LTCC技术的X波段多功能接收前端MCM设计的一种解决方案。该MCM接收前端的测试指标满足雷达通用接收前端要求,为雷达小型化多功能接收前端的设计提供了参考依据。     

Ku频段接收前端的高本振抑制设计

介绍了Ku频段接收前端的高本振抑制设计方法。归纳并分析了高频本振信号的泄露途径,针对性地进行相应的电路和结构优化设计,实现了对泄露信号的高抑制度。最终研制完成的Ku频段接收前端对本振泄漏信号的抑制度最大达到96 dBc。5套样机的测试结果验证了分析与设计的有效性。     

宽带数字接收机射频前端电路设计

宽带数字接收机在无线电频谱管理领域内具有重要的应用,其中射频前端电路指标对整机设备性能的影响显著。文中介绍了一种射频前端电路通用的设计方案,重点分析了各射频器件性能指标对接收机链路的影响,以及对无线电监测与测向结果的影响。最终提出了改进电路拓扑结构设计的措施与办法,并给出了基于该设计思路的具体工程应用实例,取得了良好的应用效果。     

Decoupled compensation of IQ imbalance in MIMO OFDM systems

The direct-conversion architecture is an attractive front-end design for multi-input multi-output (MIMO) orthogonal frequency division multiplexing (OFDM) systems. These systems are typically small in size and provide a good flexibility to support growing number of wireless standards. However, direct-conversion based OFDM systems are generally very sensitive to front-end component imperfections. These imperfections are unavoidable especially when cheaper components are used in the manufacturing process and can lead to radio frequency (RF) impairments such as in-phase/quadrature-phase (IQ) imbalance. These RF impairments can result in a severe performance degradation. In this paper, we propose training based efficient compensation schemes for MIMO OFDM systems impaired with transmitter and receiver frequency selective IQ imbalance. The proposed schemes can decouple the compensation of the transmitter and receiver IQ imbalance from the compensation of the channel distortion. It is shown that the proposed schemes result in an overall lower training overhead and a lower computational requirement as compared to a joint estimation/compensation of IQ imbalance and the channel distortion.     

L波段DBF体制雷达接收前端的设计

详细介绍了一种L波段DBF体制雷达的接收前端的设计过程.该前端采用超外差式二次变频体制,并最大限度提高各单元电路的集成度,实现了高度的宽温稳定性和批次一致性.测试结果充分证明该项技术已经成熟.     

软件无线电跳频电台接收机射频前端设计

基于软件无线电的基本要求和发展趋势,提出了一种应用在软件无线电跳频电台中接收机射频前端电路结构,分析了接收机射频前端的总体设计方案,包括前端各部分增益的分配、动态范围的分配、噪声系数及灵敏度的计算,讨论了对器件选择的考虑.实际测试结果表明,该射频前端性能指标满足设计要求.     

250MHZ单边带接收机前端电路的设计与实现

为了有效地抑制各种干扰,提高甚高频单边带接收机性能,关键是有一个性能良好的前端电路.就这一问题,文章介绍了前端电路在甚高频单边带接收机中的作用和研制250MHZ单边带接收机前端电路的设计方法,同时给出了实验结果,结果表明各种干扰被有效地抑制了.     

A Decision Feedback Reverse Link Receiver Implementation for IS-95 CDMA Communications

An implementation of a reverse link receiver for IS-95 CDMA (Code-Division Multiple-Access) communications that applies decision feedback to the decoding of the received signal is presented. Decision feedback is used in order to improve BER performance by making use of additional information that conventional receiver designs generally ignore. Qualitative analysis and computer simulation of the hardware components of the proposed implementation shows that it can be built as a single integrated circuit using present day technology. The design presented here does not include the RF front-end of the receiver, does not consider the effects of multipath and fading on system performance, and assumes perfect power control.     

Design and measurements of a RF front-end for Bi-band simultaneous reception

In this paper, we explore spectrum field band simultaneous receivers, with a special emphasis on only one aspect of these systems – the radio front-end. We propose, to validate in the lab, a receiver scheme for the simultaneous down-conversion of two signals in different bands. Obviously, the dedicated scheme is intended for practical use in an integrated circuit. In this work, the chosen receiver is implemented with discrete components. A test set is evaluated and compared to simulations; it contains mostly standard lab equipment, processing signals, according to the receiver scheme; this receiver presents merits and it is worth demonstrating in an integrated circuit.In order to give credit to the use of this type of receiver, the EDA model and results have to be validated by measurement. Therefore, based on the receiver architecture dedicated to an 802.11/UMTS simultaneous dual-channel processing, we design and fabricate a prototype. Firstly, we measure the intrinsic metrics of this prototype in terms of noise figure, gain, linearity, phase and gain mismatch between the two branches of the quadrature mounted mixers. In the present work, we demonstrate that, for instance, as NF and IIP3 change with the RF front-end gain with the improvement of the RF front-end performance, the linearity and the noise requirements are well handled. Afterwards, these metrics are injected in the EDA receiver model and simulations are done in order to evaluate the BER evolution.