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1.
Today's on-board high-density, low-output-voltage, high-output-current, fast transient point-of-load (POL) dc-dc converters design requirements for the new generation of integrated circuits, digital signal processors, and microprocessors are increasingly becoming stricter than ever. This is due to the demand for high dynamic performance dc-dc conversion with tight dynamic tolerances for supply voltages coupled with very high power density. In this paper, a multiphase voltage-mode hysteretic controlled POL dc-dc converter with new current sharing is presented. Theoretical analysis is provided for multiphase and interleaved dc-dc converters with new current sharing method. The simulation and experimental results are compared based on a specific design example.  相似文献   

2.
This paper describes a classification of paralleling schemes for dc-dc converters from a circuit theoretic viewpoint. The purpose is to provide a systematic classification of the types of parallel converters that can clearly identify all possible structures and control configurations, allowing simple and direct comparison of the characteristics and limitations of different paralleling schemes. In the proposed classification, converters are modeled as current sources or voltage sources, and their connection possibilities, as constrained by Kirchhoff's laws, are categorized systematically into three basic types. Moreover, control arrangements are classified according to the presence of current sharing and voltage-regulation loops. Computer simulations are presented to illustrate the characteristics of the various paralleling schemes  相似文献   

3.
This paper describes a new digital control method to enhance the dynamic performance of a dc-dc converter used in plasma display panel (PDP). A simple digital PID compensator with duty ratio feed-forward control is proposed to minimize the output voltage variation while the load current is continuously changing. The duty ratio feed-forward is calculated using noise-free load current information which is predicted by the available video data of the PDP. No separate current sensing circuit is required. A small signal z-domain feed-forward model is derived for the performance analysis and controller design. The proposed control method is experimentally verified on an asymmetrical half bridge dc-dc converter which supplies power to a 42 in PDP.  相似文献   

4.
Using analog wireless communication, we demonstrate a master-slave load-sharing control of a parallel dc-dc buck converter system, thereby eliminating the need for physical connection to distribute the control signal among the converter modules. The current reference for the slave modules is provided by the master module using radio-frequency (RF) transmission, thereby ensuring even sharing of the load current. The effect of delay due to RF transmission on system stability and performance is analyzed, and regions of operation for a stable as well as satisfactory performance are determined. We experimentally demonstrate a satisfactory performance of the master-slave converter at 20-kHz switching frequency under steady state as well as transient conditions in the presence of a transmission delay. The proposed control concept, which can potentially attain redundancy that is achievable using a droop method, may lead to more robust and reconfigurable control implementation of distributed converters and power systems. It may also be used as a (fault-tolerant) backup for wire-based control of parallel/distributed converters.  相似文献   

5.
对开关电源进行模块化设计和并联运行是提高系统可靠性和扩大供电容量的有效手段。但电源的并联运行需要采用均流措施。均流方法多种多样,其中效果较好的是自主均流法。文中采用小信号分析法对PWM变换器及其并联运行所采用的自主均流法进行了建模和仿真分析,结果验证了自主均流法的三环控制的合理性。  相似文献   

6.
Boost DC-AC inverter: a new control strategy   总被引:6,自引:0,他引:6  
Boost dc-ac inverter naturally generates in a single stage an ac voltage whose peak value can be lower or greater than the dc input voltage. The main drawback of this structure deals with its control. Boost inverter consists of Boost dc-dc converters that have to be controlled in a variable-operation point condition. The sliding mode control has been proposed as an option. However, it does not directly control the inductance averaged-current. This paper proposes a control strategy for the Boost inverter in which each Boost is controlled by means of a double-loop regulation scheme that consists of a new inductor current control inner loop and an also new output voltage control outer loop. These loops include compensations in order to cope with the Boost variable operation point condition and to achieve a high robustness to both input voltage and output current disturbances. As shown by simulation and prototype experimental results, the proposed control strategy achieves a very high reliable performance, even in difficult transient situations such as nonlinear loads, abrupt load changes, short circuits, etc., which sliding mode control cannot cope with.  相似文献   

7.
The fast response double buck (FRDB) dc-dc converter was presented like a low output voltage dc-dc converter with fast transient response, in order to feed devices such as microprocessors and digital signal processors (DSPs). The topology of the FRDB is composed of two buck converters connected in parallel, each one of them with different features and aims, and controlled by means of the novel linear-non-linear (LnL) control. In this paper, the topology, the control strategy and the operation principle are shown. Finally, experimental results in different prototypes are presented to show both, the transient response and the recovery time when these prototypes are subjected to load current steps, and the influence of the output filter on these parameters.  相似文献   

8.
9.
This paper explores a new configuration for modular DC/DC converters, namely, series connection at the input, and parallel connection at the output, such that the converters share the input voltage and load current equally. This is an important step toward realizing a truly modular power system architecture, where low-power, low-voltage, building block modules can be connected in any series/parallel combination at input or at output, to realize any given system specifications. A three-loop control scheme, consisting of a common output voltage loop, individual inner current loops, and individual input voltage loops, is proposed to achieve input voltage and load current sharing. The output voltage loop provides the basic reference for inner current loops, which is modified by the respective input voltage loops. The average of converter input voltages, which is dynamically varying, is chosen as the reference for input voltage loops. This choice of reference eliminates interaction among different control loops. The input-series and output-parallel (ISOP) configuration is analyzed using the incremental negative resistance model of DC/DC converters. Based on the analysis, design methods for input voltage controller are developed. Analysis and proposed design methods are verified through simulation, and experimentally, on an ISOP system consisting of two forward converters.  相似文献   

10.
The objective of this paper is to propose a simple digital current mode control technique for dc-dc converters. In the proposed current-mode control method, the inductor current is sampled only once in a switching period. A compensating ramp is used in the modulator to determine the switching instant. The slope of the compensating ramp is determined analytically from the steady-state stability condition. The proposed digital current-mode control is not predictive, therefore the trajectory of the inductor current during the switching period is not estimated in this method, and as a result the computational burden on the digital controller is significantly reduced. It therefore effectively increases the maximum switching frequency of the converter when a particular digital signal processor is used to implement the control algorithm. It is shown that the proposed digital method is versatile enough to implement any one of the average, peak, and valley current mode controls by adjustment of the sampling instant of the inductor current with respect to the turn-on instant of the switch. The proposed digital current-mode control algorithm is tested on a 12-V input and 1.5-V, 7-A output buck converter switched at 100kHz and experimental results are presented  相似文献   

11.
This paper presents the current sharing and robust voltage regulation controls for paralleled digital signal processor-based soft switching-mode rectifiers (SSMRs). First, the design and implementation of single-module SSMRs are made. In dealing with the current control loop design of each SSMR module, the small-signal model is derived and used to design the current-controlled pulse-width modulation (PWM) scheme. As to the common voltage control loop, its dynamic model is estimated from measurements. Then, a quantitative design procedure is developed to find the parameters of the voltage controller according to the prescribed control specifications. As the changes of parallel number and operating condition occur, the robust control is added to reduce the voltage regulation control performance degradation. The proposed multimodule operation control scheme consists of a master controller and N slave controllers. The former further consists of a common voltage controller and a current distribution unit, and the latter are the current-controlled PWM schemes of all SSMRs. Each slave controller receives the weighted sinusoidal current command from the master controller and regulates the feedback current of SSMR. The results confirm that the designed parallel SSMR system possesses good line drawn current power quality, module current sharing and voltage regulation control performances.  相似文献   

12.
A PWM plus phase-shift control bidirectional DC-DC converter   总被引:2,自引:0,他引:2  
A pulse-width modulation (PWM) plus phase-shift control bidirectional dc-dc converter is proposed. In this converter, PWM control and phase-shift control are combined to reduce current stress and conduction losses, and to expand ZVS range. The operation principle and analysis of the converter are explained, and ZVS condition is derived. A prototype of PWM plus phase-shift bidirectional dc-dc converter is built to verify the analysis.  相似文献   

13.
Rapidly dropping power supply voltages and tight voltage regulation requirements for integrated circuits challenges power supply designers. A novel interleaved discharging (ID) approach is presented to reduce the output ripple in step-down switched-capacitor (SC) dc-dc converters. Simulation and experimental results of a four-stage SC dc-dc converter show that the ID approach can reduce the output ripple by a factor of three. The proposed approach also improves the converter efficiency by 7%. The ID method provides flexibility in the design optimization of step-down SC dc-dc converters  相似文献   

14.
This paper presents the design and implementation of an advanced digital controller for a 1-kW H-bridge dc-dc power converter. A new control algorithm based on the active disturbance rejection concept is developed to cope with the highly nonlinear dynamics of the converter and the disturbances. An experimental digital control system is used to implement the new control strategy. It consists of a digital control board based on the TMS320C6711 digital signal processor chip, an analogy I/O board, and a complex programmable logic device pulsewidth-modulation generation board. Using a newly developed bandwidth-parametrization technique, an autotuning method based on noise quantification is also developed and tested. Experimental results show the advantages and flexibilities of the new control method for the H-bridge dc-dc power converter.  相似文献   

15.
本系统以LM5117芯片和CSD18532KCS MOS管为核心器件,采用Buck降压电路,通过LM5117芯片的PWM波来控制CSD18532KCS MOS管,调整PWM波的占空比,得到稳压输出.通过测试,在输入直流电压16V的情况下,额定输出直流电压为5V,输出电流最大值为3A;输出纹波小于25mV,负载调整率小于2.5%,电压调整率小于0.22%,效率可以达到85.2%.  相似文献   

16.
Interleaving technique is used in some applications due to its advantages regarding filter reduction, dynamic response, and power management. In dual battery system vehicles, the bidirectional dc-dc converter takes advantage of this technique using three-to-five paralleled buck stages. In this paper, we propose the use of a much higher number of phases in parallel together with digital control. It will be shown that this approach opens new possibilities since changes in the technology are possible. Thus, two 1000-W prototypes have been designed using surface mount technology devices (SO-8 transistors). An additional important feature is that due to the accuracy of the digital device [field-programmable gate array (FPGA)], current loops have been eliminated, greatly simplifying the implementation of the control stage.  相似文献   

17.
设计了一种无均流外环并联DC-DC变换器,采用平均电流模式控制,通过控制最大编程电感电流,实现并联变换器的精确均流。采用小信号模型分析了并联变换器的均流误差和稳定性,电路实现了稳定的电流特性和快速的瞬态响应,具有优良的负载电流调节能力。仿真结果表明,该电路的均流误差在8‰以下,并联变换器在重载和轻载之间跳变时,1.5 ms内可恢复均流平衡,新插入变换器在0.7 ms时刻可重新建立均流平衡。  相似文献   

18.
19.
Fuel cell stacks produce a dc output with a 2:1 voltage variation from no load to full load. It is customary for a utility-scale fuel cell stack to consist of several hundreds of series-connected cells, each producing 0.6 V at full load. A power conditioner consisting of dc-dc and dc-ac converters is required for utility interface, which are operated in high frequency, employing pulsewidth-modulation control for voltage and current regulation. Due to their switch-mode nature, a common-mode voltage with respect to ground is generated. The common-mode voltage, in turn, contributes to the circulating ground current, which can interfere with the ground fault protection system. In addition, it also contributes to the neutral shift and electromagnetic interference. Moreover, the electrostatic potential to ground within the fuel cell stack needs to be limited for safe operation. This paper presents an analysis of common-mode voltage in several fuel-cell-powered converter topologies connected to the electric utility and discusses several mitigation methods suitable for utility-scale generation.  相似文献   

20.
State space averaging methods are used to derive time-invariant models that bound the envelope of trajectories of pulsewidth modulated (PWM) dc-dc converters. The results are compared to conventional averaging methods used in power electronics, and it is shown that, at times, designing a dc-dc converter based on the averaged output of a converter can be ineffective because peak output values sometimes significantly deviate from the averaged output. This paper attempts to quantify this deviation by using both small-signal transfer functions and nonlinear models to model the maximum and minimum values of outputs of PWM converters. Issues in simulation and control loop design are also mentioned.  相似文献   

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