电路设计参考资料

压控振荡器及其工作原理压控振荡器顾名思义就是输出的振荡频率随着输入控制电压变化的振荡器。众所周知的电抗管振荡器已用于短波接收机等的本振自动频率控制及调频器中。采用压控振荡器的还有自动相位控制电路,以及遥测装置中作为电压-频率变换器的传感器等许多方面,目前通讯工程的各个领域也正在广泛采用。下面选几个压控振荡器的典型例子来说明电路及其工作原理。 (一)压控振荡器的组成及所要求的特性     

一种低噪声C类LC压控振荡器的设计

为了改善压控振荡器相位噪声,基于40 nm CMOS工艺,设计一种低噪声C类LC压控振荡器。交叉耦合NMOS对管通过电流镜偏置作为电路的电流源,并采用共模反馈偏置电路使交叉耦合PMOS对管工作在饱和区,保证LC压控振荡器实现C类振荡。通过差分可变电容的设计,压控振荡器的增益减小,压控振荡器的相位噪声得到改善。设计了4组开关电容进行调节,增大压控振荡器的调谐范围。仿真结果表明,处于1.2 V的电压下,压控振荡器振荡频率范围在4.14～5.7 GHz,频率调谐范围变化率达到31.2%,相位噪声为-112.8 dBc/Hz。     

一种低电压低功耗的环形压控振荡器设计

提出了锁相环的核心部件压控振荡器(VCO)的一种设计方案.该压控振荡器采用全差分环形压控振荡器结构,其延迟单元使用交叉耦合晶体管对来进行频率调节.基于SMIC0.18μmCMOS工艺,用Hspice对电路进行了仿真.仿真结果表明,该压控振荡器具有良好的线性度,较宽的线性范围以及高的工作频率,在1.8V的低电源电压下,振荡频率的变化范围为402～873MHz,中心频率在635MHz,功耗仅为6mW,振荡在中心频率635MHz时的均方根抖动为3.91ps.     

闭环压控振荡器的设计

压控振荡器在许多电子设备中得到应用。平显火控系统中的f_d信号发生器实际上可以认为是一个压控振荡器。其输入信号是—控制电压即频偏调制电压,输出是频率与输入电压成线性关系的正弦波。开环压控振荡器对于输出频率与输入电压之间的线性关系难以保证。现在采用的ICL8038是一集成压控振荡器,其线性度在10倍程的频率范围内较好,而在更大范围内则有所下降。另外,该器件输出频率的温度稳定性不够高,特别是国产5G8038尽管价格较进口的ICL8038便宜近十倍,但温度稳定性更差。本文介绍一种闭环压控振荡器电路,以稳定输出频率与输入电压间的线性度。     

为VCO提供偏压的电路

PLL的用途甚广,特别是在电缆和电视调谐器方面。在这些系统中,PLL使输出信号(一般来自压控振荡器VCO)的频率和相位与参考信号或输入信号同步。PLL中的压控振荡器需要一个偏置电路。偏置电路在输入电压为5V、19V或12V时,提供偏压为24～32V的输出电压,这取决于压控振荡器。低成本的压控振荡器偏置电路可把5V的输入转变成27V的偏压电平输出(图1)。     

一种CMOS旋转行波压控振荡器

采用0.18 μm CMOS工艺,设计了一种基于微带传输线的旋转行波压控振荡器(RTWO)。采用λ/4差分传输线代替传统交叉耦合反相器对的PMOS负载管;通过电磁场建模并优化,获得了高Q值的谐振腔模型,提高了RTWO电路的振荡频率;解决了RTWO电路旋转波形不确定的问题,电路能逆时针起振旋转。该旋转行波压控振荡器的电路版图尺寸为980 μm×1 150 μm。在1.2 V电源电压下,电路输出波形相邻相位差为45°,功耗为24 mW。振荡频率调谐范围为14.06~14.73 GHz,压控电路振荡于14.5 GHz时,其相位噪声为-95 dBc/Hz@1 MHz。     

利用锁相环的简单调频信号发生器

利用562型锁相环(PLL),以一个调幅信号调制其定时电路的电压,可以很快制作一个简单的调频信号发生器.这样组合成的调频振荡器具有频偏大而失真小的优点.电路中,电容C_(10)决定着锁相环内压控振荡器(VCO)的固有振荡频率.音频输入电压加到A点对这个频率进行调制,而后在端子4输出.图中的参数是为调频接收机的需要以10.7MC选定的.电阻R_(11)提功频率细调,可以在中心频率上调整±10%.压控振荡器固有频率fo的变化,△f是A点电压R_7和R_8的函数,这个频偏可由下式算出:     

一种低噪声CMOS差分环型压控振荡器的设计和分析

设计和分析了一种高稳定性,宽频带范围,低噪声的差分环型压控振荡器.该电路具有较低的压控增益,较好的线性范围,较低的相位噪声.应用复制偏置电路,对差分环型压控振荡器的控制电压进行复制,以提高对环型压控振荡器电源电压噪声和衬底噪声的抑制.采用0.6 tanCMOS工艺进行模拟仿真,当控制电压从1 V到3.2 V变化时,相应的振荡频率为130 MHz到740 MHz;在偏离中心频率100 kHz,1 MHz频率处的相位噪声为-89 dBc,-110 dBc.     

使电压/频率变换器增加通用性的DPP

图1所示的基本VFC(电压/频率变换器)由一个积分器(IC_1)和一个施密特触发电路(IC_2)组成。积分器将直流输入电压V_(IN)变换成线性电压斜坡信号,施密特触发器设定积分器输出电压的极限值。这两个电路的反馈为振荡提供了条件。图2所示的DPP(数字编程电位器)可使施密特触发器增加可编程的极限值,并使VFC增添了两个有用的功能:一是比例因子或变换系数是可编程的;二是当输入电压固定不变时,VFC就是一个可编程的振荡器。图2所示的这种单电源VFC的频率f_o为:     

压控振荡器在射频通信电路中的应用

随着现代通信系统和现代雷达系统的出现,射频电路需要在特定的载波频率点上建立稳定的谐波振荡,以便为调制和混额创造必要的条件.设计了一个振荡频率在1.14～1.18 GHz的负阻LC压控振荡器,实现了压控振荡器的宽调频,使频率范围达到加MHz.并且为避免在外部电路对压控振荡器(VCO)的影响,在电路中加入射极跟随器作为buffer,起到阻抗变换和级间隔离的作用.为负阻LC压控振荡器的设计提供了一种参考电路.     

一种单片低功耗电荷泵电源管理电路的设计

基于0.6 μm BiCMOS工艺,设计了一款高精度电荷泵电源管理芯片.该芯片利用2倍压电荷泵电源转换原理,芯片内部集成了具有优异频率响应的振荡器电容,施密特触发器提供内部精准频率,PFM调制提供稳定的输出电压.测试结果表明,芯片输入电压范围为2.7～5.5V,输出电压为5V,电压纹波小于20 mV,内部振荡频率为700 kHz,低功耗模式时电流仅为6.73 μA.     

Wide Voltage Input Receiver with Hysteresis Characteristic to Reduce Input Signal Noise Effect

In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 0.35‐μm standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of (V_CC/2) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, V_CC is the fixed voltage supply of 3.3 V.     

A high-speed differential CMOS Schmitt trigger with regenerative current feedback and adjustable hysteresis

This paper presents a brief overview of Schmitt triggers and proposes a new differential current-feedback Schmitt trigger. The hysteresis of the proposed Schmitt trigger is generated using regenerative current feedback and can be adjusted by varying the current of the regenerative feedback network. The center of the hysteresis can also be adjusted by varying the common-mode input voltage. The proposed Schmitt trigger has the characteristics of current-mode circuits, making it particularly attractive for low-voltage high-speed applications. The proposed Schmitt trigger has been designed in TSMC-0.18 μm 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. Simulation results are presented.     

Design techniques for ASK demodulators of passive wireless microsystems: a state-of-the-art review

This paper presents a brief overview of Schmitt triggers and proposes a new differential current-feedback Schmitt trigger. The hysteresis of the proposed Schmitt trigger is generated using regenerative current feedback and can be adjusted by varying the current of the regenerative feedback network. The center of the hysteresis can also be adjusted by varying the common-mode input voltage. The proposed Schmitt trigger has the characteristics of current-mode circuits, making it particularly attractive for low-voltage high-speed applications. The proposed Schmitt trigger has been designed in TSMC-0.18 μm 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. Simulation results are presented.     

RS trigger based relaxation oscillator for temperature measurement circuit

Resistance-to-time converter is always used for digital temperature measurement. An reset-set （RS） trigger based, relaxation oscillator based temperature measurement circuit, which is used to convert the change of thermistor sensor into a frequency signal for later processing, has been presented in this article. The RS trigger, which is composed of two inverters designed with distinct logical transition threshold voltages by changing the metal-oxide-semiconductor （MOS） transistor gains, has the same function as the Schmitt trigger in the relaxation oscillator. The advantage of the RS trigger based Schmitt trigger is that it reduces the dependence to supply voltage, chip temperature, and process variation. This temperature measurement circuit has been applied in a clinical thermometer chip that can measure temperature to an accuracy of better than 0.05 ℃ down to 1.1 V battery voltage. It is fabricated in 0.5 μm double metal single poly complementary MOS （CMOS） process.     

A new Schmitt trigger circuit in a 0.13-/spl mu/m 1/2.5-V CMOS process to receive 3.3-V input signals

A new Schmitt trigger circuit, which is implemented by low-voltage devices to receive the high-voltage input signals without gate-oxide reliability problem, is proposed. The new proposed circuit, which can be operated in a 3.3-V signal environment without suffering high-voltage gate-oxide overstress, has been fabricated in a 0.13-/spl mu/m 1/2.5-V 1P8M CMOS process. The experimental results have confirmed that the measured transition threshold voltages of the new proposed Schmitt trigger circuit are about 1 and 2.5 V, respectively. The new proposed Schmitt trigger circuit is suitable for mixed-voltage input-output interfaces to receive input signals and reject input noise.     

Estimation of high performance in Schmitt triggers with stacking power‐gating techniques in 45 nm CMOS technology

In the complementary metal oxide semiconductor (CMOS) nanoscale technology ground bounce noise and power consumption are becoming important metric. In presented paper, low leakage Schmitt trigger circuits are proposed for wave shaping or cleaning process with low ground bounce noise. Schmitt trigger play important role in communication electronics. Power‐gating and stacking power‐gating techniques have provided for maintaining the parameter of Schmitt trigger. An ideal approach has been investigated with stacking power‐gating technique. For further reduction in peak of ground bounce noise during sleep to active (power) mode transition, we have performed simulations using cadence specter 45 nm standard CMOS technology at nominal temperature (27°C) with supply voltage V_dd = 0.7 V and input voltage vary from 0.7 V to 1.5 V. The simulation results show that a proposed design provide efficient 6 T and 4 T Schmitt triggers in term of minimum leakage power (8.18 fW), active power (17.80 pW), ground bounce noise (1.65 μV) and propagation delay (1.98 ns), transconductance (4.51 × 10^?14 S), voltage gain (29.44 dB), hysteresis width (11.07 V) and efficiency (64.68%). Reported devices use for low‐power communication systems. Copyright © 2013 John Wiley & Sons, Ltd.     

一种用于Bluetooth发接器的倍频式VCO

介绍了一种适用于 Bluetooth发接器的 ,可以单片集成的倍频式压控振荡器 ( VCO)。这种 VCO由两部分组成 ,主 VCO的振荡频率是所需本振频率的一半 ,然后采用“注入锁频”原理对主 VCO的振荡频率进行倍频以产生本振信号。主 VCO和倍频电路都使用了片上集成螺旋电感 ,调谐用的变容元件使用 PMOS晶体管实现。经过版图设计和后仿真 ,在 TSMC0 .35 μm数字 COMS工艺 ,3.3V电源电压下 ,该 VCO在 2 .4GHz中心频率附近可以达到的相位噪声指标为 -1 2 5 d Bc/Hz( 60 0 k Hz) ,在输出摆幅为 60 0 m Vp- p时 ,功耗为 2 2 m W。     

宽频率范围的单子带压控振荡器设计

基于TSMC 180 nm CMOS工艺,提出了一种振荡频率为2～3 GHz的宽频率范围、低相位噪声的单子带压控振荡器(VCO).采用双平衡吉尔伯特混频结构,将单子带5～6 GHz压控振荡器与固定频率3 GHz压控振荡器进行下混频,可得到振荡频率为2～3 GHz的单子带压控振荡器,实现相对带宽从18.18％到40％的展...     

A static power saving TTL-to-CMOS input buffer

This paper describes a TTL-to-CMOS input buffer that has no static power consumption for the typical TTL voltage level. The input buffer utilizes a feedback configuration to eliminate static power consumption that renders hysteresis characteristic. The hysteresis characteristic is equivalent to that of a Schmitt trigger and thus provides good noise immunity. A prototype circuit was implemented in a 0.8 μm CMOS process, and the through current is measured to be only 8.9 μA and 11.7 μA for the input of 0.8 V and 2.2 V (the worst case TTL level), respectively. The input buffer gives full-swing output upto 170 MHz when driving a minimum sized inverter with the worst case TTL level according to SPICE simulation