半桥式功率输出级中高速低功耗低侧管的实现

本文提出了一种动态地控制IGBT阳极短路的结构,并把这种结构用于具有高低侧驱动和半桥式功率输出级的功率集成电路低侧管中.这种结构使得功率输出级低侧管导通时工作于IGBT模式,关断过程中工作于MOS模式,因而具有导通压降小、关断速度快的优点,有效地解决了功率管导通电阻和关断速度之间的矛盾.在不改变工艺,不降低耐压,不增加电路元件的前提下,实现了低侧管的高速低功耗.     

一种具有低寿命区的阳极短路4H-SiC IGBT仿真研究

传统沟槽型4H-SiC IGBT中关断损耗较大,导通压降和关断损耗难以折中。针对此问题,文中提出了发射极区域含有低寿命区,同时集电区引入阶梯型集电极的LS-IGBT结构来降低器件的关断损耗。通过同时控制集电区注入的空穴载流子数量和P基区载流子的寿命,在基本维持器件击穿电压的前提下降低器件的关断损耗。使用Silvaco Atlas器件仿真工具对改进结构进行特性仿真分析,并与传统结构进行对比。仿真结果显示,在击穿电压一致的前提下,新结构的关断损耗提升了84.5 %,同时器件的导通压降降低了8.3 %,证明了设计思想的正确性。     

具有动态控制阳极短路结构的高速IGBT

利用动态控制阳极短路的基本原理，提出了一种实现高速IGBT 的新思路．该结构的关键是引入了一个常开型p MOSFET，在IGBT导通时关断，不增加导通 损耗，而在器件关断过程中能阻止阳极继续向漂移区注入少数载流子，同时为载流子流入阳 极提供一条通道，使其快速关断．理论分析和模拟结果证明，该结构在击穿电压、导通损耗 不变的情况下，能将关断时间减少75%以上．应用这样的结构只需增加两个分压比一定的分 压电阻．新结构对驱动电路的要求与普通IGBT完全一致，是一种实用的高速IGBT结构．     

具有动态控制阳极短路结构的高速IGBT

利用动态控制阳极短路的基本原理，提出了一种实现高速IGBT 的新思路．该结构的关键是引入了一个常开型p MOSFET，在IGBT导通时关断，不增加导通 损耗，而在器件关断过程中能阻止阳极继续向漂移区注入少数载流子，同时为载流子流入阳 极提供一条通道，使其快速关断．理论分析和模拟结果证明，该结构在击穿电压、导通损耗 不变的情况下，能将关断时间减少75%以上．应用这样的结构只需增加两个分压比一定的分 压电阻．新结构对驱动电路的要求与普通IGBT完全一致，是一种实用的高速IGBT结构．     

一种双发射极沟槽栅超结IGBT

本文对传统沟槽栅超结IGBT进行了改进,得到一种沟槽栅双发射极超结IGBT,本结构第一个发射极区域和传统IGBT结构一样能够发射电子、接收空穴,在p型柱顶部的第二个发射极区域能够起到空穴分流的作用,在有效地提高器件抑制闩锁的能力的同时,保持了超结IGBT器件的高击穿电压(BVoff)和低关断损耗(Eoss)。仿真显示在VGE=10V的条件下,改进结构的闩锁电流从15000A/cm2 提升至 28300A/cm2,器件的击穿电压为810V,在导通压降为1.2V的条件下,关断损耗为6.5 mJ/cm2。     

一种具有部分高介电常数介质调制效应的IGBT

提出了一种具有高介电常数介质填充沟槽的绝缘栅双极晶体管(IGBT)。分析了高介电常数介质调制效应。结果表明,与普通场阻型IGBT相比,该器件的击穿电压提高了8%,通态压降减小了8%,关断损耗降低了11%;在相同通态压降下,该器件的关断损耗降低了35%。在栅极与原HK介质之间增加介电常数更高的介质,进一步提升了该IGBT的性能。与普通场阻型IGBT相比,在相同击穿电压与通态压降下,改进器件的关断损耗降低了57%。     

一种具有浮空P型埋层的新型FS-IGBT

提出了一种在阳极引入浮空P型埋层的新型场截止绝缘栅晶体管(FS-IGBT)。结合超结与阳极短路的思想,在相同仿真条件下,与传统FS-IGBT相比,新结构的击穿电压提高了13.9%。当通态电流密度为150 A/cm²时,新结构的优化压降增量小于9%,关断时间比传统结构降低了60%以上,并且工作时无负阻现象,实现了导通压降与关断功耗的良好折中。     

具有沟槽阳极短路的新型沟槽栅场截止绝缘栅双极晶体管

文章提出了一种新型的具有沟槽阳极短路的槽栅场截止型绝缘栅双极晶体管结构。通过引入沟槽短路阳极结构,器件的击穿电压得到了明显提高。仿真结果显示,相比于传统的场截止型绝缘栅双极晶体管,新结构提高了19.5 %的击穿电压,而且新结构具有更小的漏电流。在电流密度为150 A/cm2 时,新结构虽然提高了近百分之九的导通压降,但是关断时间只有传统结构的一半。此外,新结构导通时没有负阻效应。因此,新结构具有更好的关断功耗与导通压降的折中关系。     

利用电阻场板提高SOI-LIGBT的性能

通过在SOI-LIGBT中引入电阻场板和一个p-MOSFET结构,IGBT的性能得以大幅提高.p-MOSFET的栅信号由电阻场板分压得到.在IGBT关断过程中,p-MOSFET将被开启,作为阳极短路结构起作用,从而使漂移区的过剩载流子迅速消失,IGBT快速关断.而且由于电场受到电阻场板的影响,使得过剩载流子能沿着一个更宽的通道流过漂移区,几乎消去了普通SOI-LIGBT由于衬偏造成的关断的第二阶段.这两个因素使得新结构的关断时间大大减少.在IGBT的开启状态,由于p-MOSFET不导通,因此器件的开启特性几乎与普通器件一致.模拟结果表明,新结构至少能增加25%的耐压,减少65%的关断时间.     

利用电阻场板提高SOI-LIGBT的性能

通过在SOI-LIGBT中引入电阻场板和一个p-MOSFET结构,IGBT的性能得以大幅提高.p-MOSFET的栅信号由电阻场板分压得到.在IGBT关断过程中,p-MOSFET将被开启,作为阳极短路结构起作用,从而使漂移区的过剩载流子迅速消失,IGBT快速关断.而且由于电场受到电阻场板的影响,使得过剩载流子能沿着一个更宽的通道流过漂移区,几乎消去了普通SOI-LIGBT由于衬偏造成的关断的第二阶段.这两个因素使得新结构的关断时间大大减少.在IGBT的开启状态,由于p-MOSFET不导通,因此器件的开启特性几乎与普通器件一致.模拟结果表明,新结构至少能增加25%的耐压,减少65%的关断时间.     

4500V SPT IGBT 动静态损耗优化

本文关注高压IGBT动静态性能的优化。对4500V增强型平面IGBT进行研究,该结构在阴极一侧具有载流子存储层。其中垂直结构采用软穿通(SPT)结构,顶部结构采用增强型平面结构,该结构被称为SPT IGBT,仿真结果显示4500V SPT 具有软关断波形,与SPT结构相比提升了导通压降和关断损耗之间的折衷关系。同时,对不同载流子存储层掺杂浓度对动静态性能的影响也进行了研究,以此来优化SPT IGBT的动静态损耗。     

一种带有超结浮空层的槽栅场阻IGBT

本文提出了一种带有超结浮空层的槽栅场阻IGBT，它具有高的击穿电压(>1200V)，低的正向压降和快速的关断能力。高掺杂的 SJ 浮空层在阳极侧引入了电场峰的同时优化了器件内载流子分布，带来关态击穿电压提高，开态、开关态能量损耗减少等好处。在保持电荷平衡的前提下，增加 SJ 浮空层的厚度可以提高击穿电压和降低正向压降，降低 P 型阳极浓度可以减少关断损耗。与传统结构相比，新结构击穿电压提高了100V，正向压降降低了0.33V（电流密度为100A/cm2），关断时间缩短了60%。     

A novel analytical model of the vertical breakdown voltage on impurity concentration in top silicon layer for SOI high voltage devices

A novel analytical model of the vertical breakdown voltage (V_{B , V} ) on impurity concentration (N_d ) in top silicon layer for silicon on insulator high voltage devices is first presented in this article. Based on an effective ionisation rate considering the multiplication of threshold energy ε_T in the electron, a new formula of silicon critical electric field E_{S , C} on N_d is derived by solving a 2D Poisson equation, which increases with the increase in N_d especially at higher impurity concentration, and reaches up to 68.8?V/µm with N_d  = 1 × 10¹⁷?cm^?3 and 157.2?V/µm with N_d  = 1 × 10¹⁸?cm^?3 from the conventional about 30?V/µm, respectively. A new physical concept of critical energy ε_B is introduced to explain the mechanism of variable high E_{S , C} with heavy impurity concentration. From the E_{S , C} , the expression of V_{B , V} is obtained, which is improved with the increasing N_d due to the enhanced E_{S , C}. V_{B , V} with a dielectric buried layer thickness (t_I ) of 2?µm increases from 428?V of 1 × 10¹⁷?cm^?3 to 951?V of 1 × 10¹⁸?cm^?3. The dependence of N_d and top silicon layer thickness (t_S ) for an optimised device is discussed. 2D simulations and some experimental results are in good agreement with the analytical results.     

ε‐Branched Flexible Side Chain Substituted Diketopyrrolopyrrole‐Containing Polymers Designed for High Hole and Electron Mobilities

Based on the integrated consideration and engineering of both conjugated backbones and flexible side chains, solution‐processable polymeric semiconductors consisting of a diketopyrrolopyrrole (DPP) backbone and a finely modulated branching side chain (ε‐branched chain) are reported. The subtle change in the branching point from the backbone alters the π?π stacking and the lamellar distances between polymer backbones, which has a significant influence on the charge‐transport properties and in turn the performances of field‐effect transistors (FETs). In addition to their excellent electron mobilities (up to 2.25 cm² V^?1 s^?1), ultra‐high hole mobilities (up to 12.25 cm² V^?1 s^?1) with an on/off ratio (I_on/I_off) of at least 10⁶ are achieved in the FETs fabricated using the polymers. The developed polymers exhibit extraordinarily high electrical performance with both hole and electron mobilities superior to that of unipolar amorphous silicon.     

Organic Thin‐Film Transistors Based on Tolyl‐Substituted Oligothiophenes

Thin films based on the tolyl‐substituted oligothiophenes 5,5′′‐bis(4‐methylphenyl)‐2,2′:5′,2′′‐terthiophene ( 1 ), 5,5′′′‐bis(4‐methylphenyl)‐2,2′:5′,2′′:5′′,2′′′‐quaterthiophene ( 2 ) and 5,5′′′′‐bis(4‐methylphenyl)‐2,2′:5′,2′′:5′′,2′′′:5′′′,2′′′′‐quinqethiophene ( 3 ) exhibit hole‐transport behavior in a thin‐film transistor (TFT) configuration, with reasonable mobilities and high current on/off (I_on/I_off) ratios. Powder X‐ray diffraction (PXRD) reveals that these films, grown by vacuum deposition onto the thermally grown silicon oxide surface of a TFT, are highly crystalline, a characteristic that can be attributed to the general tendency of phenyl groups to promote crystallinity. Atomic force microscopy (AFM) reveals that the films grow layer by layer to form large domains, with some basal domain areas approaching 1000 μm². The PXRD and AFM data are consistent with an “end‐on” orientation of the molecules on the oxide substrate. Variable‐temperature current–voltage (I–V) measurements identified the activation regime for hole transport and revealed shallow level traps in thin films of 1 and 2 , and both shallow and deep level traps in thin films of 3 . The activation energies for thin films of 1 , 2 , and 3 were similar, with values of E_a = 121, 100, and 109 meV, respectively. The corresponding trap densities were N_trap/N_v = 0.012, 0.023, and 0.094, where N_trap is the number of trap states and N_v is the number of conduction states. The hole mobilities for the three compounds were similar (μ ? 0.03 cm² V^–1 s^–1), and the I_on/I_off ratios were comparable with the highest values reported for organic TFTs, with films of 2 approaching I_on/I_off = 10⁹ at room temperature.     

Highly Stretchable,High‐Mobility,Free‐Standing All‐Organic Transistors Modulated by Solid‐State Elastomer Electrolytes

Highly stretchable, high‐mobility, and free‐standing coplanar‐type all‐organic transistors based on deformable solid‐state elastomer electrolytes are demonstrated using ionic thermoplastic polyurethane (i‐TPU), thereby showing high reliability under mechanical stimuli as well as low‐voltage operation. Unlike conventional ionic dielectrics, the i‐TPU electrolyte prepared herein has remarkable characteristics, i.e., a large specific capacitance of 5.5 µF cm^?2, despite the low weight ratio (20 wt%) of the ionic liquid, high transparency, and even stretchability. These i‐TPU‐based organic transistors exhibit a mobility as high as 7.9 cm² V^?1 s^?1, high bendability (R_c, radius of curvature: 7.2 mm), and good stretchability (60% tensile strain). Moreover, they are suitable for low‐voltage operation (V_DS = ?1.0 V, V_GS = ?2.5 V). In addition, the electrical characteristics such as mobility, on‐current, and threshold voltage are maintained even in the concave and convex bending state (bending tensile strain of ≈3.4%), respectively. Finally, free‐standing, fully stretchable, and semi‐transparent coplanar‐type all‐organic transistors can be fabricated by introducing a poly(3,4‐ethylenedioxythiophene):polystyrene sulfonic acid layer as source/drain and gate electrodes, thus achieving low‐voltage operation (V_DS = ?1.5 V, V_GS = ?2.5 V) and an even higher mobility of up to 17.8 cm² V^?1 s^?1. Moreover, these devices withstand stretching up to 80% tensile strain.     

Reusable Cellulose‐Based Hydrogel Sticker Film Applied as Gate Dielectric in Paper Electrolyte‐Gated Transistors

A new concept for reusable eco‐friendly hydrogel electrolytes based on cellulose is introduced. The reported electrolytes are designed and engineered through a simple, fast, low‐cost, and eco‐friendly dissolution method of microcrystalline cellulose at low temperature using an aqueous LiOH/urea solvent system. The cellulose solution is combined with carboxymethyl cellulose, followed by the regeneration and simultaneous ion incorporation. The produced free standing cellulose‐based electrolyte films exhibit interesting properties for application in flexible electrochemical devices, such as biosensors or electrolyte‐gated transistors (EGTs), because of their high specific capacitances (4–5 µF cm^?2), transparency, and flexibility. Indium–gallium–zinc‐oxide EGTs on glass with laminated cellulose‐based hydrogel electrolytes (CHEs) as the gate dielectric are produced presenting a low working voltage (<2 V), showing an on–off current ratio (I _on/off) of 10⁶, a subthreshold swing lower than 0.2 V dec^?1, and saturation mobility (μ_Sat) reaching 26 cm² V^?1 s^?1. The flexible CHE‐gated transistors on paper are also demonstrated, which operate at switching frequencies up to 100 Hz. Combining the flexibility of the EGTs on paper with the reusability of the developed CHEs is a breakthrough toward biodegradable advanced functional materials allied with disposable/recyclable and low‐cost electronic devices.     

Conductivity of layers of a chalcogenide glassy semiconductor Ge<Subscript>2</Subscript>Sb<Subscript>2</Subscript>Te<Subscript>5</Subscript> in high electric fields

Effect of high electric fields on the conductivity of 0.5-1-μm-thick layers of a chalcogenide glassy semiconductor with a composition Ge₂Sb₂Te₅, used in phase memory cells, has been studied. It was found that two dependences are observed in high fields: dependence of the current I on the voltage U, of the type I ∝ U ⁿ , with the exponent (n ≈ 2) related to space-charge-limited currents, and a dependence of the conductivity σ on the field strength F of the type σ = σ₀exp(F/F ₀) (where F ₀ = 6 × 10⁴ V cm⁻¹), caused by ionization of localized states. A mobility of 10⁻³–10⁻² cm² V⁻¹ s⁻¹ was determined from the space-charge-limited currents.     

Water‐Induced Scandium Oxide Dielectric for Low‐Operating Voltage n‐ and p‐Type Metal‐Oxide Thin‐Film Transistors

Solution‐processed metal‐oxide thin films based on high dielectric constant (k) materials have been extensively studied for use in low‐cost and high‐performance thin‐film transistors (TFTs). Here, scandium oxide (ScO_x) is fabricated as a TFT dielectric with excellent electrical properties using a novel water‐inducement method. The thin films are annealed at various temperatures and characterized by using X‐ray diffraction, atomic‐force microscopy, X‐ray photoelectron spectroscopy, optical spectroscopy, and a series of electrical measurements. The optimized ScO_x thin film exhibits a low‐leakage current density of 0.2 nA cm^?2 at 2 MV cm^?1, a large areal capacitance of 460 nF cm^?2 at 20 Hz and a permittivity of 12.1. To verify the possible applications of ScO_x thin films as the gate dielectric in complementary metal oxide semiconductor (CMOS) electronics, they were integrated in both n‐type InZnO (IZO) and p‐type CuO TFTs for testing. The water‐induced full oxide IZO/ScO_x TFTs exhibit an excellent performance, including a high electron mobility of 27.7 cm² V^?1 s^?1, a large current ratio (I_on/I_off) of 2.7 × 10⁷ and high stability. Moreover, as far as we know it is the first time that solution‐processed p‐type oxide TFTs based on a high‐k dielectric are achieved. The as‐fabricated p‐type CuO/ScO_x TFTs exhibit a large I_on/I_off of around 10⁵ and a hole mobility of 0.8 cm² V^?1 at an operating voltage of 3 V. To the best of our knowledge, these electrical parameters are among the highest performances for solution‐processed p‐type TFTs, which represents a great step towards the achievement of low‐cost, all‐oxide, and low‐power consumption CMOS logics.