一种新的HBT小信号模型参数优化提取法

阐述了一种新的异质结双极型晶体管（HBT）的小信号模型参数提取方法――综合多偏置点优化参数提取法. 对HBT小信号模型进行推导并确定外部参数和内部参数的计算公式;介绍了多偏置点优化算法,并在GaInP/ GaAs HBT器件上进行了鲁棒性和精确性测试. 实验采用了一系列随机初始值,结果表明提取的参数值具有唯一收敛性和精确性,仿真结果与测量数据的相对误差小于1%.     

HBT小信号等效电路参数提取及其仿真软件的研制

介绍了一种异质结双极型晶体管(HBT)的小信号等效模型参数提取方法及其仿真软件的研制.通过一系列公式推导并确定外部参数和内部参数.介绍多偏置点优化算法,并通过实验证明该方法的优越性.最后介绍软件界面设计.所提出的优化参数提取法不依赖于初始值,具有唯一收敛性、精确性和快速性的特点.     

微波功率GaAs MESFET本征元件与偏置关系分析

提出了一种分析和了解微波功率 Ga As MESFET非线性效应的方法。主要是采用解析优化方法 ,提取 MESFET器件在不同偏置点下的本征元件 ,并结合器件的应用类型 ,对本征元件与偏置的关系进行了系统化的分析。分析的结论有助于提高微波功率 Ga As MESFET器件设计和应用的准确性     

偏置相关GaAs MESFET建模分析

通过对利用多组偏置条件下的Ｓ参数获得精确ＡａＡｓＭＥＳＰＥＴ器件非线性模型方法的讨论，提出了新的沟道电流和栅电容模型，并提取了ＤＣ和电容模型参数。实验结果表明该模型模拟值和测量值吻合很好。     

偏置相关GaAs MESFET建模分析

通过对利用多组偏置条件下的Ｓ参数获得精确ＧａＡｓ ＭＥＳＦＥＴ器件非线性模型方法的讨论，提出了新的沟道电流的栅电容模型，并提取了ＤＣ和电容模型参数。实验结果表明该模型模拟值和测量值吻合很好。     

采用目标函数计算GaAsMESFET小信号等效电路的新方法

提出了一种计算GaAsMESFET器件小信号等效电路的简单方法。本征元件由传统解析参数变换技术计算,且作为非本征元件的函数。等效电路由集中元件构成,在整个测量频率范围内适用。非本征元件可以作为优化标准本征元件的方差,构成目标函数,进行迭代计算。在0至10GHz频宽内选取10多个不同的偏置点,计算结果与测量的S参数相吻合,表明MESFET等效电路对测量的偏置点适用     

采用目标函数计算GaAs MESFET小信号等效电路的新方法

提出了一种计算ＧａＡｓ ＭＥＳＦＥＴ器件小信号等效电路的简单方法。本征元件由传统解析参数变换技术计算,且作为非本征元件的函数。高效电路由集中元件构成,在整个测量频率范围内适用。非本征元件可以作为优化标准本征元件的方差,构成目标函数,进行迭代计算。在０至１０ＧＨｚ频宽内选取１０多个没的偏置点,计算结果与测量的Ｓ参数相吻合,表明ＭＥＳＦＥＴ等效电路对测量的偏置点适用。     

新型GaAs HEMT器件寄生电容的优化提取方法

针对优化提取参数的复杂度问题,提出了一种新的GaAs HEMT器件寄生电容的优化提取方法。提取寄生电容时,设置合适的优化范围,进行优化提参。采用三次参数优化,确保优化精度和模型准确性,避免了循环优化,提高了参数提取效率和参数优化效率。该方法不依赖器件的具体结构,减少了对器件结构假设所带来的误差。对17元件小信号等效电路模型参数进行提取,验证了该方法的可靠性。结果表明,S参数与实测S参数的拟合度较好,拟合的最高频率可达30 GHz。     

SiGe HBT小信号和大信号建模与分析北大核心CSCD

基于异质结双极晶体管(HBT)优良的微波特性,精确建模对使用该类器件进行电路设计具有重要的意义。介绍了HBT所具有的独特优越性,采用Gummel-Poon等效电路模型对常用HBT进行了小信号和大信号模型的建立,加入了寄生电感等效衬底寄生参数,测试了SiGe HBT在不同偏置下的S参数及I-V特性曲线,利用半解析方法分析了非线性模型的参数提取,讨论了本征参数和寄生参数的拟合优化。给出了关于HBT大信号和小信号等效电路模型,对比实测参数进行验证,建立模型在测试频率范围内拟合结果和测试结果吻合良好。     

集成电路可制造性设计中器件参数的提取

分别采用流体力学模型和漂移扩散模型对不同沟道长度的NMOSFET进行衬底电流的提取,并以NMOSFET沟道长度和LDD注入峰值综合对器件特性的影响为研究内容,介绍了集成电路可制造性设计中器件参数的优化与提取。     

Fast and efficient extraction of HBT model parameters usingmultibias S-parameter sets

Accurate parameter extraction technique has been presented for a small-signal equivalent circuit model of AlGaAs-GaAs HBT's. This technique makes use of multibias data optimization regarding two sets of S-parameters in the active mode and one in the cut-off mode, under the physics-based constraint that current-dependent elements in two active bias circuits are linked to each other by the ratio of their currents. This multibias optimization as well as the constraint imposed on intrinsic parameters may reduce the degree of freedom of circuit variables and increase the probability of finding a global minimum result. As a result of this extraction, good agreement is seen between the circuit models and their measured S-parameters in the frequency range of 0.045 to 26.5 GHz     

Optimal parameter extraction and uncertainty estimation in intrinsic FET small-signal models

Analytical expressions for the relative sensitivities in the parameters of a standard intrinsic FET small-signal model with respect to deviations in the measured S-parameters are derived. This enables, in combination with a measurement uncertainty model, the model parameter uncertainties to be studied versus frequency. As a result, optimal, minimum uncertainty, parameter extraction can be performed independent of the bias voltage and without prior knowledge about the device frequency behavior, thus making it suitable for implementation in automatic multibias extraction programs. The derived sensitivities are furthermore used to analytically calculate the uncertainty in the S-parameter response of the extracted model in terms of the uncertainties in either the parameters or the measurement it was extracted from.     

DC to high-frequency HBT-model parameter evaluation using impedanceblock conditioned optimization

A new heterojunction bipolar transistor (HBT) small-signal equivalent-circuit parameter-extraction procedure employing multibias S-parameter data is presented. The algorithm combines analytical and empirical parameter evaluation techniques and results in a bias-dependent HBT model. To minimize the risk of nonphysical parameter estimation, elements such as the DC transport factor, α_o, and the emitter-base conductance are evaluated from the device DC characteristics, and the frequency dispersion of α is related to the RC time-constant of the emitter-base junction. Moreover, initial values for the extrinsic device parasitics are obtained from “hot” as well as “cold” S-parameter data. The method results in excellent fit between measured and modeled S-parameter data in the frequency range DC-40 GHz and for a wide range of bias operating points     

Extracting a bias-dependent large signal MESFET model from pulsedI/V measurements

In this paper a new large-signal metal semiconductor field effect transistor (MESFET) model suitable for applications to nonlinear microwave CAD has been developed and the different phenomena involved in the nonlinear behavior of the transistor have been studied. The importance of this work lies in the fact that multibias starting points (hot and cold device) for pulsed measurements are used to derive a single expression for I_ds that describes the dc as well as the small and large signal behavior of the transistor, while taking into account the quiescent point dependence. The algorithms of this new model can easily be incorporated into commercially available nonlinear simulators. The operating-point dependent current I_ds is modeled by two nonlinear sources: one of them is the dc characteristic nonlinear equation, and the other represents the differences between dc and pulsed characteristics at every bias point. A complete large-signal model is presented for a 10*140 μm GaAs-MESFET chip (F20 process) from the GEC-MARCONI Foundry and a 16*250 μm MESFET chip (DIOM process) from the Siemens Foundry. Comparisons have been made between simulations and measurements of pulsed characteristics at different operating points. There was very good agreement between the P_in /P_out measurements and the MDS simulations using the complete large signal model     

Electron Device Model Parameter Identification Through Large-Signal-Predictive Small-Signal-Based Error Functions

Empirical electron device models based on lumped equivalent circuits are usually identified through nonlinear optimization procedures, which are based on the best fitting between the extrinsic model behavior and measurements carried out under multibias static and small-signal excitations. In this paper, a new error function is proposed for equivalent circuit model parameter optimization. Although still being defined through standard static and small-signal measurement data, the new error function can be configured so as to obtain models tailored to specific large-signal applications. Experimental results, which confirm the validity of the proposed identification approach, are provided for a GaAs microwave pseudomorphic HEMT model aimed at the design of highly linear power amplifiers.     

改进的RF-LDMOS小信号模型参数提取方法

准确地提取RF-LDMOS小信号模型参数对LDMOS大信号模型建模十分重要,而且好的小信号模型能很好地反映微波器件的性能。针对LDMOS提出了一种改进的小信号模型参数提取方法,此方法增加了测试结构的建模和参数提取,极大地方便了S参数曲线的拟合,而且对于测试版图的研究有一定的指导意义。由此方法提取的小信号模型与实验测试数据在0.1～8 GHz拟合的很好,并且准确地预测了器件的特征频率。该模型和方法能够很好的适用于LDMOS的L,S波段小信号建模和参数提取。     

Multibias scalable HEMT small-signal modeling based on a hybrid direct extraction/particle swarm optimization approach

A new multibias HEMT small-signal model extraction method is proposed. The approach, based on scaling rules, combines direct extraction techniques and a particle swarm optimization algorithm. This method has been successfully tested with PHEMTs and MHEMTs, leading to accurate and scalable models up to 70 and 120 GHz, respectively.     

大参数随机共振的两种方法及数值仿真

分析了白噪声通过双稳系统的频谱特点，解释了小参数信号（小频率、小幅度）出现随机共振的原因，探讨实现大参数信号随机共振的两种变换方法，并进行了仿真验证。为实际工程中对大频率微弱信号的检测提供了依据。     

IMD reduction in CMOS double-balanced mixer using multibias dual-gate transistors

This paper presents a novel and simple linearization scheme for a CMOS double-balanced mixer based on the use of multibias dual-gate transistors. In this technique, intermodulation-distortion (IMD) components with proper phase relationship, generated by devices operating at different bias conditions, are combined together to improve the linearity of mixers. For experimental verification, the measured performance of a fabricated CMOS mixer is shown. Over 35 dB of IMD reduction is achieved by the proposed method under proper biasing condition.