基于AD8349的无线直接变频发射机设计与实现

分析无线直接变频发射机中的边带和本振泄漏问题,导出调制信号和本振信号的幅度和相位不平衡度与该类发射机的边带和本振抑制能力之间的定量关系,并用MATLAB软件进行了仿真.最后,基于最新的AD8349型直接正交上变频器,介绍直接变频发射机优化设计的具体措施,并给出实验结果.     

基于AD8346的直接变频发射机设计与实现

分析直接正交调制技术的边带抑制和本振泄漏问题,基于正交调制上变频原理,采用AD8346芯片,给出一种L波段直接正交变频发射机的设计方案。     

低中频扫频接收机中的一种去镜频干扰方法

无线通信网络扫频接收机主要用于离散点频功率测量.低中频接收机方案近年来备受关注,因为它具有结构简单、成本低、易于集成等优势,而且相对零中频方案,它没有直流偏移、1/f噪声和本振泄漏等缺陷,相对高中频方案,它对模数转换器的带宽要求也不高.但是该结构的接收机一般都具有严重的镜频干扰问题.通常,在硬件上抑制镜频干扰是解决低中频结构应用问题的主要方法.本文从另一个思路研究了一种从已被镜频干扰的信号中推算待测频率功率的方法,并将此方法成功地应用于WiMAX扫频接收机中.     

AD8345正交调制器及其应用

AD8345是ANALOG DEVICES公司推出的一种正交调制器，其工作频率为250MHz～1000MHz，在数字通信系统中可用作中频调制器或直接上变频器，该产品具有输出信号频带宽、本振信号泄漏低、边带抑制作用强等特点，本文介绍了AD8345的性能特点、内部结构、引脚定义以及具体应用设计，并给出了典型应用电路。     

TDD射频收发机中本振泄漏片上数字补偿

提出了一种应用于TDD射频收发机的本振泄漏片上数字补偿技术。在发射机中数模转换器前级的数字模块中插入一个数字预补偿单元,结合数字模块中的直流测量电路和补偿参数检测控制电路,构建了对发射机的本振泄漏进行补偿的负反馈回路。上电初始化校准模式下,在数字域中对本振泄漏信号进行功率检测,采用逐次逼近算法精确提取了补偿参数。应用该数字补偿技术,采用IBM 0.13 μm RF CMOS工艺实现了一种直接变频结构TDD-LTE射频收发芯片。仿真和测试结果表明,该射频收发芯片的本振泄漏抑制达到61 dB。     

数字域校正零中频发射机镜频干扰和载漏的方法研究

考虑到零中频发射机存在的镜频干扰和本振泄露会产生带内干扰,分析了同相正交信号(IQ) 的非理想特性,给出了易于硬件实现的校正方法。当输出射频信号开环时,提出在数字域中建立查找表和校正IQ不平衡的操作方法;当射频信号闭环时,提出自适应补偿的基本方法和环路时延估计,并给出了仿真方法。最后,通过运用开环校正物理实现验证,残留镜像和载漏信号均比有效边带信号低40dB以上,提高了信噪比。     

正交调制器的校准设计

在当前许多复杂调制射频信号源中,随着数字基带信号越来越多的加入．需要正交凋制器将其调制到需要的载波信号上。正交调制器原理简单：将生成好的I/Q两路基带信号调制到两路正交的载波上,合路后输出。但是在实现时,想获得好的指标就需要考虑载波相位误差,I/Q基带信号幅度不平衡以及载波泄漏等问题。文章给出了一种正交调制器的校准方案,可以减少和模拟以上三种现象造成的调制误差,并给出自动校准和手动校准两种方法。     

激光相干雷达中光电双下变频技术EI北大核心CSCD

在激光雷达远程测距中,雷达接收机需要在接收信号信噪比较低的背景下,对其中的有用信号进行识别、提取和判决。因此,为保证雷达系统的探测距离和精度,在激光发射功率一定的前提下,需在信号接收处理的各环节中设法提高信号的信噪比。当前外差式激光雷达接收机在变频时将本振光和信号光直接混频,导致镜像频率噪声与有用信号叠加,致使解调信噪比恶化。针对激光雷达接收机提高信号信噪比的需求,提出了一种在信号解调过程中对镜频干扰进行抑制,从而提高解调信噪比的方法。采用光电联合I/Q下变频,首先参考Hartley结构,在光信号的解调过程中对镜频处的噪声进行抵消,随后采用I/Q支路不平衡补偿算法对潜在的双支路不平衡量进行矫正,最后使用数字正交下变频将中频信号解调至基带。仿真和实验表明,该方法能够有效消除调频信号变频过程中引入的镜像频率噪声,相较于传统激光相干雷达接收机方案,该方案解调得到的基带信号信噪比提升了约3 dB。     

800 MHz～1 GHz数字发射机工作原理与应用

ＭＡＸ2 4 0 2发射机使双路平衡混合器、缓冲本振、可变增益和功率放大器一体化到单一集成块内 ,它设计用在 80 0ＭＨｚ～ 1ＧＨｚ频段 ,并兼容直接序列和 90 2～ 92 8ＭＨｚＩＳＭ频段期望扩展频谱。作为典型应用 ,数字基带信号与本振信号混合在天线端产生二进制脉冲键控 (ＢＰＳＫ)调制载波信号。基带输入端可交替接地。频率键控 (ＦＳＫ)信号调制本振 (ＬＯ)信号直接用在本振部分 ,本振部分包括一个限定性放大器 ,它可接受在 80 0ＭＨｚ～ 1ＧＨｚ频率范围内。输入功率为 - 6ｄＢｍ和 + 6ｄＢｍ的单端或差分信号。基带调制输入端在 2Ｖ范…     

基于二阶采样的免混频全数字化正交解调

提出了一种基于二阶采样技术的带通信号免混频全数字化正交解调方法。该方法直接对中频带通信号进行二阶采样,然后通过线性相数字滤波器获得正交的两路基带信号,该方法可省略正交混频环节,与基于一阶采样技术的免混频正交调方法相比,采样率的选择有更大的灵活性。     

Design of a novel differential quadrature crystal oscillator

A novel crystal oscillator circuit with differential quadrature outputs is presented in this paper. It couples two differential Pierce structures with an annular cascade structure to realize differential quadrature outputs directly. A prototype of the circuit was fabricated in SMIC 0.18 μm CMOS process technology. The measurement results show that the maximum quadrature phase mismatch of adjoining signals is lower than 1.3° and the maximum amplitude mismatch is less than 1 %. Compared to the conventional quadrature signal implementations such as poly phase filter network, or a current mode logic divider, our proposed circuit can directly achieve differential quadrature outputs with much better phase noise and excellent differential quadrature matching. It proves potential application prospect in many radio frequency transceiver systems which require rigorous matching characteristics of differential quadrature local oscillator for excellent performance of image rejection.     

A CMOS quadrature charge-domain sampling circuit with 66-dB SFDR up to 100 MHz

A charge-domain quadrature sampling circuit realization in 0.35 /spl mu/m CMOS is presented. The circuit downconverts a real-valued IF input signal with a nominal frequency of 50 MHz into baseband quadrature components by decimation. Based on multiple integrative sampling of charge, the circuit integrates a 192-tap complex bandpass finite-impulse response filtering function into the sampling operation providing 18 dB of built-in anti-aliasing suppression for the nearest unwanted frequencies aliasing to dc and over 36 dB of image band rejection on the 923-kHz 3-dB bandwidth of the circuit. The measured third-order input intercept point is + 25 dBV at 50 MHz, while the spurious-free dynamic range is more than 66 dB up to 100-MHz IF input frequency. The power consumption excluding output buffers is 30 mW from a 3.3-V supply.     

Quadrature oscillator and universal filter based on translinear current conveyors

This paper presents quadrature oscillator and universal filter based on translinear current conveyors. The proposed circuit can realize as a quadrature oscillator or a universal filter without changing the circuit topology. When it works as a quadrature oscillator, four quadrature current outputs and two quadrature voltage outputs can be obtained. The condition and frequency of oscillation of oscillator can be controlled orthogonally and electronically. When it works as a universal filter, low-pass, band-pass, high-stop, band-stop, and all-pass filtering functions can be obtained simultaneously. The natural frequency and quality factor of filters can be controlled orthogonally and electronically. The proposed topology is simulated using PSPICE simulators and experimental results are also used to confirm workability of new circuit.     

单片CDCTA-C低功耗电控调谐双模式三阶正交振荡器的设计

针对振荡器功耗大和振荡频率低的问题,提出了一种基于电流差分级联跨导放大器的三阶正交振荡电路.该电路仅使用一个电流差分级联跨导放大器和三个接地无源电容,可以同时产生两组等幅正交电流信号和一组等幅正交电压信号.电路结构简单,功耗低至1.8mW,最大灵敏度绝对值仅0.5,振荡频率可达10MHz数量级,而且振荡条件和震荡频率可相互独立地电控调谐.计算机模拟和流片芯片测试结果验证了理论分析的正确性.     

A 5-GHz frequency-doubling quadrature modulator with a ring-typelocal oscillator

The direct-conversion quadrature modulator described here was developed by using a frequency-doubling circuit technique so that the modulator and the local oscillator can be integrated on a single silicon chip. The local oscillation frequency in the modulator can be reduced to half the carrier frequency, and this enables the integration on a single chip. A three-level mixer with a newly designed symmetrical topology for two local oscillator inputs is used for the frequency doubling, so the image component levels of the modulated signals are low. When the modulator was implemented on a single chip by using Si-bipolar process technology with a cutoff frequency of 40 GHz, the image ratio at a carrier frequency of 5 GHz was less than -34 dBc     

A wideband quadrature generator IC using a varactor-compensated feedback network

In this paper a novel quadrature generator is presented that exhibits a 110% operating frequency bandwidth. Existing circuits are unable to provide a quadrature signal over such a large fractional bandwidth. They are also highly susceptible to component tolerances that can often shift the center operating frequency rendering the circuit unusable. In this work, this issue is mitigated with the use of a negative feedback network that is able to actively compensate the circuit using varactors to match the operating frequency. In this manner, the bandwidth of the quadrature generator can be significantly increased. Simulation results show an operating frequency span from 1 to 6 GHz while maintaining a phase error below 5° and ±2 dB in amplitude error. The circuit, without bonding pads, uses an area of only 0.17 mm².     

Analog CMOS design for optical coherence tomography signal detection and processing.

A CMOS circuit was designed and fabricated for optical coherence tomography (OCT) signal detection and processing. The circuit includes a photoreceiver, differential gain stage and lock-in amplifier based demodulator. The photoreceiver consists of a CMOS photodetector and low noise differential transimpedance amplifier which converts the optical interference signal into a voltage. The differential gain stage further amplifies the signal. The in-phase and quadrature channels of the lock-in amplifier each include an analog mixer and switched-capacitor low-pass filter with an external mixer reference signal. The interferogram envelope and phase can be extracted with this configuration, enabling Doppler OCT measurements. A sensitivity of -80 dB is achieved with faithful reproduction of the interferometric signal envelope. A sample image of finger tip is presented.     

Current‐mode quadrature oscillator using current differencing transconductance amplifiers

This article presents a new electronically tunable single‐element‐controlled current‐mode quadrature sinusoidal oscillator circuit using current differencing transconductance amplifiers (CDTAs). The proposed oscillator is consisted of two CDTAs, two grounded capacitors and one grounded resistor, which is beneficial to monolithic integrated circuit implementation both in CMOS and bipolar technologies. The condition of oscillation and the frequency of oscillation are independently controllable. The frequency of oscillation can also be electronically controlled by adjusting the bias current of CDTA. The circuit provides four quadrature current outputs and two quadrature voltage outputs. The current output terminals possess high impedance level. PSPICE simulation results are used to verify the performance of the proposed circuit implemented at the transistor level. The measurement results support the computer simulations.     

手持式声表面波射频识别系统

针对脉冲时延结合相位编码的声表面波标签,设计了相应的射频识别系统,阅读器接收链路采用零中频正交解调方案。实际制作了编码容量接近300万的标签和采用4层印制电路板(PCB)结构的小型化阅读器硬件电路。通过对硬件电路、陶瓷天线、液晶屏的一体化布局,搭建了一款手持式声表面波射频识别系统,并测试了阅读器的发射、接收链路及陶瓷天线的回波损耗。手持式系统的识别距离可达50 cm,液晶屏不仅能显示识别结果,还能显示图像信息以实时调试系统。     

Novel voltage/current-mode quadrature oscillator using current differencing transconductance amplifier

This letter proposes a new realization of voltage/current-mode (CM) quadrature oscillator (QO) using Current Differencing Transconductance Amplifier (CDTA) as the active element. The proposed circuit employs canonic number of components, namely two CDTAs, one resistor and two grounded capacitors. The oscillator is capable of providing two explicit quadrature current outputs and two quadrature voltage outputs. Moreover, the circuit enjoys the advantage of independent control of condition of oscillation (CO) and frequency of oscillation (FO). The non-ideal analysis and sensitivity study of the circuit has been carried out and the circuit exhibits a good sensitivity performance. B2SPICE simulation results are included that validate the working of the circuit.