钒掺杂形成半绝缘6H-SiC的补偿机理

研究了钒掺杂生长半绝缘6H-SiC的补偿机理.二次离子质谱分析结果表明,非故意掺杂生长的6H-SiC中,氮是主要的剩余浅施主杂质.通过较深的钒受主能级对氮施主的补偿作用,得到了具有半绝缘特性的SiC材料.借助电子顺磁共振和吸收光谱分析,发现SiC中同时存在中性钒(V4+)和受主态钒(V3+)的电荷态,表明掺入的部分杂质钒通过补偿浅施主杂质氮,形成受主态钒,这与二次离子质谱分析结果相吻合.通过对样品进行吸收光谱和低温光致发光测量,发现钒受主能级在6H-SiC中位于导带下0.62eV处.     

半绝缘SiC单晶电阻率均匀性研究

采用非接触电阻率面分布(COREMA)方法对本实验室生长得到的2英寸(50 mm)4H和6H晶型半绝缘SiC单晶片进行电阻率测试,结果发现数据的离散性大,低者低于测试系统下限105Ω.cm,高者高于其上限1012Ω.cm,甚至在同一晶片内会出现小于105Ω.cm,105~1012Ω.cm和大于1012Ω.cm的不同区域,而有的晶片则电阻率的均匀性较好。将SiC电阻率测试结果与二次离子质谱(SIMS)对晶体内主要杂质V,B和N含量测试结果相结合,初步探讨得到引起掺钒SiC单晶电阻率的高低及均匀性的变化由补偿方式决定,在深受主补偿浅施主模式下,V的浓度控制在2×1016~3×1017cm-3,N的浓度控制在1×1016cm-3左右,深受主钒充分补偿浅施主氮,制备得到的SiC单晶具有半绝缘性,且电阻率均匀性好。     

钒受主能级在n型4H-SiC中的深能级瞬态傅里叶谱和光致发光

借助深能级瞬态傅里叶谱研究了钒离子注入在SiC中引入的深能级陷阱.掺人的钒在4H-SiC中形成两个深受主能级,分别位于导带下0.81和1.02eVt处,其电子俘获截面分别为7.0 × 10-16和6.0×10-16cm2.对钒离子注入4H-SiC样品进行低温光致发光测量,同样发现两个电子陷阱,分别位于导带下0.80和1.6eV处.结果表明,在n型4H-SiC掺入杂质钒可以同时形成两个深的钒受主能级,分别位于导带下0.8±0.01和1.1±0.08eV处.     

钒受主能级在n型4H-SiC中的深能级瞬态傅里叶谱和光致发光

借助深能级瞬态傅里叶谱研究了钒离子注入在SiC中引入的深能级陷阱.掺人的钒在4H-SiC中形成两个深受主能级,分别位于导带下0.81和1.02eVt处,其电子俘获截面分别为7.0 × 10-16和6.0×10-16cm2.对钒离子注入4H-SiC样品进行低温光致发光测量,同样发现两个电子陷阱,分别位于导带下0.80和1.6eV处.结果表明,在n型4H-SiC掺入杂质钒可以同时形成两个深的钒受主能级,分别位于导带下0.8±0.01和1.1±0.08eV处.     

PVT法掺钒SiC单晶生长电阻率变化规律研究

在采用COREMA方法测试SiC晶片电阻率时发现同一晶片电阻率相差较大,主要体现在高阻(>105Ω.cm量级)和低阻(<105量级)并存,有的甚至超高阻(>1012量级)和低阻并存,针对这一测试结果,开展了相关的实验研究,SiC单晶半绝缘性能的实现是通过在单晶生长过程中掺入深能级杂质V来补偿浅施主N和浅受主B,利用二次质谱(SIMS)对同一晶片不同区域的杂质元素V、N和B含量进行测试,结果发现晶片中V和N的含量都在1×1017量级时会出现同一晶片不同区域电阻率相差较大的情况,而当V含量在1×1017量级,N含量在5×1016量级以下时,可制备电阻率均匀性好的半绝缘SiC单晶。     

掺氮6H-SiC单晶的电阻率、迁移率及自由载流子浓度

测试了国产和美国Cree公司生产的n型6H-SiC低温下的电学参数,包括电阻率、迁移率和自由载流子浓度,并用FCCS软件数据拟合分析得到两种SiC的杂质浓度和能级.实验结果表明:杂质浓度和补偿度对低温下SiC的电性能有很大影响,轻度补偿的掺氮6H-SiC是施主氮的两个能级共同起作用;而重度补偿的6H-SiC在低温时则是受主能级起作用,并且后者迁移率随温度变化曲线的峰值降低并右移.同时发现重度补偿的SiC在较低温度时由n型转变成了p型,并从理论上分析了产生这种现象的原因.     

掺氮6H-SiC单晶的电阻率、迁移率及自由载流子浓度

测试了国产和美国Cree公司生产的n型6H-SiC低温下的电学参数,包括电阻率、迁移率和自由载流子浓度,并用FCCS软件数据拟合分析得到两种SiC的杂质浓度和能级.实验结果表明:杂质浓度和补偿度对低温下SiC的电性能有很大影响,轻度补偿的掺氮6H-SiC是施主氮的两个能级共同起作用;而重度补偿的6H-SiC在低温时则是受主能级起作用,并且后者迁移率随温度变化曲线的峰值降低并右移.同时发现重度补偿的SiC在较低温度时由n型转变成了p型,并从理论上分析了产生这种现象的原因.     

3英寸高纯半绝缘6H-SiC单晶的研制

采用物理气相传输(PVT)工艺,成功制备出3英寸高纯半绝缘(HPSI)6H-SiC单晶。依据氮在碳化硅晶格中占碳位的规律,通过生长过程温度和压力等工艺参数的优化,减少生长前沿碳空位的数量,实现了在较高碳硅比气氛下低氮含量碳化硅单晶生长的目标。二次离子质谱(SIMS)测试给出了晶体中氮及其他杂质的控制水平,证明单晶的高纯属性;非接触电阻率Mapping(CORE-MA)和电子顺磁共振(EPR)测试进一步证实其高纯半绝缘特性。     

大直径半绝缘4H-SiC单晶生长及表征

采用升华法稳定地生长出7.62 cm半绝缘4H-SiC单晶。通过优化钒掺杂工艺获得了均匀分布的电阻率1011Ω·cm。用激光拉曼光谱仪对晶片进行扫描,结果表明SiC单晶晶型为4H晶型。半绝缘4H-SiC单晶微管密度最好结果小于2 cm-2。用高分辨X射线衍射术表征了7.62 cm 4H-SiC单晶衬底片的结晶质量,（0004）衍射摇摆曲线半峰宽为40＂,说明晶体结晶性较好。     

退火对掺钒半绝缘4H-SiC晶片质量影响的研究

通过物理气相传输(PVT)法成功地生长出直径大于7.62 cm的掺钒半绝缘4H-SiC晶体。抛光后的掺钒半绝缘4H-SiC晶片在真空且温度1 600℃～2 000℃条件下进行退火处理,利用高分辨X-ray衍射仪、显微拉曼光谱仪、非接触电阻率测试仪和应力仪对退火前后的晶片进行了测试与分析,研究了退火工艺对掺钒半绝缘4H-SiC晶片应力的影响,并且得到了合适的退火工艺。结果表明:合适的退火处理有利于进一步提高晶片的质量。     

Influence of 4H-SiC semi-insulating substrate purity on SiC metal-semiconductor field-effect transistor performance

The performances of silicon carbide (SiC) metal-semiconductor field-effect transistors (MESFETs) fabricated on conventional V-doped semi-insulating substrates and new V-free semi-insulating substrates have been compared. The V-free 4H-SiC substrates were confirmed by secondary ion mass spectrometry (SIMS). X-ray topography revealed significantly fewer micropipes and low-angle boundaries in V-free semi-insulating substrates than in conventional V-compensated substrates. Deep-level transient spectroscopy (DLTS) indicated that the spectra signals observed in conventional V-doped substrates were either reduced or disappeared in V-free substrates. The intrinsic deep levels in V-free substrates to make semi-insulating properties were also observed in DLTS spectra. Under various DC and RF stresses, SiC MESFETs fabricated on new V-free semi-insulating substrates showed superior device performance and stability.     

Growth of 2-Inch V-Doped Bulk 6H-SiC with High Semi-Insulating Yield

A physical vapor transport process for growing vanadium-doped 6H-SiC single crystals was developed. Some 2-inch 6H-SiC wafers with resistivity larger than 10¹² Ω cm were obtained. A yield of semi-insulating wafers of 89% for the whole ingot was achieved, which indicates that a decrease in the incorporation of nitrogen and control of the consumption of vanadium during the whole growth run was successful. The concentrations of vanadium N _V and nitrogen N _N, determined by secondary-ion mass spectroscopy (SIMS), and the calculated relation of resistivity versus N _V/N _N helped us explore the reason for this high resistivity and high semi-insulating yield.     

钒注入制备半绝缘SiC的退火效应

对钒离子注入P型和n型4H-SiC制备半绝缘层的方法和特性进行了研究.注入层电阻率随退火温度的升高而增加,经过1 650℃退火后,钒注入p型和n型SiC的电阻率分别为1.6×1010Ω·cm和7.6×106Ω·cm.借助原子力显微镜对样品表面形貌进行分析,发现碳保护膜可以有效减小高温退火产生的表面粗糙,抑制沟槽的形成.二次离子质谱分析结果表明退火没有导致明显的钒在SiC中的再扩散.即使经过1 650℃高温退火,也没有发现钒离子向SiC表面外扩散的现象.     

A Study of Deep Defect Levels in Semi-Insulating SiC Using Optical Admittance Spectroscopy

Optical admittance spectroscopy (OAS), supported by electron paramagnetic resonance (EPR) measurements, is used to identify the controversial vanadium acceptor levels in vanadium-doped semi-insulating (SI) 4H-SiC and 6H-SiC. The V^3+/4+ levels for the cubic site are likely located at E _c − 0.67 ± 0.02 eV and E _c − 0.70 ± 0.02 eV in 6H-SiC and E _c − 0.75 ± 0.02 eV in 4H-SiC. A peak at 0.87 ± 0.02 eV in the 6H-SiC is tentatively assigned to the same transition at the hexagonal site and the associated transition in 4H-SiC is thought to occur near 0.94 eV. All assignments are supported by the observation of V³⁺ in the EPR spectrum.     

High temperature Hall effect measurements of semi-insulating 4H–SiC substrates

High temperature Hall effect and resistivity measurements have been made on semi-insulating 4H–SiC samples. Both vanadium doped and undoped materials have been studied. Resistivity measurements before and after annealing up to 1800 °C are also reported. The thermal activation energy of the resistivity in vanadium doped samples has one of two values, 1.5 and 1.1 eV, due, respectively, to the vanadium donor level and an as yet unidentified defect. The activation energies for high purity semi-insulating material (HPSI) varied from 0.9 to 1.5 eV. Hall effect measurements were made on several HPSI and 1.1 eV V-doped samples. In all cases the material was found to be n-type. Mixed conduction analysis of the data suggests that the hole concentration is negligible in all samples studied. This suggests that the defects responsible for the semi-insulating properties have deep levels located in the upper half of the bandgap. The resistivity of V-doped samples were unaffected by anneals up to 1800 °C. The annealing results for HPSI samples were mixed.