共查询到17条相似文献,搜索用时 93 毫秒
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FIR滤波器设计:基于免疫算法的频率抽样技术 总被引:4,自引:0,他引:4
该文介绍了免疫算法在数字滤波器设计频率抽样技术中的应用,结合FIR数字低通、带通滤波器设计的两个例子,给出了算法实现的具体操作步骤和实验结果。实验数据表明,采用免疫算法确定的频率过渡带样本值是最优的,设计的FIR滤波器的频率特性优于查表法。文中还把免疫算法与遗传算法在频率抽样技术中的应用作了比较,其收敛速度较遗传算法明显加快。 相似文献
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基于改进遗传量子算法的FIR数字滤波器设计 总被引:4,自引:1,他引:3
采用改进遗传量子算法(IGQA)进行FIR数字滤波器的优化设计,将滤波器的过渡带样本值作为变量进行优化,解决了传统方法(查表法)不能保证数据最优的问题。针对遗传量子算法(GQA)在优化连续多峰函数时易出现早熟的问题,提出一种改进遗传量子算法(IGQA),典型函数测试表明,IGQA的性能优于GQA和其它几种遗传算法,收敛速度快,全局寻优能力强,能有效地克服早熟现象。采用IGQA优化设计的FIR数字低通和带通滤波器的性能较查表法得到了很大改善。 相似文献
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针对FIR滤波器设计中锐截止宽带滤波器阶数较高、计算复杂的问题,提出用频率掩蔽法,先设计一个过渡带为目标过渡带的L倍的原型滤波器,其实现复杂度远小于所要求的滤波器,依据L倍内插滤波器的过渡带宽是原型滤波器的1/L的原理,利用一对互补滤波器和掩蔽滤波器,得到了较低计算复杂度的锐截止宽带滤波器。 相似文献
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根据子滤波器抽头级联法,采用梳状滤波器作为子滤波器,设计了一种新型FIR数字滤波器.通过C语言编程的方法来选择子滤波器阶数,使原型滤波器的过渡带宽度最宽.采用经过变换的通带和阻带边界频率来进行原型滤波器的设计,使得原型滤波器的阶数比传统实现方法低很多.采用该方法实现的FIR滤波器乘法器个数比传统方法少很多,硬件实现更为简单,大幅减小了硬件开销.该方法已成功用于回声消除和噪声抑制芯片,FIR滤波器的面积约为传统方法的50%,用180 nm 3.3 V/1.8 V 6层金属混合信号CMOS工艺流片,结果表明,对于过渡带较窄的滤波器,该方法非常有效. 相似文献
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FIR滤波器设计:基于进化规划的频率采样技术 总被引:2,自引:0,他引:2
本文介绍了进化规划在要样技术中的应用,结合FIR数字低通、带通滤波器设计的两个例子,给出了算法实现的具体操作步骤和实验结果。实验数据表明采用进化规划确定的频率过渡带样本值是最优的,设计的FIR滤波器的性能优于查表法。 相似文献
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In this investigation, subfilters are cascaded in the design of a 2-D narrow transition band FIR digital filter with double
transformations, a transformation from wide transition band subfilter into 1-D narrow transition band filter and a McClellan
transformation from 1-D filter into 2-D filter. The traditional method for designing a 2-D FIR digital filter with a narrow
transition band yields very high orders. The difficulty of the design and implementation will increase with orders exponentially.
Numerous identical low-order subfilters are cascaded together to simplify the design of a high-order 2-D filter compared to
traditional design method. A powerful genetic algorithm (GA) is presented to determine the best coefficients of the McClellan
transformation. It can be used to design any contours of arbitrary shape for mapping 1-D to 2-D FIR filters very effectively.
A generalized McClellan transformation is presented, and can be used to design 2-D complex FIR filters. Various numerical
design examples are presented to demonstrate the usefulness and effectiveness of the presented approach.
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Shian-Tang Tzeng (Corresponding author)Email: |
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Multiplier-less FIR filter design using a genetic algorithm 总被引:1,自引:0,他引:1
Wade G. Roberts A. Williams G. 《Vision, Image and Signal Processing, IEE Proceedings -》1994,141(3):175-180
A new synthesis technique is described for multiplier-less FIR digital filters consisting of a cascade of primitive linear phase sections. For medium-order filters the search space for an optimal cascade is typically of the order of 1030 and this can be examined in a computation efficient way using the parallel-search capability of a genetic algorithm (GA). A particular form of GA based upon multilevel or structured chromosomes has been developed for the primitive cascade problem. Initial results suggest that, for the cost of increased filter delay, a typical 2:1 advantage can be achieved in both VLSI chip area and clock rate compared to filters designed using the usual equiripple method 相似文献
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Luowen Li Lihua Xie Wei-Yong Yan Yeng Chai Soh 《Signal Processing, IEEE Transactions on》1999,47(2):448-457
This paper presents an indirect linear-phase IIR filter design technique based on a reduction of linear-phase FIR filters. The desired filter is obtained by minimizing the L2 norm of the difference between the original FIR filter and the lower order IIR filter. We first establish a relationship between the Hankel singular values of the discarded part of the FIR filter and the L2 norm of the corresponding filter approximation error based on model truncation. This result motivates us to propose a simple finite search method that will achieve better approximation results than commonly used truncation methods such as the balanced truncation (BT) and the impulse response gramian (IRG) methods. We then develop an iterative algorithm for finding an optimal IIR filter based on a matrix projection of the original FIR filter. The convergence of the proposed algorithm is established. Filters designed using the proposed algorithm are compared with those obtained by other techniques with respect to the amplitude response and group delay characteristics in the passband. Numerical examples show that the proposed algorithm offers the best performance 相似文献
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为了降低FIR滤波器对FPGA资源的消耗,同时能够直接验证其滤波性能,本文介绍了基于加法器网络的FIR滤波器的实现方法,以及系数的CSD码、最优CSD码表示方法,并引出了更加高效的简化加法器网络法.以一个32阶FIR低通滤波器的实现为例说明了设计的过程,巧妙结合MATALB与QuartusⅡ对所设计的滤波器进行了验证.实践表明,该方法节约资源,调试方便. 相似文献