Inversion charge redistribution model of the high-frequency MOS capacitance

The high-frequency semiconductor capacitance in an MOS structure is ordinarily calculated by a depletion-charge analysis approach assuming that there is no response of the inversion layer charge to the a.c. signal. The more realistic model, in which the inversion charge is allowed to be spatially redistributed at the high frequency, is treated here by the solution of the Poisson-Boltzmann equation incorporating an appropriate quasi-Fermi level for the inversion layer carriers. The inclusion of this effect leads to a much faster saturation of the capacitance and increases the value at strong inversion by 2–5 per cent for silicon at room temperature. It also predicts a shallow minimum less than 1 per cent below the asymptotic value. Agreement with experiment is shown to be excellent. An analytic expression for the asymptotic value is given.     

Experimental MOS C-V data in strong inversion

Experimental capacitance-voltage (C-V) data are presented to verify recent theories of surface minority carrier redistribution in MOS capacitors biased near strong inversion. The surface layer of minority carriers shunts a portion of the surface space-charge layer resulting in a small capacitance minimum and a slightly larger asymptotic capacitance in strong inversion than predicted by older theory. The agreement between the experiment and the recent theory is very good. The experimental asymptotic capacitance in strong inversion is slightly larger than predicted. This discrepancy is attributable to the surface quantization effect not contained in the recent theory.     

On the accuracy of the theoretical high-frequency semiconductor capacitance for inverted MOS structures

The accuracy of the usual expression of the high-frequency semiconductor capacitance is investigated by means of a charge-analysis model which takes into account the minority carrier rearrangement within the inversion layer due to the ac signal. In the range of doping concentrations of practical interest, it is found that the errors never exceed 5 percent, even in the strong inversion region.     

Low-temperature hysteresis effects in metal-oxide-silicon capacitors caused by surface-state trapping

At low temperatures, charge exchange in all surface states except those close to the band edges can occur only by capture of free carriers because emission rates become very slow. If means are provided to supply minority carriers (either from an extended inversion layer or in a gate-controlled diode), pronounced charge-trapping effects can be observed. A ledge in the C-V characteristic is identified as being due to the charging of almost all surface states within the forbidden gap at a surface potential dependent on surface-state density, capture cross section and voltage sweep rate. Capture cross sections at low temperatures can be estimated from the onset of the ledge. When the C-V curves are traced from accumulation to inversion the capacitance drops below the equilibrium minimum value into depletion and increases rapidly when inversion is reached. This "hook" is caused by a barrier against minority carrier flow at the boundary of the MOS capacitor. The barrier disappears when sufficient voltage is applied to charge the surface states in the boundary region.     

The electrical characteristics of cermet-silicon contacts

The conductance and capacitance of metal/cermet/n-Si sandwiches has been found to be strongly dependent on the metal content of the cermet. Conductive cermets behave essentially as series resistors. Insulating cermets give rise to some Si surface inversion, and the surface minority carrier density varies with bias. This and the cermet capacitance results in a large dispersion of the measured capacitance with frequency and bias. In addition, metal particles in the cermet were found to trap charges, which then induced minority carrier charges at the interface and gave rise to a memory effect.     

Dopant density from maximum-minimum capacitance ratio of implanted MOS structures

For uniformly doped structures, the ratio of the maximum to the minimum high frequency capacitance determines the dopant ion density per unit volume. Here it is shown that for implanted structures this “max-min” dopant density estimate depends upon the dose and depth of the implant through the first moment of the depleted portion of the implant. As a result, the “max-min” estimate of dopant ion density reflects neither the surface dopant density nor the average of the dopant density over the depletion layer. In particular, it is not clear how this dopant ion density estimate is related to the flatband capacitance.     

Threshold voltage of nonuniformly doped MOS structures

The minimum of the HF capacitance and the threshold voltage, for nonuniformly doped MOS structures, are calculated by means of an analytical model containing an adequate definition of the condition of strong surface inversion. The results obtained for profiles piling up close to the surface are in excellent agreement with those obtained by a numerical integration of Poisson's equation.     

A comparison of MOS inversion layer charge and capacitance formulas

A test is made of a recent proposal by Lewyn and Meindl for approximation of MOS inversion layer charge and substrate capacitance. Included in the test are the charge sheet formula and a new formula derived here which includes the pinning of the depletion layer width in strong inversion. Comparison with numerical calculation shows the Lewyn-Meindl result for charge density is less accurate than the charge sheet result over the entire subthreshold region. Similar inaccuracy is expected in MOS current-voltage curves in the subthreshold region and near pinch-off. The new formula is better than the other two over the entire bias range. A comparison of dc and ac substrate capacitances shows the new result to be better than both of the other formulas. In inversion, however, the percent error in dc capacitance is large. This large percent error corresponds to a small absolute error because the dc capacitance goes to zero in strong inversion. The ac capacitance error in strong inversion is ∼5 percent because of neglect of the ac inversion layer redistribution. Percent error curves for all three formulas are presented as a function of band bending and reverse bias.     

一种新的MOS结构量子化效应修正模型

从载流子在 MOS结构反型层内的经典分布和量子化后的子带结构出发 ,提出了经典的和量子化的表面有效态密度 (SL EDOS:Surface layer effective density- of- states)的概念。利用表面有效态密度的概念建立了经典理论框架和量子力学框架内的电荷分布模型。该模型包含了强反型区表面电势的变化对载流子浓度的影响 ,具有很高的计算效率和稳定性。在模型基础上 ,研究了量子化效应对反型层载流子浓度和表面电势的影响。     

Influence of interface traps and surface mobility degradation on scanning capacitance microscopy measurement

Although scanning capacitance microscopy (SCM) is based on the MOS capacitance theory, the measurement frequency is 915-MHz instead of 100 kHz to 1 MHz in conventional MOS capacitance-voltage measurement. At this high frequency, the reactance of the probe tip-to-substrate capacitance can become smaller than the series resistance of the substrate inversion layer, particularly when the surface mobility is degraded. The response of the oxide-silicon interface traps to SCM measurement is also different due to the use of a 10-kHz signal to determine dC/dV. In this paper, we compare experimental and simulation data to demonstrate the effects of interface traps and surface mobility degradation on SCM measurement. Implications on the treatment of SCM data for accurate dopant profile extraction are also presented.     

C-VCharacterization in MOS Structure Inversion Layer Including Quantum Mechanical Effects

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C-VCharacterization in MOS Structure Inversion Layer Including Quantum Mechanical Effects

A simplified method to calculate the band bending and subband energy is presented to investigate the Quantum Mechanical Effects (QMEs) in MOS structure inversion layer. The method is fairly unique compared with the published methods in the reversed nature of the iteration procedure. It has high efficiency and good convergence characteristics. Gate capacitance in MOS structure inversion region is formulated in both quantum mechanical cases and semi-classical cases and Quantum Mechanical Effects on gate capacitance have been analyzed. Results of different substrate doping levels are compared and the substrate doping concentration dependence of QMEs on gate capacitance is studied. It is shown that QMEs lead to a substantial decrease in gate capacitance in the strong inversion region. Results of different substrate doping levels indicate that the QMEs on gate capacitance are different substantially in the threshold region at different substrate doping levels but almost the same in the strong inversion region.     

具有高掺杂表面层和阶梯栅结构SiC MESFETs双沟道器件研究

An improved dual-channel 4H-SiC MESFET with high doped n-type surface layer and step-gate structure is proposed, and the static and dynamic electrical performances are analyzed.A high doped n-type surface layer is applied to obtain a low source parasitic series resistance, while the step-gate structure is utilized to reduce the gate capacitance by the elimination of the depletion layer extension near the gate edge, thereby improving the RF characteristics and still maintaining a high breakdown voltage and a large drain current in comparison with the published SiC MESFETs with a dual-channel layer.Detailed numerical simulations demonstrate that the gate-to-drain capacitance, the gate-to-source capacitance, and the source parasitic series resistance of the proposed structure are about 4%, 7%, and 18% smaller than those of the dual-channel structure, which is responsible for 1.4 and 6 GHz improvements in the cut-off frequency and the maximum oscillation frequency.     

On the high-temperature subthreshold slope of thin-film SOI MOSFETs

This paper addresses the validity of the classical expression for the subthreshold swing (S) in SOI metal-oxide semiconductor field effect transistors (MOSFETs) at high temperature. Using numerical simulation, it is shown that two effects invalidate the classical expression of S at high temperature. Firstly, the depletion approximation becomes invalid and intrinsic free carriers must be taken into account to determine the effective body capacitance. Secondly, the charge-sheet model for the inversion layer becomes inaccurate due to a lowering of the electric field at the surface and a broadening of the inversion layer thickness in weak inversion. These effects must be taken into account to predict accurately the high-temperature subthreshold characteristics of both partially depleted and fully depleted SOI MOSFETs     

Moderate inversion in MOS devices

The region of validity of common approximations for weak and strong inversion is examined. It is shown that at the lower limit of what is often defined as strong inversion region, incremental quantities such as transconductance can be an order of magnitude smaller than the value predicted by using common strong inversion approximations. It is suggested that the limits of validity of widely used approximations for various quantities in weak and strong inversion can be judged by the value of a single parameter, namely the ratio of the inversion layer capacitance to the sum of the oxide capacitance and the depletion region capacitance. It is shown that in the region where this parameter takes values above 0.1, weak inversion approximations are in serious error; similarly, in the region where this parameter takes values below 10, strong inversion approximations are in serious error. The definition of a “moderate inversion region” between the above two limit points is proposed. The width of this region is calculated for a variety of process parameters and values of the quasi-Fermi potential difference, and is found to exceed 0.5 V in many cases. The accuracy of commonly used approximations for the extrapolated threshold voltage is examined.     

Frequency response of charge transfer in MOS inversion layers

The dynamics of charge transfer from a reservoir into an MOS inversion layer, which limits the frequency response of an MOS transistor or a charge-coupled device, is investigated. Using Berman and Kerr's model of space-charge capacitance in the semiconductor, a small-signal distributed model is developed for an MOS structure which transfers charge in an inversion channel due to a variation in the gate voltage. The dynamics of the charge transfer is characterized by a time constant which is determined by the length of the inversion channel and its mobility. Experimental data of gate capacitance vs frequency, taken from a test structure with a diffused source/drain well, are satisfactorily fitted by theoretical curves derived from the model. The channel mobility is precisely determined from the adjusted time constant. The influence of interface states on the capacitance-frequency relationship is also briefly discussed.     

Electrical Analyses of Germanium MIS Structure and Spectroscopic Measurement of the Interface Trap Density in an Insulator/Germanium Interface at Room Temperature

In this paper, we present an equivalent circuit model of a germanium (Ge) MIS structure that is biased in the inversion region, which includes the effects of the high intrinsic carrier density and high diffusion-limited conductance of the Ge substrate at room temperature. The model can successfully express the gate bias and frequency dependences of the capacitance characteristics that are specific to the Ge MIS capacitor. Moreover, it will be shown that the interface trap density and its gate bias dependence in the inversion region can be spectroscopically determined from the gate bias and measurement frequency dependences of the equivalent parallel conductance of the Ge surface.     

基于有效态密度的MOS结构电荷控制模型

从载流子在 MOS结构反型层内的分布出发 ,利用表面有效态密度 ( SLEDOS:SurfaceLayer Effective Density- of- States)的概念 ,在经典理论框架内建立了包含载流子分布对表面势影响的电荷控制模型 .该模型包含了强反型区表面电势的变化对载流子浓度的影响 ,采用了一种新的高效的迭代方法 ,具有较高的计算效率和足够的精度要求     

Characterization and modelling of carrier distribution and gate capacitance in MOS structure inversion layer

Based on the carrier distribution in three-dimensional semi-classical and twodimensional quantum mechanical cases, the concept of surface layer effective density-of-states (SLEDOS) is proposed. Then a simplified method of calculating the band bending and subband energies is employed to investigate quantum mechanical effects (QMEs) in MOS structure inversion layer. The method is unique compared with published methods in its reversed nature of the iteration procedure. It has high efficiency and good convergence characteristics and gives satisfactorily coincident results with rigorous but more complicated selfconsistent calculations. The method is applicable in both quantum mechanical and semi-classical cases. The subband occupation of inversion layer carrier and the two-dimensional density-of-states in semi-classical and quantum mechanical cases are then calculated. QMEs on inversion layer carrier density and surface potential are analysed on the basis of the method. Gate capacitance in the MOS structure inversion region is formulated for both quantum mechanical and semiclassical cases, and QMEs on gate capacitance are analysed.     

A hybrid voltage-variable capacitor

A new voltage-variable tuning capacitor is described. Using conventional fabrication techniques, metal-insulator-semiconductor and p-n junction structures are combined to obtain the high voltage sensitivity and low capacitance tolerances required to tune the AM broadcast band. Other potential applications are cited. A simple theory of operation based on nonequilibrium conditions is given together with experimental verification. Devices fabricated with a 530-Å-thick SiO2insulator on n/n⁺epitaxial silicon exhibit capacitance ratios of 15:1 in 14 V with a minimum Q of 170. The reverse current is two orders of magnitude higher than expected. This is attributed to growth defects in the epitaxial layer which give rise to a low minority carrier lifetime τ0∼0.1 µs and a high surface recombination velocity S0∼500 cm/s.