Effect of fluorinated silicate glass passivation layer on electrical characteristics and dielectric reliabilities for the HfO2/SiON gate stacked nMOSFET

The superior characteristics of the fluorinated hafnium oxide/oxynitride (HfO₂/SiON) gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass (FSG) passivation layer to form fluorinated HfO₂/SiON dielectric. Fluorine incorporation has been proven to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO₂/SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectrics applications.     

Effect of interfacial fluorination on the electrical properties of the inter-poly high-k dielectrics

In this paper, the reliabilities and insulating characteristics of the fluorinated aluminum oxide (Al₂O₃) and hafnium oxide (HfO₂) inter-poly dielectric (IPD) are studied. Interface fluorine passivation has been demonstrated in terminating dangling bonds and oxygen vacancies, reducing interfacial re-oxidation and smoothing interface roughness, and diminishing trap densities. Compared with the IPDs without fluorine incorporation, the results clearly indicate that fluorine incorporation process is effective to improve the insulating characteristics of both the Al₂O₃ and HfO₂ IPDs. Moreover, fluorine incorporation will also improve the dielectric quality of the interfacial layer. Although HfO₂ possesses higher dielectric constant to increase the gate coupling ratio, the results also demonstrate that fluorination of the Al₂O₃ dielectric is more effective to promote the IPD characteristics than fluorination of the HfO₂ dielectric. For future stack-gate flash memory application, the fluorinated Al₂O₃ IPD undoubtedly possesses higher potential to replace current ONO IPD than the fluorinated HfO₂ IPD due to superior insulating properties.     

Stress immunity enhancement of the SiN uniaxial strained n-channel metal–oxide–semiconductor field-effect-transistor by channel fluorine implantation

Channel fluorine implantation (CFI) has been successfully integrated with silicon nitride contact etch stop layer (SiN CESL) to investigate electrical characteristics and stress reliabilities of the n-channel metal–oxide–semiconductor field-effect-transistor (nMOSFET) with HfO₂/SiON gate dielectric. Although fluorine incorporation had been used widely to improve device characteristics, however, nearly identical transconductance, subthreshold swing and drain current of the SiN CESL strained nMOSFET combining the CFI process clearly indicates that stress-induced electron mobility enhancement does not affect by the fluorine incorporation. On the other hand, the SiN CESL strained nMOSFET with fluorine incorporation obviously exhibits superior stress reliabilities due to stronger Si–F/Hf–F bonds formation. The channel hot electron stress and constant voltage stress induced threshold voltage shift can be significantly suppressed larger than 26% and 15%, respectively. The results clearly demonstrate that combining the SiN CESL strained nMOSFET with fluorinated gate dielectric using CFI process becomes a suitable technology to further enhance stress immunity.     

Atomic-layer-deposited Al2O3 and HfO2 on GaN: A comparative study on interfaces and electrical characteristics

Al₂O₃, HfO₂, and composite HfO₂/Al₂O₃ films were deposited on n-type GaN using atomic layer deposition (ALD). The interfacial layer of GaON and HfON was observed between HfO₂ and GaN, whereas the absence of an interfacial layer at Al₂O₃/GaN was confirmed using X-ray photoelectron spectroscopy and transmission electron microscopy. The dielectric constants of Al₂O₃, HfO₂, and composite HfO₂/Al₂O₃ calculated from the C-V measurement are 9, 16.5, and 13.8, respectively. The Al₂O₃ employed as a template in the composite structure has suppressed the interfacial layer formation during the subsequent ALD-HfO₂ and effectively reduced the gate leakage current. While the dielectric constant of the composite HfO₂/Al₂O₃ film is lower than that of HfO₂, the composite structure provides sharp oxide/GaN interface without interfacial layer, leading to better electrical properties.     

Electrical characteristics and TDDB breakdown mechanism of N2-RTA-treated Hf-based high-κ gate dielectrics

This study investigates the effects of rapid thermal annealing (RTA) in nitrogen ambient on HfO₂ and HfSiO_x gate dielectrics, including their electrical characteristics, film properties, TDDB reliability and breakdown mechanism. The optimal temperature for N₂ RTA treatment is also investigated. The positive oxide trap charges (oxygen vacancies) in HfO₂ and HfSiO_x dielectric films can be reduced by the thermal annealing, but as the annealing temperature increased, many positive oxide trap charges (oxygen vacancies) with shallow or deep trap energy level will be formed in the grain boundaries, degrading the electrical characteristics, and changing the breakdown mechanism. We believe that variation in the number of positive oxide trap charges (oxygen vacancies) with shallow or deep trap energy levels is the main cause of the CV shift and difference in the breakdown behaviors between HfO₂ and HfSiO_x dielectrics. With respect to CV characteristics and TDDB reliability, the optimal temperature for N₂ RTA treatment is in the range 500-600 °C and 800-900 °C, respectively.     

A low gate leakage current and small equivalent oxide thickness MOSFET with Ti/HfO2 high-k gate dielectric

Annealing effects on electrical characteristics and reliability of MOS device with HfO₂ or Ti/HfO₂ high-k dielectric are studied in this work. For the sample with Ti/HfO₂ higher-k dielectric after a post-metallization annealing (PMA) at 600 °C, its equivalent oxide thickness value is 7.6 Å and the leakage density is about 4.5 × 10⁻² A/cm². As the PMA is above 700 °C, the electrical characteristics of MOS device would be severely degraded.     

1.2 nm capacitance equivalent thickness gate stacks on Si-passivated GaAs

Experiments to increase the specific capacitance of MOS capacitors consisting of HfO₂ on a passivating interfacial layer (IL) of amorphous Si (a-Si) on GaAs are described. XPS analysis of the layers and electrical measurements on the capacitors are combined to study the evolution of the gate stack during deposition and subsequent heat treatments. It is shown that oxidation of the a-Si IL is a major factor in preventing the attainment of a scaled capacitance equivalent thickness (CET). By controlling the deposition of the layers, the gate metal and the heat treatments, a highly scaled gate stack with a CET of 1.2 nm and a leakage reduction of more than 4 orders of magnitude with respect to SiO₂/Si was realized.     

Control of Interface Traps in HfO2 Gate Dielectric on Silicon

The effects of postdeposition annealing (PDA) on the interface between HfO₂ high-k dielectric and bulk silicon were studied in detail. The key challenges of successfully adopting the high-k dielectric/Si gate stack into advanced complementary metal–oxide–semiconductor (CMOS) technology are mostly due to interfacial properties. We have proposed a PDA treatment at 600°C for several different durations (5 min to 25 min) in nitrogen or oxygen (95% N₂ + 5% O₂) ambient with a 5-nm-thick HfO₂ film on a silicon substrate. We found that oxidation of the HfO₂/Si interface, removal of the deep trap centers, and crystallization of the film take place during the postdeposition annealing (PDA). The optimal PDA conditions for low interface trap density were found to be dependent on the PDA duration. The formation of an amorphous interface layer (IL) at the HfO₂/Si interface was observed. The growth was due to oxygen incorporated during thermal annealing that reacts with the Si substrate. The interface traps of the bonding features, defect states, and hysteresis under different PDA conditions were studied using x-ray photoelectron spectroscopy (XPS), x-ray diffraction (XRD), transmission electron microscopy (TEM), and leakage current density–voltage (J–V) and capacitance–voltage (C–V) techniques. The results showed that the HfO₂/Si stack with PDA in oxygen showed better physical and electrical performance than with PDA in nitrogen. Therefore, PDA can improve the interface properties of HfO₂/Si and the densification of HfO₂ thin films.     

在metal/high-k 栅叠层中插入Ti/TiN金属层实现远距离吸氧技术

High permittivity materials have been required to replace traditional SiO₂ as the gate dielectric to extend Moore’s law.However,growth of a thin SiO₂-like interfacial layer（IL） is almost unavoidable during the deposition or subsequent high temperature annealing.This limits the scaling benefits of incorporating high-k dielectrics into transistors.In this work,a promising approach,in which an O-scavenging metal layer and a barrier layer preventing scavenged metal diffusing into the high-k gate dielectric are used to engineer the thickness of the IL,is reported. Using a Ti scavenging layer and TiN barrier layer on a HfO₂ dielectric,the effective removal of the IL and almost no Ti diffusing into the HfO₂ have been confirmed by high resolution transmission electron microscopy and X-ray photoelectron spectroscopy.     

Effects of aluminum incorporation on hafnium oxide film using plasma immersion ion implantation

The effects of aluminum implantation on HfO₂ thin films using plasma immersion ion implantation (Al–PIII samples) are investigated. X-ray photoelectron spectroscopy measurements reveal that most of the implanted aluminum atoms accumulated near the surface region of the oxide film. The greatly reduced leakage current, smaller flatband shift and steep transition from the accumulation to the depletion region in the capacitance–voltage characteristics for Al–PIII samples indicate that both bulk oxide and interface traps are significantly reduced by aluminum incorporation. Even though the aluminum concentration at the Si/HfO₂ interface is very low the results indicate that trace amount of aluminum at the interface leads to significant improvements in both material and electrical characteristics of the thin HfO₂ films.     

Electrical reliability aspects of HfO2 high-k gate dielectrics with TaN metal gate electrodes under constant voltage stress

The dielectric breakdown property of ultrathin 2.5 and 5.0 nm hafnium oxide (HfO₂) gate dielectric layers with metal nitride (TaN) gate electrodes for metal oxide semiconductor (MOS) structure has been investigated. Reliability studies were performed with constant voltage stressing to verify the processing condition effects (film thicknesses and post metal annealing temperatures) on times to breakdown. The leakage current characteristics are improved with post metal annealing temperatures (PMA) for both 2.5 and 5.0 nm HfO₂ physical thicknesses. However, it is more prominent (2 orders of magnitudes) for 2.5 nm HfO₂ film thickness. The values of oxide-trapped charge density and interface-state density are also improved for 2.5 nm HfO₂ film. The different stages of charge-trapping behaviors, i.e., stress-induced leakage current, soft and hard breakdown mechanisms have been detected. During constant voltage stress of the MOS capacitors, an increase in the time-dependent gate current is observed, followed by the occurrence of several fluctuations. The amplitude of the fluctuations is much larger in the 5.0 nm HfO₂ gate dielectric layer compared to the 2.5 nm HfO₂ layer. After the occurrence of such fluctuations, the current–voltage characteristics exhibited an increased in gate current compared to the fresh (unstressed) devices.     

Annealing effect on physical and electrical characteristics of thin HfO2, HfSixOy and HfOyNz films on Si

We report the effect of annealing on electrical and physical characteristics of HfO₂, HfSi_xO_y and HfO_yN_z gate oxide films on Si. Having the largest thickness change of 0.3 nm after post deposition annealing (PDA), HfO_yN_z shows the lowest leakage current. It was found for both as-grown and annealed structures that Poole-Frenkel conduction is dominant at low field while Fowler-Nordheim tunneling in high field. Spectroscopic ellipsometry measurement revealed that the PDA process decreases the bandgap of the dielectric layers. We found that a decreasing of peak intensity in the middle HfO_yN_z layer as measured by Tof-SIMS may suggest the movement of N toward the interface region between the HfO_yN_z layer and the Si substrate during the annealing process.     

Impact of local structural and electrical properties of grain boundaries in polycrystalline HfO2 on reliability of SiOx interfacial layer

Using nanometer-resolution characterization techniques, we present a study of the local structural and electrical properties of grain boundaries (GBs) in polycrystalline high-κ (HK) dielectric and their role on the reliability of underlying interfacial layer (IL). A detailed understanding of this analysis requires characterization of HK/IL dielectrics with nanometer scale resolution. In this work, we present the impact of surface roughness, thickness and GBs containing high density of defects, in polycrystalline HfO₂ dielectric on the performance of underlying SiO_x (x ⩽ 2) IL using atomic force microscopy and simulation (device and statistical) results. Our results show SiO_x IL beneath the GBs and thinner HfO₂ dielectric experiences enhanced electric field and is likely to trigger the breakdown of the SiO_x IL.     

Hafnium oxide thin films deposited by high pressure reactive sputtering in atmosphere formed with different Ar/O2 ratios

The physical and electrical properties of hafnium oxide (HfO₂) thin films deposited by high pressure reactive sputtering (HPRS) have been studied as a function of the Ar/O₂ ratio in the sputtering gas mixture. Transmission electron microscopy shows that the HfO₂ films are polycrystalline, except the films deposited in pure Ar, which are amorphous. According to heavy ion elastic recoil detection analysis, the films deposited without using O₂ are stoichiometric, which means that the composition of the HfO₂ target is conserved in the deposition films. The use of O₂ for reactive sputtering results in slightly oxygen-rich films. Metal-Oxide-Semiconductor (MOS) devices were fabricated to determine the deposited HfO₂ dielectric constant and the trap density at the HfO₂/Si interface (D_it) using the high–low frequency capacitance method. Poor capacitance–voltage (CV) characteristics and high values of D_it are observed in the polycrystalline HfO₂ films. However, a great improvement of the electrical properties was observed in the amorphous HfO₂ films, showing dielectric constant values close to 17 and a minimum D_it of 2×10¹¹ eV⁻¹ cm⁻².     

Characterization of ALD Beryllium Oxide as a Potential High-k Gate Dielectric for Low-Leakage AlGaN/GaN MOSHEMTs

The chemical and electrical characteristics of atomic layer deposited (ALD) beryllium oxide (BeO) on GaN were studied via x-ray photoelectron spectroscopy, current–voltage, and capacitance–voltage measurements and compared with those of ALD Al₂O₃ and HfO₂ on GaN. Radiofrequency (RF) and power electronics based on AlGaN/GaN high-electron-mobility transistors are maturing rapidly, but leakage current reduction and interface defect (D _it) minimization remain heavily researched. BeO has received recent attention as a high-k gate dielectric due to its large band gap (10.6 eV) and thermal stability on InGaAs and Si, but little is known about its performance on GaN. Unintentionally doped GaN was cleaned in dilute aqueous HCl immediately prior to BeO deposition (using diethylberyllium and H₂O precursors). Formation of an interfacial layer was observed in as-deposited samples, similar to the layer formed during ALD HfO₂ deposition on GaN. Postdeposition anneal (PDA) at 700°C and 900°C had little effect on the observed BeO binding state, confirming the strength of the bond, but led to increased Ga oxide formation, indicating the presence of unincorporated oxygen in the dielectric. Despite the interfacial layer, gate leakage current of 1.1 × 10^?7 A/cm² was realized, confirming the potential of ALD BeO for use in low-leakage AlGaN/GaN metal–oxide–semiconductor high-electron-mobility transistors.     

Integration of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics for MOS device applications

Interaction of Hf_xTa_yN metal gate with SiO₂ and HfO_xN_y gate dielectrics has been extensively studied. Metal-oxide-semiconductor (MOS) device formed with SiO₂ gate dielectric and Hf_xTa_yN metal gate shows satisfactory thermal stability. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS) analysis results show that the diffusion depths of Hf and Ta are less significant in SiO₂ gate dielectric than that in HfO_xN_y. Compared to HfO_xN_y gate dielectric, SiO₂ shows better electrical properties, such as leakage current, hysteresis, interface trap density and stress-induced flat-band voltage shift. With an increase in post metallization annealing (PMA) temperature, the electrical characteristics of the MOS device with SiO₂ gate dielectric remain almost unchanged, indicating its superior thermal and electrical stability.     

High-k HfO2-Ta2O5 mixed layers: Electrical characteristics and mechanisms of conductivity

Electrical properties of mixed HfO₂-Ta₂O₅ films (10;15 nm) deposited by rf sputtering on Si have been studied from the view point of their applications as high-k layers, by standard capacitance-voltage and temperature dependent current-voltage characteristics. The effect of HfO₂ addition to the Ta₂O₅ is thickness dependent and the thicker layers exhibit advantages over the pure Ta₂O₅ (higher dielectric constant, enhanced charge storage density and improved interface quality). The process of HfO₂ and Ta₂O₅ mixing introduces negative oxide charge, tends to creates shallow bulk traps and modifies the dominant conduction mechanisms in the stack capacitors as compared to the Ta₂O₅-based one (a contribution of tunneling processes through traps located below the conduction band of mixed layers to the leakage current in the HfO₂-Ta₂O₅ stacks is observed). The traps involved in both Poole-Frenkel and tunneling processes are identified.     

Structural and electrical characteristics of RF-sputtered HfO2 high-k based MOS capacitors

The HfO₂ high-k thin films have been deposited on p-type (1 0 0) silicon wafer using RF magnetron sputtering technique. The XRD, AFM and Ellipsometric characterizations have been performed for crystal structure, surface morphology and thickness measurements respectively. The monoclinic structured, smooth surface HfO₂ thin films with 9.45 nm thickness have been used for Al/HfO₂/p-Si metal-oxide-semiconductor (MOS) structures fabrication. The fabricated Al/HfO2/Si structure have been used for extracting electrical properties viz dielectric constant, EOT, barrier height, doping concentration and interface trap density through capacitance voltage and current-voltage measurements. The dielectric constant, EOT, barrier height, effective charge carriers, interface trap density and leakage current density are determined are 22.47, 1.64 nm, 1.28 eV, 0.93 × 10¹⁰, 9.25 × 10¹¹ cm⁻² eV⁻¹ and 9.12 × 10⁻⁶ A/cm² respectively for annealed HfO₂ thin films.     

Fabrication and electrical characteristics of ultrathin (HfO2)x(SiO2)1−x films by surface sol-gel method and reaction-anneal treatment

Hafnium oxide (HfO₂) films were deposited on Si substrates with a pre-grown oxide layer using hafnium chloride (HfCl₄) source by surface sol-gel process, then ultrathin (HfO₂)_x(SiO₂)_1−x films were fabricated due to the reaction of SiO₂ layer with HfO₂ under the appropriate reaction-anneal treatment. The observation of high-resolution transmission electron microscopy indicates that the ultrathin films show amorphous nature. X-ray photoelectron spectroscopy analyses reveal that surface sol-gel derived ultrathin films are Hf-Si-O alloy instead of HfO₂ and pre-grown SiO₂ layer, and the composition was Hf_0.52Si_0.48O₂ under 500 °C reaction-anneal. The lowest equivalent oxide thickness (EOT) value of 0.9 nm of film annealed at 500 °C has been obtained with small flatband voltage of −0.31 V. The experimental results indicate that a simple and feasible solution route to fabricate (HfO₂)_x(SiO₂)_1−x composite films has been developed by means of combination of surface sol-gel and reaction-anneal treatment.