共查询到19条相似文献,搜索用时 171 毫秒
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为了实现仪器的实时在线监测,利用能量为10.6 eV的紫外光灯取代传统础Ni放射性电离源,自主研发出便携、快速、高灵敏的光电离/离子迁移谱仪.紫外光灯为直流供电,避免了放射性物质严格的操作规程,并且实现了易制毒化学品有机物分子的软电离.最近的实验结果表明,在列出的23种违禁物品中,13种以上可以得到快速有效的鉴别,检测时间在几秒以内,检测下限可以达到PPb量级,其中挥发性成分的检测结果尤为显著. 相似文献
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苯系物的色谱光电离迁移谱两维分辨检测方法研究 总被引:2,自引:2,他引:0
针对离子迁移谱难分辨迁移率相近或相同的有机物,开展了气相色谱-紫外光电离-离子迁移谱联用技术的实验研究。通过测量不同色谱柱温和氮载气流量条件下苯的色谱和迁移谱,对实验参数进行了优化。并对苯、甲苯,以及邻、间、对-二甲苯等五种苯系物混合物进行了测量,获得了混合样品的色谱保留时间、迁移谱离子迁移时间与离子信号强度的三维谱图。结果表明,同分异构体邻、间、对-二甲苯的迁移率非常接近,单一的紫外光电离-离子迁移谱无法对它们进行分辨,通过色谱-迁移谱技术的联用,则可以实现苯、甲苯,以及邻、间、对-二甲苯混合物的有效分辨。证明所建立的气相色谱-紫外光电离-离子迁移谱技术具有良好的分辨检测能力。 相似文献
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《电子科技文摘》2003,(3)
0305129表面电晕预电离与火花预电离之比较[刊]/胡孝勇//真空科学与技术学报.—2002,22(5).—382~384(L)本文报道了表面电晕预电离与火花预电离的比较结果。针式火花预电离源利用热电弧发出强烈的紫外光,其发射光谱范围从可见光连续延伸到紫外。表面电晕预电离源,通过介质极化发射电子,在预电离电路中产生电晕电流,其强度决定了发射光子的数量,而发射电子的能量分布确定辐射的光谱分布,其发光谱分布不连续。对两种预电离源的放电电压和电流进行测量,得到瞬态信息。计算得到火花预电离源中消耗的能量约是表面电晕预电离源的400倍。比较分析可知,表面电晕预电离的效率远高于火花预电离。参4 相似文献
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吉林大学物理系原子分子物理研究所单原子检测研究组 《中国激光》1982,9(5):16
采用激光共振电离光谱方法进行单原子检测不仅是原子物理、激光光谱研究中的重要课题,而且可以用于痕量分析,极大地提高分析灵敏度,也可以应用于光化学、核物理学等领域。 我们的实验装置由可调谐激光器、改进的正比计数器、前置放大器和多通道分析器组成。 用激光双光子共振电离光谱方法将钾原子激发到高激发态(4S→14S),然后通过场电离产生电子离子对由正比计数器、前置放大器、多通道分析器检测。 相似文献
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Yeong-Lin Lai Chang E.Y. Chun-Yen Chang Tai M.C. Liu T.H. Wang S.P. Chuang K.C. Lee C.T. 《Electron Device Letters, IEEE》1997,18(9):429-431
We report a high-efficiency and low-distortion GaAs power MESFET using direct ion implantation technology for the digital wireless personal handy-phone system (PHS). When qualified by 1.9-GHz π/4-shifted quadrature phase shift keying (QPSK) modulated PHS standard signals, the 2.2-V-operation device with a gate width (Wg) of 2 mm exhibited a power-added efficiency (PAE) of 57.2 % and an adjacent channel leakage power (Padj) of -58 dBc at an output power of 21.3 dBm. The MESFET with the optimized direct ion implantation conditions and fabrication process achieved the highest PAE for PHS applications. The low-cost MMIC-oriented direct ion implantation technology has demonstrated the state-of-the-art results for new-generation PHS handsets for the first time 相似文献
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通过改变采样点数,理论优化了Hadamard变换离子迁移谱(Hadamard transform ion mobility spectrometry, HT-IMS)谱图的采样速率;通过增加模拟的白噪声,分析了该方法提高谱图信噪比的效果和对分辨率的影响。初步结果表明,在单次离子门门宽0.4ms内,采集8个及以上数据点可以完整地反演IMS谱图;Hadamard变换方法得到的谱图的信噪比是传统IMS谱图信噪比的15.8倍,是相同时间内多次传统IMS谱图平均后信噪比的4.6倍;变换过程对IMS谱图分辨率无明显影响。Hadamard变换IMS的模拟不仅对采样速率等参数的选择和优化提供理论依据,而且为下一步实验控制和反演奠定软件基础。 相似文献
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激光诱导击穿光谱(UBS)技术作为一种快速分析元素组成技术,在冶金分析领域具有广阔的应用前景。实验参数对LIBS检测钢液元素有较大影响,为提高LIBS技术检测的灵敏度需要对系统关键参数激光脉冲能量和ICCD门延时进行优化。本实验以钢液中Mn元素的分析线为研究对象,在激光等离子体满足局部热平衡和光学薄条件下,用Mn元素最大信噪比(SNR)来筛选优化结果。结果表明,通过优化这些实验参数,得到高光谱强度和信噪比的UBS信号,确定了最佳实验条件,这为LIBS钢液元素定量分析打下了坚实的实验数据基础。 相似文献
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《Electron Devices, IEEE Transactions on》1983,30(6):635-647
Lateral variation of the local threshold voltage causes non-linearity in the drain conductance-gate voltage characteristics, resulting in a nonunique external threshold voltage which varies with gate voltage. Using a 16-bit minicomputer, a two-dimensional (2-D) finite-difference program for narrow gate MOSFET (NAROMOS), and an accurate and efficient new finite-difference boundary equation at the oxide-semiconductor interface, computations are carried out for the external threshold voltage and a measurable electrical channel width as a function of the applied dc gate and substrate voltages. The depletion approximation is employed in order to compare the 2-D results with the 1-D analytical solution of the depletion model. Computed curves are presented for the lateral variations of the depletion layer thickness, surface potential, normal surface electric field, local as well as external threshold voltages, and electrical channel width as a function of the device structure, material parameters, and bias voltages. Based on the 2-D results and device physics, an analytical approximation of the threshold voltage versus the gate width, simple enough for CAD of VLSI, is derived whose parameters may be determined from either a 2-D computation or experimental measurements on one test device of a known gate width. The computed increase of the external threshold voltage with decreasing gate width compares well with published experimental data. 相似文献
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《Electron Devices, IEEE Transactions on》1983,30(12):1672-1677
The narrow gate effect produces an increasing threshold voltage with decreasing gate width. Our previous approximate formulae, based on shifting the gate-edge position, predicts the variation of the threshold voltage with gate width accurately in the super-micrometer width range, but error begins to increase when the gate width is less than a critical valueW_{min} which is about 1 µm for 200-A gate oxide 7000-A field oxide and2 times 10^{16} cm-3substrate doping. The physical reason of this error is delineated and combined with two-dimensional numerical analyses to give a new formulae based on shifting the gate-center position as the gate width narrows. The parameters of this new formula may be obtained either from two-dimensional computation or experimental measurements. The error is less than 2 percent at a dc gate bias of 5 V. 相似文献
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30-nm two-step recess gate InP-Based InAlAs/InGaAs HEMTs 总被引:1,自引:0,他引:1
Suemitsu T. Yokoyama H. Ishii T. Enoki T. Meneghesso G. Zanoni E. 《Electron Devices, IEEE Transactions on》2002,49(10):1694-1700
Two-step recess gate technology has been developed for sub-100-nm gate InP-based InAlAs/InGaAs high-electron mobility transistors (HEMTs). This gate structure is found to be advantageous for the preciseness of the metallurgical gate length as well as a comparable stability to the conventional gate structure with an InP etch stop layer. The two-step recess gate is optimized focusing on the lateral width of the gate recess. Due to the stability of the gate recess with an InP surface, a laterally wide gate recess gives the maximum cutoff frequency, lower gate leakage current, smaller output conductance and higher maximum frequency of oscillation. Finally, the uniformity of the device characteristics evaluated for sub-100-nm HEMTs with the optimized recess width. The result reveals the significant role of the short channel effects on the device uniformity. 相似文献
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Optimal noise figure of microwave GaAs MESFET's 总被引:1,自引:0,他引:1
《Electron Devices, IEEE Transactions on》1979,26(7):1032-1037
The optimal value of the minimum noise figure Fo of GaAs MESFET's is expressed in terms of either representative equivalent circuit elements or geometrical and material parameters in simple analytical forms. These expressions are derived on a semiempirical basis. The predicted values of Fo for sample GaAs MESFET's using these expressions are in good agreement with the measured values at microwave frequencies. The expressions are then applied to show design optimization for low-noise devices. This exercise indicates that shortening the gate length and minimizing the parasitic gate and source resistances are essential to lower Fo . Moreover, a simple shortening of the gate length may not bring an improved Fo unless the unit gate width is accordingly narrowed. The maximum value of the unit gate width is defined as the width above which the gate metallization resistance becomes greater than the source series resistance. Short-gate GaAs MESFET's with optimized designs promise a superior noise performance at microwave frequencies throughK band. The predicted values of Fo at 20 GHz, for example, for a half-micrometer gate device and a quarter-micrometer gate device are 3 and 2 dB, respectively. These devices could be fabricated with the current technology. 相似文献
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借助一新的工艺模拟与异质器件模型用CAD软件──POSES(Poisson-SchroedingerEquationSolver),对以AlGaAs/InGaAs异质结为基础的多种功率PHEMT异质层结构系统(传统、单层与双层平面掺杂)进行了模拟与比较,确定出优化的双平面掺杂AlGaAs/InGaAs功率PHEMT异质结构参数,并结合器件几何结构参数的设定进行器件直流与微波特性的计算,用于指导材料生长与器件制造。采用常规的HEMT工艺进行AlGaAs/InGaAs功率PHEMT的实验研制。对栅长0.8μm、总栅宽1.6mm单胞器件的初步测试结果为:IDss250~450mA/mm;gm0250~320mS/mm;Vp-2.0-2.5V;BVDS5~12V。7GHz下可获得最大1.62W(功率密度1.0W/mm)的功率输出;最大功率附加效率(PAE)达47%。 相似文献
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Chang-Hoon Choi Chidambaram P.R. Khamankar R. Machala C.F. Zhiping Yu Dutton R.W. 《Electron Device Letters, IEEE》2002,23(4):224-226
Degradation of MOS gate capacitance in the inversion region becomes worse as the gate length is scaled down, according to a new experiment. Namely, the polysilicon depletion effect has gate length dependence. The origin of this gate length-dependent polydepletion effect has been modeled and verified by using device simulation. As a result, the gradient of dopant distribution resulting from ion implantation is shown to be an additional potential drop in the polygate. In addition, the enlarged depletion width at the gate sidewall can worsen the polydepletion effect for very-small MOSFETs 相似文献