开关电容双二次滤波器发展综述

本文综述了开关电容（SC）双二次滤波器的发展，评价了这些电路的性能，比较了它们的优缺点。最后简要介绍了SC滤波器电容面积效益的设计技术。     

级联开关电流滤波器设计

本文提出了一种新的有源器件开关电流运算放大器(SIOA)。新元件的引入大大减化了电路的作图,十分便于开关电流(SI)电路的分析和综合。以开关电容(SC)电路为原型,导出了若干新的全极点和椭圆(二阶或三阶)SI电路。这些电路既可作为滤波节单独使用,也可用于级联设计以实现高阶转移函数。为了说明设计方法,给出了一个五阶SI低通滤波器设计例子。     

一种新的开关电流双二次滤波器

本文阐述了开关电流(SI)和开关电容(SC)电路的相似性原理,由此提出了一个新的SI双二次滤波器电路,该电路是由文献[5]的三运放SC双二次电路为原型导出的。该电路的一个重要特征是:它在单一积木块上能同时获得低通、带通和高通滤波功能。据此,得到了SI电路的一般双二次实现。     

开关电容滤波器的分析与运用

开关电容作为一种实现有源滤波器的技术在电路设计中的运用与日俱增，首先阐述了开关电容的基本概念，接着对开关电容滤波器进行分析，然后对一个具体的一个二阶低频开关电容滤波器进行了详细讨论，最后采用台机电（TSMC）公司的tsmc024（0．24vmCMOS工艺）进行设计，经过了一系列的优化和仿真工作，得出了比较好的结果。     

基于数学优化算法的开关电容滤波器电容自动综合

介绍了一种基于数学优化算法的二阶有源开关电容（ＳＣ）标准模块电路级联实现的开关电容滤波器（ＳＣＦ）电容自动综合方法，它克服了传统设计方法动态范围小，敏感度高，电容比大的缺点，可以满意地设计低通，高通，带通和带阻等各种滤波器。     

开关电流电路基本单元误差分析及其改进

开关电流技术(SI)是一种可取代开关电容技术的数据采样技术.首先介绍了SI技术,然后以SI电路基本单元为例,分析了SI电路存在的各种误差,并针对这些误差提出了解决方法;最后提出了一种新的改进电路.实验结果表明,采用TSMC 0.35μm工艺参数和Hspice仿真电路,所设计的电路误差小,输出波形理想,从而可达到预期的目的.     

对寄生电容不灵敏的开关电容有源滤波器的设计

采用单位缓冲器设计对寄生电容不灵敏的开关电容(SC)频率相关负电阻(FDNR)元件，利用该元件对椭圆函数式LC低通滤波器进行SC模拟。为了获得电容最佳值，提出了一种简单的最优化方法；并采用寄生电阻预畸变与SC负电阻相结合的办法，设计的SC滤波器对寄生电容不灵敏，且电路简单。在电子工作平台(EWB)上进行五阶椭圆低通SC-FDNR滤波器仿真，测量数据最大相对误差为0．948％，仿真结果表明该方法实用可行，效果明显。     

对寄生电容不灵敏的开关电容有源FDNR滤波器的设计

采用单位缓冲器设计对寄生电容不灵敏的开关电容(SC)频率相关负电阻(FDNR)元件，利用该元件对椭园函数式LC低通滤波器进行SC模拟。为了获得电容最佳值，提出了一种简单的最优化方法；并采用寄生电阻预畸变与SC负电阻相结合的办法，设计的SC滤波器对寄生电容不灵敏，且电路简单。在电子工作平台(EWB)上进行五阶椭园低通SC-FDNR滤波器仿真，测量数据最大相对误差为0．948％，仿真结果表明该方法实用可行，效果明显。     

微型加速计全差分Σ-Δ接口IC

主要描述一种加速度感应系统全差分Σ-ΔCMOS接口IC。电容传感器接口由一个前端可配置开关电容(SC)电荷放大器和一个末端,一阶SCΣ-Δ调制器组成。本设计采用开关双采样技术(CDS)来消减低频噪声,能有效地隔离高性能Σ-Δ调制器和MEMS传感器。采用0.35μm CMOS技术,在3.3 V电源环境下能够理想工作。仿真结果显示该设计能达到0.55 V/g的精度。     

具有混合反馈的高Q和/或高f_s开关电容带通滤波器

本文提出了一种减少电容分布和总电容的高Q和/或高f_s开关电容(SC)带通滤波器。在传统的双二次SC滤波器结构中,引入部分正反馈并改变前馈网络可使总电容和电容分布得到大幅度的减少。举例说明了二阶高Q(=50)SC带通滤波器设计,并比较了不同滤波器结构的性能参数。     

Architecture for low-voltage switched-current complex bandpassfilters

An architecture for the switched-current (SI) realisation of complex filters is presented, based upon the signal flow-graph method. Also briefly discussed is a practical design flow for SI complex filters, based on that for traditional real SI filter designs. A verification of the architecture is given via the design and simulation of a fifth-order complex SI bandpass filter with 1 MHz centre frequency and bandwidth, implemented using a low-voltage class AB neutralised SI scheme     

Switched-current circuit design issues

Switched-current (SI) circuits represent a current-mode analog sampled-data signal processing technique realizable in standard digital CMOS technologies. Unlike switched-capacitor (SC) circuits, SI circuits require only a standard digital CMOS process. SI circuits use MOS transistors as the storage elements to provide analog memory capability. Similar to the operation of dynamic logic circuits, a voltage is sampled onto the gate of a MOSFET and held on its noncritical gate capacitance. The held voltage signal on the gate causes a corresponding held current signal in the drain, usually proportional to the square of the gate-to-source voltage. Design issues related to the implementation and performance of SI circuits are presented. SI filters show comparable performance to SC filters except in terms of passband accuracy. The major source of error is nonunity current gain in the SI integrator due to device mismatch and clock-feedthrough effects. For the initial CMOS prototypes, the current track and hold (T/H) gain error was about 2.5%     

High-speed switched-current matched filter for WCDMA receivers

A matched filter (MF) based upon the cascoded class AB SI technique is presented for spread-spectrum communication receivers. Accomplished through both architectural and circuit developments, the filter's features include low power, high speed and compatibility with standard CMOS process inherent to SI signal processing. For performance assessment, a 31-tap 80 MS/s SI MF for despreading task in future high-speed WCDMA receivers is demonstrated.     

A micropower fourth-order elliptical switched-capacitor low-pass filter

A micropower fourth-order elliptical switched-capacitor (SC) low-pass filter for biomedical applications has been designed and measured. The charge transfer error of an SC integrator using a transconductance amplifier is discussed. Also first-order noise and PSRR calculations are performed and compared with the results of simulations and measurements. The measurements show that by careful optimization of the gain bandwidth, slew rate, and gain of the amplifiers, high-performance low-power SC filters can be constructed. The cutoff frequency of the filter is 5 kHz, the ripple in the passband is 0.27 dB, and stopband rejection is 49 dB. The power consumption of the filter is 190 /spl mu/W with /spl plusmn/2.5-V power supplies. The dynamic range of the filter is 75 dB, and the total harmonic distortion over the whole passband range is below 0.25% for a 2-V/SUB pp/ input signal. The PSRR of the filter is above 40 dB at frequencies below 3 kHz.     

新型多功能开关电流双二次滤波器

本文提出了一种具有较低灵敏度和正反两相输出的开关电流(SI)改进型通用积木块(MUB),可以实现抽样数据信号处理的各种基本运算.据此,以开关电容电路为原型,采用信号流图方法生成了一种新型SI高Q双二次滤波器,可获得低通、高通、带通和带阻等多种滤波功能。     

CMOS switched-current ladder filters

The design and implementation of switched-current (SI) ladder filters is described. The basic current-mode circuits, including the SI differential integrator/summer are developed. The SI integrator/summer is shown to be directly analogous to the switched-capacitor (SC) integrator/summer; thus, all the synthesis techniques developed for the design of SC filters can be used to synthesize SI filters. Signal flowgraph synthesis of SI ladder filters is presented. The nonideal characteristics of SI ladder filters that limit their accuracy are evaluated. Clock-feedthrough and device mismatch induced errors are more severe in the present SI circuit configurations than in SC circuits. A standard digital 2-μm n-well CMOS process has been used to implement two high-order ladder filters. Simulations accurately predict the measured results of the first integrated SI filters. The area and power dissipation are comparable to those obtained with the switched-capacitor technique     

Accurate SI filters using RGC integrators

The design and implementation of single-ended and fully-differential switched current (SI) biquadratic high-Q bandpass filters to meet the specifications of the dual-tone multiple-frequency (DTMF) system are presented. Both designs use the regulated-gate cascode (RGC) dynamic current mirror to obtain center frequency accuracy of 0.1% and a quality factor of 24. Compared to the equivalent switched capacitor (SC) implementation of these filters, the single-ended SI filter requires 30% less area for the same minimum-sized capacitance, power dissipation and performance     

Order Wire Transmission in Digital Microwave Systems

Control, supervisory, and order wire signal transmission, i.e., service channel (SC) is a requirement for most microwave systems. In digital radio the data spectrum extends to the lowest baseband (BB) frequencies. Frequency translation of the SC above the data spectrum is one possibility. Another method, in frequent use, is the double modulation technique, e.g., the SC amplitude modulates the carrier that is already phase modulated by the data spectrum. A novel approach that results in significant equipment cost savings and good performance is proposed. The low-frequency power density spectrum of the random multilevel channel coded data is removed. The vacated spectrum is available for the SC. For different bit rates, the error probabilityP(e)degradation due to SC is calculated. The analysis is performed for various channel coded messages and SC spectrum utilizations. The high-pass filter that assures low-frequency data spectrum removal is optimized for the SC signal to noise ratio and dataP(e)degradation. The analysis is verified with computer simulations and actual multilevel frequency-shift keying (FSK) 6-GHz microwave hop measurements. The proposed approach is also applicable to analog microwave systems when carrying hybrid information. The hybrid system carries an SC, 6.3-Mb/s data, and 900 frequency division multiplexed voice channels in a shared BB.