320×256锗基中波碲镉汞红外焦平面探测器研究

报道了分子束外延锗基中波碲镉汞薄膜材料以及320×256锗基中波碲镉汞红外焦平面探测器研究的初步结果。利用分子束外延技术基于3英寸锗衬底生长的中波碲镉汞薄膜材料,平均宏观缺陷密度低于200 cm-2,平均半峰宽优于90 arcsec,平均腐蚀坑密度低于2.9×106 cm-2;采用标准的二代平面工艺制备的320×256锗基中波碲镉汞红外焦平面探测器,平均峰值探测率达到3.8×1011cm·Hz1/2W-1,平均等效噪音温差优于17.3 mK,非均匀性优于6.5%,有效像元率高于99.7%。     

Si基短波碲镉汞材料分子束外延生长研究

报道了在中波工艺基础上,Si 基碲镉汞分子束外延短波工艺的最新研究进展,通过温度标定、使用反射式高能电子衍射、高温计的在线测量和现有的中波 Si 基碲镉汞温度控制曲线建立及优化了 Si 基碲镉汞短波材料的生长温度控制曲线;获得的 Si 基短波 HgCdTe 材料表面光亮、均匀,表面缺陷密度小于3000 cm －2;基于此技术成功制备出了 Si 基短／中波双色材料。     

大尺寸碲锌镉基碲镉汞材料分子束外延技术研究

针对高质量、大规模碲镉汞红外焦平面探测器需求的持续增加,本文开展了使用分子束外延方式在50 mm×50 mm(211)B碲锌镉衬底上外延碲镉汞材料技术的研究。通过对碲锌镉衬底改进湿化学腐蚀、碲锌镉衬底预处理、碲锌镉衬底缓冲层生长、碲锌镉基碲镉汞材料工艺开发等方面的研究,开发出了能够稳定获得碲锌镉基碲镉汞材料的工艺。材料质量、工艺重复性良好,获得的碲锌镉基碲镉汞材料双晶衍射半峰宽(35±5)arcsec,组分平均值为0.2160;碲镉汞薄膜材料厚度平均值为6.06μm。     

碲锌镉晶体定向研究

碲锌镉材料是制备高性能碲镉汞红外焦平面探测器不可或缺的衬底材料.液相外延工艺和分子束外延工艺分别需要使用(111)晶面和(211)晶面碲锌镉衬底制备碲镉汞薄膜材料.低偏角、高精度衬底的选取有利于高质量碲镉汞外延层的获得.介绍了孪晶线快速定向法、使用X射线衍射仪(X-Ray Diffractome-ter,XRD)定向法...     

在Si和Ge衬底上用分子束外延生长HgCdTe

在当前大规模红外焦平面器件的研制中，高性能器件的制备需要高质量、大面积、组分均匀的碲镉汞材料。衬底和外延材料的晶格失配导致了大量的位错增殖，严重影响红外焦平面器件的工作性能。本文对各种衬底进行了比较，并对Si基和Ge基上的外延碲镉汞材料的生长工艺及性能进行了调研和评价。     

Si基复合衬底碲镉汞液相外延技术的研究

文章报道了采用Si基复合衬底，利用液相外延方法成功进行中波碲镉汞薄膜生长的情况，并且采用X光双晶衍射、X光形貌、红外付立叶光谱仪等手段对碲镉汞薄膜进行了表征。Si基复合衬底碲镉汞外延膜晶体结构为单晶，并且它的双晶衍射半峰值接近国外同类产品的先进水平。     

短/中波双色碲镉汞红外探测器制备研究

报道了基于分子束外延的短/中波双色碲镉汞材料及器件的最新研究进展。采用分子束外延方法制备出了高质量的短/中波双色碲镉汞材料,并通过提高材料质量将其表面缺陷密度控制在300 cm-2以内。在此基础上进一步优化了芯片制备工艺,尤其是在减小像元中心距方面作了优化。基于上述多项材料及器件工艺制备出了320×256短/中波双色碲镉汞红外探测器组件。结果表明,该组件的测试性能及成像效果良好。     

双色焦平面红外探测器相对光谱串音研究

提出了一种评价双色探测器的相对光谱串音的模型及测试方法。为验证模型及测试方法的可行性,采用分子束外延锗基叠层异质结构碲镉汞薄膜材料,研制了微台面结构短波/中波双色红外焦平面探测器原理器件,进行了相对光谱串音测试,归纳出3种主要的相对光谱串音模式,并结合材料、器件结构和工艺特点,分析了相对光谱串音的成因。     

中国电科11所碲镉汞薄膜材料制备技术进展

碲镉汞材料具有响应速度快、量子效率高、带隙连续可调等优点,广泛应用于红外探测领域,本文报道了近年来中国电科11所在碲镉汞薄膜材料制备方面的技术进展。在碲锌镉衬底材料制备方面,已突破135mm碲锌镉晶体生长技术,碲锌镉衬底平均位错腐蚀坑密度(EPD) <1×104cm-2,具备了80mm×80mm规格碲锌镉衬底的批量生产能力。在液相外延碲镉汞薄膜制备方面,富碲水平液相外延碲镉汞薄膜平均位错腐蚀坑密度EPD<4×104cm-2,具备80mm×80mm规格碲镉汞薄膜的制备能力;富汞垂直液相外延实现高质量双层异质结碲镉汞薄膜材料批量化制备,该种材料的半峰宽(FWHM)控制在(20～40)arcsec范围内,碲镉汞薄膜厚度极差≤±06μm。在分子束外延碲镉汞薄膜方面,实现了6 in硅基碲镉汞材料制备,组分标准偏差≤00015,表面宏观缺陷密度≤100cm-2;碲锌镉基碲镉汞材料已具备50mm×50mm制备能力,组分标准偏差为0002,厚度标准偏差为0047μm。从探测器验证结果来看,基于富碲水平液相外延碲镉汞薄膜实现了1 k×1 k、2 k×2 k等规格红外焦平面探测器的工程化制备;采用双层异质结碲镉汞薄膜实现了高温工作、长波及甚长波探测器的制备;使用分子束外延制备的碲镉汞薄膜实现了27 k×27 k、54 k×54 k、8 k×8 k等规格红外焦平面探测器研制,在宇航领域有巨大的应用潜力。     

短/中波双色碲镉汞红外焦平面探测器研究

报道了基于分子束外延碲镉汞短/中波双色材料、器件的最新研究进展。采用分子束外延方法制备出了高质量的短/中波双色碲镉汞材料,并优化了材料的质量,材料表面缺陷密度控制在500个/cm-2以内,通过扫描电子显微镜可以看出各层之间界面陡峭,使用傅里叶红外变换光谱仪(FTIR)、X射线衍射(XRD)等方法对材料进行了表征,基于此材料制备出了短/中波碲镉汞双色器件,器件测试性能良好。     

Monolithically integrated HgCdTe focal plane arrays

The cost and performance of hybrid HgCdTe infrared (IR) focal plane arrays are constrained by the necessity of fabricating the detector arrays on a CdZnTe substrate. These substrates are expensive, fragile, available only in small rectangular formats, and are not a good thermal expansion match to the silicon readout integrated circuit. We discuss in this paper an IR sensor technology based on monolithically integrated IR focal plane arrays that could replace the conventional hybrid focal plane array technology. We have investigated the critical issues related to the growth of HgCdTe on Si read-out integrated circuits and the fabrication of monolithic focal plane arrays: (1) the design of Si read-out integrated circuits and focal plane array layouts; (2) the low-temperature cleaning of Si(001) wafers; (3) the growth of CdTe and HgCdTe layers on read-out integrated circuits; (4) diode creation, delineation, electrical, and interconnection; and (4) demonstration of high yield photovoltaic operation without limitation from earlier preprocessing such as substrate cleaning, molecular beam epitaxy (MBE) growth, and device fabrication. Crystallographic, optical, and electrical properties of the grown layers will be presented. Electrical properties for diodes fabricated on misoriented Si and readout integrated circuit (ROIC) substrates will be discussed. The fabrication of arrays with demonstrated I–V properties show that monolithic integration of HgCdTe-based IR focal plane arrays on Si read-out integrated circuits is feasible and could be implemented in the third generation of IR systems.     

异质衬底外延碲镉汞薄膜位错抑制技术进展

分子束外延碲镉汞技术是制备第三代红外焦平面探测器的重要手段,基于异质衬底的碲镉汞材料具有尺寸大、成本低、与常规半导体设备兼容等优点,是目前低成本高性能红外探测器发展中的研究重点。对异质衬底上碲镉汞薄膜位错密度随厚度的变化规律进行了建模计算,结果显示ρ~1/h模型与实验结果吻合度好,异质衬底上原生碲镉汞薄膜受位错反应半径制约,其位错密度无法降低至5×10 6 cm-2以下,难以满足长波、甚长波器件的应用需求。为了有效降低异质外延的碲镉汞材料位错密度,近年来出现了循环退火、位错阻挡和台面位错吸除等位错抑制技术,本文介绍了各技术的原理及进展,分析了后续发展趋势及重点。循环退火和位错阻挡技术突破难度大,发展潜力小,难以将碲镉汞位错密度控制在5×105 cm-2以内。台面位错吸除技术目前已经显示出了巨大的发展潜力和价值,后续与芯片工艺融合后,有望大幅促进低成本长波、中长波、甚长波器件的发展。     

MBE Growth of HgCdTe on Large-Area Si and CdZnTe Wafers for SWIR,MWIR and LWIR Detection

Molecular beam epitaxy (MBE) growth of HgCdTe on large-size Si (211) and CdZnTe (211)B substrates is critical to meet the demands of extremely uniform and highly functional third-generation infrared (IR) focal-panel arrays (FPAs). We have described here the importance of wafer maps of HgCdTe thickness, composition, and the macrodefects across the wafer not only to qualify material properties against design specifications but also to diagnose and classify the MBE-growth-related issues on large-area wafers. The paper presents HgCdTe growth with exceptionally uniform composition and thickness and record low macrodefect density on large Si wafers up to 6-in in diameter for the detection of short-wave (SW), mid-wave (MW), and long-wave (LW) IR radiation. We have also proposed a cost-effective approach to use the growth of HgCdTe on low-cost Si substrates to isolate the growth- and substrate-related problems that one occasionally comes across with the CdZnTe substrates and tune the growth parameters such as growth rate, cutoff wavelength (λ _cutoff) and doping parameters before proceeding with the growth on costly large-area CdZnTe substrates. In this way, we demonstrated HgCdTe growth on large CdZnTe substrates of size 7 cm × 7 cm with excellent uniformity and low macrodefect density. Received December 7, 2007; accepted February 25, 2008     

HgCdTe/Si materials for long wavelength infrared detectors

The heteroepitaxial growth of HgCdTe on large-area Si substrates is an enabling technology leading to the production of low-cost, large-format infrared focal plane arrays (FPAs). This approach will allow HgCdTe FPA technology to be scaled beyond the limitations of bulk CdZnTe substrates. We have already achieved excellent mid-wavelength infrared (MWIR) and short wavelength infrared (SWIR) detector and FPA results using HgCdTe grown on 4-in. Si substrates using molecular beam epitaxy (MBE), and this work was focused on extending these results into the long wavelength infrared (LWIR) spectral regime. A series of nine p-on-n LWIR HgCdTe double-layer heterojunction (DLHJ) detector structures were grown on 4-in. Si substrates. The HgCdTe composition uniformity was very good over the entire 4-in. wafer with a typical maximum nonuniformity of 2.2% at the very edge of the wafer; run-to-run composition reproducibility, realized with real-time feedback control using spectroscopic ellipsometry, was also very good. Both secondary ion mass spectrometry (SIMS) and Hall-effect measurements showed well-behaved doping and majority carrier properties, respectively. Preliminary detector results were promising for this initial work and good broad-band spectral response was demonstrated; 61% quantum efficiency was measured, which is very good compared to a maximum allowed value of 70% for a non-antireflection-coated Si surface. The R₀A products for HgCdTe/Si detectors in the 9.6-μm and 12-μm cutoff range were at least one order of magnitude below typical results for detectors fabricated on bulk CdZnTe substrates. This lower performance was attributed to an elevated dislocation density, which is in the mid-10⁶ cm⁻² range. The dislocation density in HgCdTe/Si needs to be reduced to <10⁶ cm⁻² to make high-performance LWIR detectors, and multiple approaches are being tried across the infrared community to achieve this result because the technological payoff is significant.     

Direct growth of CdZnTe/Si substrates for large-area HgCdTe infrared focal plane arrays

Direct epitaxial growth of high-quality 100lCdZnTe on 3 inch diameter vicinal {100}Si substrates has been achieved using molecular beam epitaxy (MBE); a ZnTe initial layer was used to maintain the {100} Si substrate orientation. The properties of these substrates and associated HgCdTe layers grown by liquid phase epitaxy (LPE) and subsequently processed long wavelength infrared (LWIR) detectors were compared directly with our related efforts using CdZnTe/ GaAs/Si substrates grown by metalorganic chemical vapor deposition (MOCVD). The MBE-grown CdZnTe layers are highly specular and have both excellent thickness and compositional uniformity. The x-ray full-width at half-maximum (FWHM) of the MBE-grown CdZnTe/Si increases with composition, which is a characteristic of CdZnTe grown by vapor phase epitaxy, and is essentially equivalent to our results obtained on CdZnTe/GaAs/Si. As we have previously observed, the x-ray FWHM of LPE-grown HgCdTe decreases, particularly for CdZnTe compositions near the lattice matching condition to HgCdTe; so far the best value we have achieved is 54 arc-s. Using these MBE-grown substrates, we have fabricated the first high-performance LWIR HgCdTe detectors and 256 x 256 arrays using substrates consisting of CdZnTe grown directly on Si without the use of an intermediate GaAs buffer layer. We find first that there is no significant difference between arrays fabricated on either CdZnTe/Si or CdZnTe/GaAs/Si and second that the results on these Si-based substrates are comparable with results on bulk CdZnTe substrates at 78K. Further improvements in detector performance on Si-based substrates require a decrease in the dislocation density.     

MOCVD grown CdZn Te/GaAs/Si substrates for large-area HgCdTe IRFPAs

Large-area HgCdTe 480×640 thermal-expansion-matched hybrid focal plane arrays were achieved by substituting metalorganic chemical vapor deposition (MOCVD)-grown CdZnTe/GaAs/Si alternative substrate in place of bulk CdZnTe substrates for the growth of HgCdTe p-on-n double-layer heterojunctions by controllably-doped mercury-melt liquid phase epitaxy (LPE). (100) CdZnTe was grown by MOCVD on GaAs/Si using a vertical-flow high-speed rotating disk reactor which incorporates up to three two-inch diameter substrates. Layers having specular surface morphology, good crystalline structure, and surface macro defect densities <50 cm⁻² are routinely achieved and both the composition uniformity and run-to-run reproducibility were very good. As the composition of the CdZnTe layers increases, the x-ray full width at half maximum (FWHM) increases; this is a characteristic of CdZnTe grown by VPE techniques and is apparently associated with phase separation. Despite a broader x-ray FWHM for the fernary CdZnTe, the FWHM of HgCdTe grown by LPE on these substrates decreases, particularly for [ZnTe] compositions near the lattice matching condition to HgCdTe. An additional benefit of the ternary CdZnTe is an improved surface morphology of the HgCdTe layers. Using these silicon-based substrates, we have demonstrated 78K high-performance LWIR HgCdTe 480×640 arrays and find that their performance is comparable to similar arrays fabricated on bulk CdZnTe substrates for temperatures exceeding approximately 78K. The performance at lower temperatures is apparently limited by the dislocation density which is typically in the low-mid 10⁶ cm⁻² range for these heteroepitaxial materials.     

MBE growth and device processing of MWIR HgCdTe on large area Si substrates

The traditional substrate of choice for HgCdTe material growth has been lattice matched bulk CdZnTe material. However, as larger array sizes are required for future devices, it is evident that current size limitations of bulk substrates will become an issue and therefore large area Si substrates will become a requirement for HgCdTe growth in order to maintain the cost-efficiency of future systems. As a result, traditional substrate mounting methods that use chemical compounds to adhere the substrate to the substrate holder may pose significant technical challenges to the growth and fabrication of HgCdTe on large area Si substrates. For these reasons, non-contact (indium-free) substrate mounting was used to grow mid-wave infrared (MWIR) HgCdTe material on 3″ CdTe/Si substrates. In order to maintain a constant tepilayer temperature during HgCdTe nucleation, reflection high-energy electron diffraction (RHEED) was implemented to develop a substrate temperature ramping profile for HgCdTe nucleation. The layers were characterized ex-situ using Fourier transform infrared (FTIR) and etch pit density measurements to determine structural characteristics. Dislocation densities typically measured in the 9 10⁶ cm⁻² to 1 10⁷ cm⁻² range and showed a strong correlation between ramping profile and Cd composition, indicating the uniqueness of the ramping profiles. Hall and photoconductive decay measurements were used to characterize the electrical properties of the layers. Additionally, both single element and 32 32 photovoltaic devices were fabricated from these layers. A RA value of 1.8 10⁶-cm² measured at −40 mV was obtained for MWIR material, which is comparable to HgCdTe grown on bulk CdZnTe substrates.     

High-quality large-area MBE HgCdTe/Si

HgCdTe offers significant advantages over other similar semiconductors, which has made it the most widely utilized variable-gap material in infrared (IR) focal plane array (FPA) technology. HgCdTe hybrid FPAs consisting of two-dimensional detector arrays that are hybridized to Si readout circuits (ROIC) are the dominant technology for second-generation infrared systems. However, one of the main limitations of the HgCdTe materials system has been the size of lattice-matched bulk CdZnTe substrates, used for epitaxially grown HgCdTe, which have been limited to 30 cm² in production. This size limitation does not adequately support the increasing demand for larger FPA formats which now require sizes up to 2048×2048, and only a single die can be printed per wafer. Heteroepitaxial Si-based substrates offer a cost-effective technology that can be scaled to large wafer sizes and further offer a thermal-expansion-matched hybrid structure that is suitable for large format FPAs. This paper presents data on molecular-beam epitaxy (MBE)-grown HgCdTe/Si wafers with much improved materials characteristics than previously reported. We will present data on 4- and 6-in diameter HgCdTe both with extremely uniform composition and extremely low defects. Large-diameter HgCdTe/Si with nearly perfect compositional uniformity and ultra low defect density is essential for meeting the demanding specifications of large format FPAs.     

Impact of CdZnTe Substrates on MBE HgCdTe Deposition

The highest sensitivity, lowest dark current infrared focal plane arrays (IRFPAs) are produced using HgCdTe on CdZnTe substrates. As-received state-of-the-art CdZnTe 6 × 6 and 7 × 7.5 cm substrates were analyzed using Nomarski phase contrast microscopy, Auger electron spectroscopy, scanning electron microscopy/energy dispersive spectroscopy, and scanning profilometry. On all CdZnTe substrates tested, we observed as-received large area macro-defect contamination. Using a defect specification limit of 50 contiguous defective pixels, we identified non-compliant 1280 × 720 12-μm pitch focal plane arrays due to as-received substrate macro-defect contamination. Using the above specification, up to 20% IRFPA wafer yield loss is due to state-of-the-art as-received CdZnTe substrate macro-contamination.