基于HD和SVD的DWT变换的数字图像水印

文章提出一种基于离散小波变换(DWT)、Hessenberg分解(HD)和奇异值分解(SVD)的图像水印方法.在嵌入过程中,对原始载体图像进行多级DWT分解,并将得出的子带系数作为HD的输入.在创建水印的同时对SVD进行操作,通过缩放因子将水印嵌入到主图像中.运用果蝇优化算法,通过给出的客观评价函数来寻找比例因子.在各...     

基于EMD的音频水印算法研究

提出了一种基于经验模态分解(Empirical Mode Decomposition,EMD)的音频水印算法,选择EMD分解得到的冗余信号分量作为水印的嵌入位置,并证明了冗余信号分量按照提出的算法嵌入水印以后仍然是冗余信号分量,从而为水印嵌入提取提供了理论基础.通过粒子群优化算法求解出适用于EMD分解的最优音频水印嵌入强度,按此强度嵌入水印,可以同时满足水印的健壮性和不可感知性.仿真结果表明,使用计算出的最优嵌入强度嵌入水印,嵌入水印后的音频信号在受到大部分攻击的情况下可以确保水印的不可见性和健壮性.     

基于SVD的特征空间波束合成器

针对特征空间波束合成器,采用对数据矩阵进行奇异值分解,利用奇异值和奇异值矢量计算最优权矢量,完成波束合成.该方法不仅完成特征空间降维作用,同时可以避免对阵列协方差矩阵的估计,减少估计运算量和估计误差.实现的主要步骤包括了奇异值分解的数值计算,信源数估计,期望信号波达方向估计和权值求解几个方面.计算机仿真证明,新算法可以正确实现波束合成,提高系统增益.     

基于可重构计算系统的矩阵三角化分解硬件并行结构研究

可重构计算系统成为加速计算密集型应用的重要选择之一.在众多受到关注的计算密集型问题中,矩阵三角化分解作为典型的基础类应用始终处于研究的核心地位,在求解线性方程组、求矩阵特征值等科学与工程问题中有重要的研究价值.本文面向矩阵三角化分解中共有的三角化计算过程,通过分析该过程的线性计算规律,提出一种适于硬件并行实现的子矩阵更新同一化算法及矩阵三角化计算FPGA (Field Programmable Gate Array)并行结构.针对LU矩阵三角化分解在并行结构模板上的高性能实现及优化方法开展了研究.理论分析表明,该算法针对矩阵三角化计算过程具有更高的数据并行性与流水并行性;实验结果表明,与通用处理器的软件实现相比,根据该算法实现的矩阵三角化分解FPGA并行结果在关键计算性能上可以取得10倍以上的加速比.     

一种基于DWT_SVD的抗几何攻击彩色图像水印算法

针对传统离散小波变换(DWT)水印算法不能较好地抵抗几何攻击的缺点,提出了一种基于离散小波变换(DWT)和奇异值分解(SVD)相结合的彩色图像水印新算法。首先对原始彩色载体图像进行RGB三基色分解,然后进行离散小波变换,再选取四个子块的四分之一重构成新子块,并进行二次离散小波变换,最后对其低频部分进行奇异值分解嵌入水印信息,得到嵌入水印的彩色图像。实验结果表明,该算法能够较好地抵抗诸如高斯噪声、椒盐噪声、压缩等常规攻击,并对大角度旋转、任意角度旋转、剪切加旋转等几何攻击也表现出了较强的鲁棒性,其总体性能明显优于传统的DWT水印算法。     

基于DWT和奇异值分解的图像增强算法

提出一种基于离散小波变换(DWT)和奇异值分解技术的图像质量增强方法,能够同时增强分辨率和对比度。首先,该算法通过DWT将输入图像分解为4个子带,对低频子带图像的奇异值矩阵进行估计,然后通过逆DWT重构增强图像。将提出算法应用于灰度图像、彩色图像以及卫星图像,并与其他图像增强方法进行比较分析。实验结果表明,相较于其他传统技术,提出的方法性能更好。     

基于PSO和LM的信号稀疏分解快速算法

传感矩阵和重建算法的性能分析和优化是目前压缩传感领域研究的热点。针对匹配追踪算法在信号稀疏分解中计算量巨大的难题,提出了一种交替使用粒子群算法和LevenbergMarquardt算法的混合智能算法来寻找最佳原子。首先利用粒子群算法得到群体最优解,再以该解作为LM算法的初值,交替使用两种算法,直至发现满意的最优解。数值分析表明,新算法克服了粒子群算法过早收敛于局部极值和LM算法依赖初值的问题,保证了求解的速度和精度。     

基于SVD的波束形成算法研究

本文通过对采样数据矩阵进行QR分解,将求解加权矢量问题转换为求解三角线性方程组,通过避免对自相关矩阵的估计和求逆来提高数值鲁棒性;接着提出一种改进方案:对采样数据矩阵进行SVD分解完成波束形成,此方案利用奇异值和奇异值矢量计算加权矢量,并且通过改变对较小的奇异值赋零的多少,在复杂度与性能之间进行折衷。仿真结果显示,提出的改进方案和QR分解算法的性能接近,都能正确实现波束形成。     

基于两阶段的毫米波大规模MIMO低复杂度混合预编码算法

针对现有基于矩阵分解的混合预编码算法信道容量有损和算法复杂度高的问题,本文提出了一种基于两阶段的低复杂度混合预编码算法.该算法分为获取最优全数字预编码器和求解混合预编码器两部分.首先,本文联合奇异值分解(Singular Value Decomposition,SVD)与注水算法以容量无损的要求设计最优全数字预编码矩阵.其次,为了降低搜索超完备矩阵列的复杂度,提出两阶段混合预编码(Two?Stage Hybrid Precoding,TS?HP)算法求解混合预编码矩阵.第一阶段,根据天线阵列响应矩阵的相关性获取模拟预编码矩阵备选集;第二阶段,利用贪婪搜索对备选集进行搜索构建混合预编码矩阵.仿真结果表明,所提算法能够有效改善系统性能,降低复杂度.     

彩色图像DWT变换下的块SVD零水印

为了提高水印技术的鲁棒性,提出了彩色图像离散小波变换(DWT)下的块奇异值分解(SVD)的零水印.首先对原始载体图像进行离散小波变换,然后选择低频子带进行分块,且对每一块进行奇异值分解,水印则由分解得到的最大前m个奇异值产生.实验结果表明,算法对各种攻击有较强的鲁棒性.     

Matrix factorizations for reversible integer mapping

Reversible integer mapping is essential for lossless source coding by transformation. A general matrix factorization theory for reversible integer mapping of invertible linear transforms is developed. Concepts of the integer factor and the elementary reversible matrix (ERM) for integer mapping are introduced, and two forms of ERM-triangular ERM (TERM) and single-row ERM (SERM)-are studied. We prove that there exist some approaches to factorize a matrix into TERMs or SERMs if the transform is invertible and in a finite-dimensional space. The advantages of the integer implementations of an invertible linear transform are (i) mapping integers to integers, (ii) perfect reconstruction, and (iii) in-place calculation. We find that besides a possible permutation matrix, the TERM factorization of an N-by-N nonsingular matrix has at most three TERMs, and its SERM factorization has at most N+1 SERMs. The elementary structure of ERM transforms is the ladder structure. An executable factorization algorithm is also presented. Then, the computational complexity is compared, and some optimization approaches are proposed. The error bounds of the integer implementations are estimated as well. Finally, three ERM factorization examples of DFT, DCT, and DWT are given     

Further Exploring the Strength of Prediction in the Factorization of Soft-Decision Reed–Solomon Decoding

Reed-Solomon (RS) codes are among the most widely utilized error-correcting codes in digital communication and storage systems. Among the decoding algorithms of RS codes, the recently developed Koetter-Vardy (KV) soft-decision decoding algorithm can achieve substantial coding gain, while has a polynomial complexity. One of the major steps of the KV algorithm is the factorization. Each iteration of the factorization mainly consists of root computations over finite fields and polynomial updating. To speed up the factorization step, a fast factorization architecture has been proposed to circumvent the exhaustive-search-based root computation from the second iteration level by using a root-order prediction scheme. Based on this scheme, a partial parallel factorization architecture was proposed to combine the polynomial updating in adjacent iteration levels. However, in both of these architectures, the root computation in the first iteration level is still carried out by exhaustive search, which accounts for a significant part of the overall factorization latency. In this paper, a novel iterative prediction scheme is proposed for the root computation in the first iteration level. The proposed scheme can substantially reduce the latency of the factorization, while only incurs negligible area overhead. Applying this scheme to a (255, 239) RS code, speedups of 36% and 46% can be achieved over the fast factorization and partial parallel factorization architectures, respectively.     

Efficient realizations of the discrete and continuous wavelettransforms: from single chip implementations to mappings on SIMD arraycomputers

This paper presents a wide range of algorithms and architectures for computing the 1D and 2D discrete wavelet transform (DWT) and the 1D and 2D continuous wavelet transform (CWT). The algorithms and architectures presented are independent of the size and nature of the wavelet function. New on-line algorithms are proposed for the DWT and the CWT that require significantly small storage. The proposed systolic array and the parallel filter architectures implement these on-line algorithms and are optimal both with respect to area and time (under the word-serial model). Moreover, these architectures are very regular and support single chip implementations in VLSI. The proposed SIMD architectures implement the existing pyramid and a'trous algorithms and are optimal with respect to time     

Multidimensional vector radix FHT algorithms

In this paper, efficient multidimensional (M-D) vector radix (VR) decimation-in-frequency and decimation-in-time fast Hartley transform (FHT) algorithms are derived for computing the discrete Hartley transform (DHT) of any dimension using an appropriate index mapping and the Kronecker product. The proposed algorithms are more effective and highly suitable for hardware and software implementations compared to all existing M-D FHT algorithms that are derived for the computation of the DHT of any dimension. The butterflies of the proposed algorithms are based on simple closed-form expressions that allow easy implementations of these algorithms for any dimension. In addition, the proposed algorithms possess properties such as high regularity, simplicity and in-place computation that are highly desirable for software and hardware implementations, especially for the M-D applications. A close relationship between the M-D VR complex-valued fast Fourier transform algorithms and the proposed M-D VR FHT algorithms is established. This type of relationship is of great significance for software and hardware implementations of the algorithms, since it is shown that because of this relationship and the fact that the DHT is an alternative to the discrete Fourier transform (DFT) for real data, a single module with a little or no modification can be used to carry out the forward and inverse M-D DFTs for real- or complex-valued data and M-D DHTs. Thus, the same module (with a little or no modification) can be used to cover all domains of applications that involve the DFTs or DHTs.     

Fast factorization architecture in soft-decision Reed-Solomon decoding

Reed-Solomon (RS) codes are among the most widely utilized block error-correcting codes in modern communication and computer systems. Compared to its hard-decision counterpart, soft-decision decoding offers considerably higher error-correcting capability. The recent development of soft-decision RS decoding algorithms makes their hardware implementations feasible. Among these algorithms, the Koetter-Vardy (KV) algorithm can achieve substantial coding gain for high-rate RS codes, while maintaining a polynomial complexity with respect to the code length. In the KV algorithm, the factorization step can consume a major part of the decoding latency. A novel architecture based on root-order prediction is proposed in this paper to speed up the factorization step. As a result, the time-consuming exhaustive-search-based root computation in each iteration level, except the first one, of the factorization step is circumvented with more than 99% probability. Using the proposed architecture, a speedup of 141% can be achieved over prior efforts for a (255, 239) RS code, while the area consumption is reduced to 31.4%.     

Fast algorithms of public key cryptosystem based on Chebyshev polynomials over finite field

The computation of Chebyshev polynomial over finite field is a dominating operation for a public key cryptosystem.Two generic algorithms with running time of have been presented for this computation:the matrix algorithm and the characteristic polynomial algorithm,which are feasible but not optimized.In this paper,these two algorithms are modified in procedure to get faster execution speed.The complexity of modified algorithms is still,but the number of required operations is reduced,so the execution speed is improved.Besides,a new algorithm relevant with eigenvalues of matrix in representation of Chebyshev polynomials is also presented,which can further reduce the running time of that computation if certain conditions are satisfied.Software implementations of these algorithms are realized,and the running time comparison is given.Finally an efficient scheme for the computation of Chebyshev polynomial over finite field is presented.     

Fast Algorithms for Implementation of Montgomery's Modular Multiplication Technique

In this paper, algorithms for fast implementations of Montgomery's modular multiplication algorithm are proposed. These algorithms use nonredundant multibit recoding. Two techniques, one based on multiplication followed by estimation of scaled residue and the other involving integrated multiplication with scaled residue estimation, have been considered in detail. Techniques for simplifying the computation to estimate the multiple of the modulus to be added have been described. The area and computation time requirements of the proposed techniques are estimated for a general radix in order to highlight the time-space trade-offs.     

Prime-length real-valued polynomial residue division algorithms

One class of efficient algorithms for computing a discrete Fourier transform (DFT) is based on a recursive polynomial factorization of the polynomial 1-z/sup -N/. The Bruun algorithm is a typical example of such algorithms. Previously, the Bruun algorithm, which is applicable only when system lengths are powers of two in its original form, is generalized and modified to be applicable to the case when the length is other than a power of two. This generalized algorithm consists of transforms T/sub d,f/ with prime d and real f in the range 0/spl les/f<0.5. T/sub d,0/ computes residues X(z)mod(1-z/sup -2/) and X(z)mod(1-2 cos(/spl pi/k/d)z/sup -1/+z/sup -2/), k=1, 2, ..., d-1, and T/sub d,f/ (f /spl ne/0) computes residues X(z)mod(1-2cos(2/spl pi/(f+k)/d)z/sup -1/+z/sup -2/), k=0, 1, ..., d-1 for a given real signal X(z) of length 2d. The purpose of this paper is to find efficient algorithms for T/sub d,f/. First, polynomial factorization algorithms are derived for T/sub d,0/ and T/sub d,1/4/. When f is neither 0 nor 1/4, it is not feasible to derive a polynomial factorization algorithm. Two different implementations of T/sub d,f/ for such f are derived. One implementation realizes T/sub d,f/ via a d-point DFT, for which a variety of fast algorithms exist. The other implementation realizes T/sub d,f/ via T/sub d, 1/4/, for which the polynomial factorization algorithm exists. Comparisons show that for d/spl ges/5, these implementations achieve better performance than computing each output of T/sub d,f/ separately.     

压缩域运动补偿中的快速算法研究

研究了压缩域运动补偿的快速算法，着重从数学表达方式上研究了当进行宏块预测时，充分利用参考帧中公共块的计算方法，与DCT矩阵分解的快速算法相比，在不影响图像质量的同时。其计算效率提高了26．5％。     

Wavelet transform based novel edge detection algorithms for wideband spectrum sensing in CRNs

The primary task in cognitive radio is to dynamically explore the radio spectrum and reliably detect the co-existing licensed primary transmissions across a wide-band spectrum. This paper focuses on wavelet transform (WT) based wide-band sensing techniques, which identify the edges of the multiple frequency bands simultaneously. Novel edge detection algorithms are proposed based on continuous WT (CWT) and discrete WT (DWT) techniques, applied on wide-band power spectrum. In CWT based spectrum sensing, logarithmic scaling preceded by a thresholding is performed on the CWT coefficients to enhance the small modulus maxima values at the edges, resulting in better detection probability. Since the logarithmic scaling magnifies the spurious edges, the proposed algorithm increases the false alarm probability at high noise variance. To alleviate this problem, DWT based algorithms are proposed, where DWT performs simultaneous denoising and edge detection. To achieve good detection performance at poor SNR scenario, a moving average filtering strategy is adopted at different levels of DWT based algorithms and better performance is achieved even with lower scale value of DWT, thereby reducing the computation time. Comparative studies show that the proposed algorithms outperform the existing WT based edge detection algorithms in the dynamic and frequency selective channels as well.