(Li,Nb)掺杂SnO_2压敏材料的电学非线性研究

研究了掺锂对 Sn O2 压敏电阻器性能的影响。研究发现 L i 对 Sn4 的取代能明显提高陶瓷的烧结速度和致密度 ,且能大幅度改善材料的电学非线性性能。掺入 x(L i2 CO3)为 1.0 %的陶瓷样品具有最高的密度 (ρ=6 .77g/ cm3)、最高的介电常数 (ε=185 1)、最低的视在势垒电场 (EB=6 8.86 V/ mm)和最高的非线性常数 (α=9.9)。对比发现 ,Na 由于具有较大的离子粒半径 ,其掺杂改性性能相对较差。提出了 Sn O2 · L i2 CO3· Nb2 O5晶界缺陷势垒模型     

(Zn,Nb)掺杂SnO2压敏材料的电子特性

依据缺陷势垒模型选取Ｚｎ＾２＋和Ｎｂ＾５＋复合掺杂的ＳｎＯ２陶瓷进行研究,测量了材料的密度、失重率等物理性质和非线性系数、电流－电压（Ｉ－Ｖ）关系曲线等电子性质,利用低电流区电流密度与电场（ｌｏｇＪ－Ｅ）的线性关系定性地讨论了势垒高度与非线性之间的关系。     

MnCO3掺杂对SnO2·Ni2O3·Nb2O5压敏材料性能的影响

研究并分析了Ni3+掺杂和Co2+掺杂对SnO2压敏电阻致密度和电学非线性性能的影响.研究了掺Mn2+对SnO2@Ni 2O3@Nb2O 5压敏材料性能的影响.发现x(MnCO3)为0 10%时,压敏电阻具有最高的视在电场(EB=686 89 V/mm)和最好的电学非线性性能(α=1 2 9).样品的收缩率和致密度变化趋势不一致,这是因为样品的致密度是由收缩率和MnCO3的挥发量两因素共同决定的.     

(Ba,Co,Nb)掺杂SnO2压敏材料电学非线性的研究

通过对样品的伏安特性，晶界势垒的测量和分析，研究了BaCO3对新型(Co，Nb)掺杂SnO2压敏材料微观结构和电学性质的影响。晶界势垒高度测量表明，SnO2晶粒尺寸的迅速减小是压敏电压急剧增高的原因。对Ba含量增加引起SnO2晶粒减小的根源进行了解释。掺杂x(BaCO3)=0．4％的SnO2压敏电阻击穿电压为最小(140V／mm)；掺杂x(BaCO3)-0．8％的SnO2压敏电阻具有最高非线性系数(α=19．6)，最高的势垒电压(ψB=1．28eV)。     

稀土Ce对SnO2·Co2O3·Nb2O5压敏性能的影响

研究了掺Ce对SnO2·Co2O3·Nb2O5压敏电阻器性能的影响。研究发现Ce4+对Sn4+的取代能明显提高陶瓷的致密度,掺入x(CeO2)为0.05的陶瓷样品具有最高的密度(ρ=6.71g/cm3),最高的视在势垒电场(EB=413.6V/mm),最高的非线性系数(α=13.8),最高的势垒电压和最窄的势垒厚度。为了解释样品电学非线性性质的起源,该文提出了SnO2·Co2O3·Nb2O5·CeO2晶界缺陷势垒模型。同时,对该压敏电阻器进行了等效电路分析。试验测量与等效电路分析结果相符。     

(Cu,Mg,Nb)掺杂的SnO2压敏材料的性质

研究了 Cu O对 Sn O2 · Mg O· Nb2 O5压敏材料的密度、非线性特性、介电常数的影响。实验发现 ,适当掺杂 Cu O不仅能增大 Sn O2 · Mg O· Nb2 O5材料的致密度 ,而且能提高非线性系数 ,减小漏电流。掺 2 % Cu O(摩尔比 )时 ,Sn O2 · Mg O· Nb2 O5材料的致密度达到理论值的 93% ,非线性系数 α高达 9.5 ,压敏电压 V1 m A高于4 2 3V/ mm。在 2 0～ 2 0 0°C温度范围和 0 .1～ 10 0 0 k Hz频率范围 ,Sn O2 · Cu O· Mg O· Nb2 O5的介电常数变化很小 ,应用晶界缺陷势垒模型 ,对 Sn O2 · Cu O· Mg O· Nb2 O5材料压敏特性进行了解释。     

(Cd,Co,Nb)掺杂的SnO2压敏材料的电学性质

研究了Cd对(Co，Nb)掺杂SnO2压敏材料电学性质的影响。组分为97．65％SnO2 O．75％Co2O3 0．10％Nb2O5 1．50％CdO的压敏电阻具有最大非线性系数(a=22．2)和最高的势垒(ψB=0．761eV)．当CdO的摩尔分数从0增加到3％时，(Co，Nb)掺杂SnO2压敏电阻的击穿电压从366V／mm增大到556V／mm，1kHz时的相对介电常数从1429减小到1108。晶界势垒高度测量揭示，SnO2的晶粒尺寸的减小是击穿电压增高和介电常数减小的主要原因。对Cd掺杂量增加引起SnO2晶粒减小的根源进行了解释。     

TiO2掺杂导致的SnO2压敏陶瓷晶粒尺寸效应

研究了TiO2掺杂对SnO2-Co2O3-Nb2O5系压敏陶瓷材料电学性能的影响。掺入x(TiO2)为1.00%的陶瓷样品具有最高的密度(r = 6.82 g/cm3),最高的视在势垒电场(EB= 476 V/mm),最高的非线性系数(a = 11.0),最小的相对介电常数。未掺杂的样品阻抗最大。随TiO2掺杂量的增加晶粒逐渐变小,晶粒尺寸的减小归因于未固溶于SnO2晶格而偏析在晶界上的TiO2阻碍相邻SnO2晶粒融合。为了解释SnO2-Co2O3-Nb2O5-TiO2系电学非线性性质的根源,对前人的晶界缺陷势垒模型进行了修正。     

MnCO3掺杂对SnO2·Ni2O3·Nb2O5压敏材料性的影响

研究并分析了Ni3+掺杂和Co2+掺杂对SnO2压敏电阻致密度和电学非线性性能的影响.研究了掺Mn2+对SnO2@Ni 2O3@Nb2O 5压敏材料性能的影响.发现x(MnCO3)为0 10%时,压敏电阻具有最高的视在电场(EB=686 89 V/mm)和最好的电学非线性性能(α=1 2 9).样品的收缩率和致密度变化趋势不一致,这是因为样品的致密度是由收缩率和MnCO3的挥发量两因素共同决定的.     

CeO_2掺杂引起SnO_2压敏电阻的晶粒尺寸效应

研究了掺CeO2对SnO2Co2O3Ta2O5压敏电阻器性能的影响。研究发现:随着x(CeO2)从0增加到1%,压敏电压从190 V/mm增加到205 V/mm,相对介电常数从3 317减小到2 243,晶粒平均尺寸从12.16 mm减小到6.23 mm,在晶界上的Ce4+阻碍了SnO2晶粒的生长。为了解释样品电学非线性性质的起源,笔者提出了SnO2Co2O3Ta2O5CeO2晶界缺陷势垒模型。同时,对该压敏电阻器进行了等效电路分析,试验测量与等效电路分析结果相符。     

Li过量对M-相固溶体Li_2O-Nb_2O_5-TiO_2陶瓷微波介电性能的影响

含有M-相固溶体Li2O-Nb2O5-TiO2(LNT)的微波介质陶瓷具有烧结温度(约1100℃)低,介电常数εr(65～70)及Q·f值(约5000 GHz)高的特点,但其频率温度系数τ却往往偏高(约23×10–6/℃)。为此,系统研究了非化学计量比下Li含量对LNT陶瓷微波介电性能的影响。实验结果表明,Li含量增加能有效调节LNT陶瓷的频率温度系数至近零而不影响其他性能。当Li含量过量5%(质量分数)时,LNT陶瓷具有最佳性能:εr=69.73,Q·f=5 543GHz(=3.518 GHz),τf=–4.4×10–6/℃。     

Investigation of Ta2O5/SiO2/4H-SiC MIS capacitors

Tantalum pentoxide (Ta₂O₅) deposited by pulsed DC magnetron sputtering technique as the gate dielectric for 4H-SiC based metal-insulator-semiconductor (MIS) structure has been investigated. A rectifying current-voltage characteristic was observed, with the injection of current occurred when a positive DC bias was applied to the gate electrode with respect to the n type 4H-SiC substrate. This undesirable behavior is attributed to the relatively small band gap of Ta₂O₅ of around 4.3 eV, resulting in a small band offset between the 4H-SiC and Ta₂O₅. To overcome this problem, a thin thermal silicon oxide layer was introduced between Ta₂O₅ and 4H-SiC. This has substantially reduced the leakage current through the MIS structure. Further improvement was obtained by annealing the Ta₂O₅ at 900 °C in oxygen. The annealing has also reduced the effective charge in the dielectric film, as deduced from high frequency C-V measurements of the Ta₂O₅/SiO₂/4H-SiC capacitors.     

Ta2O5/silicon barrier height measured fromMOSFETs fabricated with Ta2O5 gate dielectric

N-channel metal oxide semiconductor field effect transistors with Ta₂O₅ gate dielectric were fabricated. The Ta₂O₅/silicon barrier height was calculated using both the lucky electron model and the thermionic emission model. Based on the lucky electron model, a barrier height of 0.77 eV was extracted from the slope of the ln(I_g/I_d) versus ln(I_sub/I_d) plot using an impact ionization energy of 1.3 eV. Due to the low barrier height, the application of Ta₂ O₅ gate dielectric transistors is limited to low supply voltage preferably less than 2.0 V     

Time-dependent-dielectric-breakdown characteristics of Hf-doped Ta2O5/SiO2 stack

The Time-Dependent-Dielectric Breakdown (TDDB) characteristics of MOS capacitors with Hf-doped Ta₂O₅ films (8 nm) have been analyzed. The devices were investigated by applying a constant voltage stress at gate injection, at room and elevated temperatures. Stress voltage and temperature dependences of hard breakdown of undoped and Hf-doped Ta₂O₅ were compared. The doped Ta₂O₅ exhibits improved TDDB characteristics in regard to the pure one. The maximum voltage projected for a 10 years lifetime at room temperature is −2.4 V. The presence of Hf into the matrix of Ta₂O₅ modifies the dielectric breakdown mechanism making it more adequate to the percolation model. The peculiarities of Weibull distribution of dielectric breakdown are discussed in terms of effect of three factors: nature of pre-existing traps and trapping phenomena; stress-induced new traps generation; interface layer degradation.     

Low Rayleigh scatteringP2O5-F-SiO2 glasses

The Rayleigh scattering and infrared absorption losses of P₂ O₅-F-doped silica glass, which is a candidate material for ultra-low-loss optical fiber, were investigated experimentally. The Rayleigh scattering loss of 8.5 wt.% P₂O₅ and 0.3 wt.% F-doped SiO₂ glass is found to be 0.8 times that of pure silica glass. It is also found that the infrared absorption property of P₂O₅-F-SiO₂ glass is almost the same as that of pure silica glass. The minimum loss for the proposed composition is estimated to be 0.11 dB/km at 1.55 μm wavelength, and 0.21 dB/km at 1.3 μm wavelength     

Transistor characteristics with Ta2O5 gatedielectric

As the gate oxide thickness decreases below 2 nm, the gate leakage current increases dramatically due to direct tunneling current. This large gate leakage current will be an obstacle to reducing gate oxide thickness for the high speed operation of future devices. A MOS transistor with Ta₂O₅ gate dielectric is fabricated and characterized as a possible replacement for MOS transistors with ultra-thin gate silicon dioxide. Mobility, I_d-V_d, I_d-V_g, gate leakage current, and capacitance-voltage (C-V) characteristics of Ta₂O₅ transistors are evaluated and compared with SiO₂ transistors. The gate leakage current is three to five orders smaller for Ta₂O₅ transistors than SiO₂ transistors     

Effect of Ge-GeO2 co-doping on non-ohmic behaviour of TiO2-V2O5-Y2O3 varistor ceramics

An investigation was made into the effect of doping with the elemental crystal Ge or/and GeO₂ on the TiO₂-V₂O₅-Y₂O₃ varistor ceramics. The result shows that as the doping contents of V₂O₅ and Y₂O₃ are 0.5 mol%, respectively, co-doping with 0.3 mol% Ge and 0.9 mol% GeO₂ makes the highest α value (α = 12.8), the lowest breakdown voltage V_1mA (V_1mA = 15.8 V/mm) and the highest grain boundary barrier Φ_B (Φ_B = 1.48 eV), which is remarkably superior to the TiO₂-V₂O₅-Y₂O₃ varistor ceramics undoped with Ge and GeO₂ and mono-doped with Ge or GeO₂. The TiO₂-V₂O₅-Y₂O₃-Ge-GeO₂ ceramic has the prospect of becoming a novel varistor ceramic with excellent electrical properties.     

SiO2 masking against phosphorus diffusion using a P2O5 source

The masking of silicon against deep P₂O₅ diffusion by a 1-μ thick SiO₂ layer has been investigated. One aspect of masking failure has been related to mounds of phosphorus silicate glass, grown on the oxide during the P₂O₅ deposition, causing spot penetration of phosphorus through the oxide and into the silicon. Such spots can increase in density, diameter and depth during the subsequent diffusion. They link up and form a continuous, but not uniform n-type layer under the oxide. Residual water vapour in the deposition systems and particle deposits on wafers during washing have been shown to be the factors that contribute to the growth of mounds.     

Wavelength multiplexer based onSiO2-Ta2O5 arrayed-waveguide grating

The characteristics of a wavelength multiplexer based on an arrayed-waveguide grating are carefully investigated by using the grating theory and related experiments. A 28-channel multiplexer is designed and fabricated as SiO₂-Ta₂O₅ waveguides on a 1 cm×2 cm substrate. The designed wavelength channel spacing of 1 nm is obtained. The crosstalk to an adjacent channel is -15 dB. The measured minimum loss is 4.2 dB, which is composed of 3.4 dB excess loss and 0.8 dB grating loss