Adaptive-edge search for power plant start-up scheduling

Power plant start-up scheduling is aimed at minimizing the start-up time while limiting maximum turbine-rotor stresses. A shorter start-up time not only reduces fuel and electricity consumption during the start-up process, but also increases its capability of adapting to changes in electricity demand. The start-up scheduling problem can be formulated as a function optimization problem with constraints. We have constructed an efficient and robust search model-a genetic algorithm (GA) with an enforcement operation-which forces the search along the edge of the feasible space, where the optimal schedule is supposed to exist. However, this model has to perform a prior Monte Carlo test to obtain the enforcement gains used for the implementation of the enforcement operation. In this paper, we attempt to eliminate the Monte Carlo test by proposing a self-reliant search model by introducing a GA with an adaptive enforcement operation that can generate and adapt enforcement gains during the search process. The test results of this proposed model show that the overall number of time-consuming dynamic simulations for the constraints calculation can be reduced further, thus increasing the overall efficiency of finding the optimal or near-optimal schedules     

Design of reconfigurable access wrappers for embedded core based SoC test

Testing of embedded core based system-on-chip (SoC) ICs is a well known problem, and the upcoming IEEE P1500 Standard on Embedded Core Test (SECT) standard proposes DFT solutions to alleviate it. One of the proposals is to provide every core in the SoC with test access wrappers. Previous approaches to the problem of wrapper design have proposed static core wrappers, which are designed for a fixed test access mechanism (TAM) width. We present the first report of a design of reconfigurable core wrappers which allow for a dynamic change in the width of the TAM executing the core test. Analysis of the corresponding scheduling problem indicates that good approximate schedules can be achieved without significant computational effort. Specifically, we derive a O(N/sub C//sup 2/B) time algorithm which can compute near optimal SoC test schedules, where N/sub C/ is the number of cores and B is the number of top level TAMs. Experimental results on benchmark SoCs are presented which improve upon integer programming based methods, not only in the quality of the schedule, but also significantly reduce the computation time.     

System-on-chip test scheduling with reconfigurable core wrappers

The problem with increasing test application time for testing core-based system-on-chip (SOC) designs is addressed with test architecture design and test scheduling. The scan-chains at each core are configured into a set of wrapper-chains, which by a core wrapper are connected to the test access mechanism (TAM), and the tests are scheduled in such a way that the test time is minimized. In this paper, we make use of reconfigurable core wrappers that, in contrast to standard wrappers, can dynamically change (reconfigure) the number of wrapper-chains during test application. We show that by using reconfigurable wrappers the test scheduling problem is equivalent to independent job scheduling on identical machines, and we make use of an existing preemptive scheduling algorithm that produces an optimal solution in linear time (O(n); n is the number of tests). We also show that the problem can be solved without preemption, and we extend the algorithm to handle: 1) test conflicts due to interconnection tests and 2) cases when the test time of a core limits an optimal usage of the TAM. The overhead in logic is given by the number of configurations, and we show that the upper-bound is three configurations per core. We compare the proposed approach with the existing technique and show, in comparison, that our technique is 2% less from lower bound.     

Metaheuristic scheduling of 300-mm lots containing multiple orders

The standard unit of transfer in new semiconductor wafer fabrication facilities is the front opening unified pod (FOUP). Due to automated material handling system concerns, the number of FOUPs in a wafer fab is kept limited. Moreover, a certain number of new and larger 300-mm wafers will be placed in these FOUPs and this makes grouping orders from multiple customers into a job a necessity. Thereby, efficient utilization of the FOUP capacity while attaining good system performance is a challenge. We previously investigated optimization-based solution approaches for minimizing total weighted completion time and maximizing on-time delivery performance for the single machine multiple orders per job scheduling problem. We present two metaheuristic solution approaches for this scheduling problem under two different typical wafer fab machine environments: single unit processing and single lot processing. Experimental results demonstrate that the metaheuristic approaches can find near-optimal solutions for realistic-sized 300-mm scheduling problems in an acceptable amount of computation time.     

Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving

High temperature has become a major problem for system-on-chip testing. In order to reduce the test application time while keeping the temperatures of the cores under test within safe ranges, a thermal-aware test scheduling technique is required. This paper presents an approach to minimize the test application time and, at the same time, prevent the temperatures of cores under test going beyond given limits. We employ test set partitioning to divide test sets into shorter test sequences, and add cooling periods between test sequences so that overheating can be avoided. Moreover, test sequences from different test sets are interleaved, such that the cooling periods and the bandwidth of the test bus can be utilized for test data transportation, and hence the test application time can be reduced. The test scheduling problem is formulated as a combinatorial optimization problem, and we use the constraint logic programming (CLP) to build the optimization model and find the optimal solution. As the optimization time of the CLP-based approach increases exponentially with the problem size, we also propose a heuristic which generates longer test schedules but requires substantially shorter optimization time. Experimental results have shown the efficiency of the proposed approach.     

Multiple-Constraint Driven System-on-Chip Test Time Optimization

The cost of testing SOCs (systems-on-chip) is highly related to the test application time. The problem is that the test application time increases as the technology makes it possible to design highly complex chips. These complex chips include a high number of fault sites, which need a high test data volume for testing, and the high test data volume leads to long test application times. For modular core-based SOCs where each module has its distinct tests, concurrent application of the tests can reduce the test application time dramatically, as compared to sequential application. However, when concurrent testing is used, resource conflicts and constraints must be considered. In this paper, we propose a test scheduling technique with the objective to minimize the test application time while considering multiple conflicts. The conflicts we are considering are due to cross-core testing (testing of interconnections between cores), module testing with multiple test sets, hierarchical conflicts in SOCs where cores are embedded in cores, the sharing of the TAM (test access mechanism), test power limitations, and precedence conflicts where the order in which tests are applied is important. These conflicts must be considered in order to design a test schedule that can be used in practice. In particular, the limitation on the test power consumption is important to consider since exceeding the system's power limit might damage the system. We have implemented a technique to integrate the wrapper design algorithm with the test scheduling algorithm, while taking into account all the above constraints. Extensive experiments on the ITC'02 benchmarks show that even though we consider a high number of constraints, our technique produces results that are in the range of results produced be techniques where the constraints are not taken into account.     

A problem reduction approach for scheduling semiconductor wafer fabrication facilities

Most scheduling procedures used in industry are based on the dispatching paradigm, where decisions are made based on the jobs available at the time the machine becomes free. While optimization-based scheduling procedures have repeatedly been shown to yield significantly better schedules under ideal circumstances, their practical implementation is hampered by high computational requirements. We present a problem reduction procedure that allows a workcenter-based global scheduling heuristic to be implemented in very low CPU times. The procedure partitions the workcenters in a fab into heavily loaded and lightly loaded classes and solves the global scheduling problem only for the heavily loaded workcenters. The proposed technique is tested on instances drawn from an International SEMATECH wafer fab model. The proposed problem reduction approach yields superior results with modest computational effort, enabling the practical use of the decomposition heuristic.     

Nonpreemptive Scheduling of Optical Switches

Many high-speed routers today use input-queuing (IQ) architectures with a crossbar switching fabric based on optical technology. Packets in the input queues are divided into cells of unit length, and the goal is to find a schedule of minimum makespan that forwards all packets to the output ports. The problem is complicated since, in optical switches, so-called configuration delay, that is the time required to reconfigure the switching fabric, is non-negligible with respect to the cell transmission time. We aim to design a scheduler whose complexity does not depend on the number of packets in the input queues. Thus, we focus on the nonpreemptive bipartite scheduling (NPBS) problem, where each input queue is connected to each output port in at most one configuration. We demonstrate that the NPBS problem is NP-hard for any value of the configuration delay, and approximation within a ratio smaller than 7/6 is NP-hard as well. For the offline version of the NPBS problem, we show that a simple greedy algorithm achieves an approximation factor of 2 for arbitrary configuration delay. Then, we consider the online version of the NPBS problem, where the switch gathers the incoming traffic periodically and then schedules the accumulated batches. We propose a scheduling algorithm that guarantees strict delay for any admissible traffic, provided that the switch has a moderate speed-up of two. Finally, we extend our results to the nonbipartite scheduling problem.     

Dynamic scheduling and analysis of real time systems with multiprocessors

This research work considers a scenario of cloud computing job-shop scheduling problems. We consider m realtime jobs with various lengths and n machines with different computational speeds and costs. Each job has a deadline to be met, and the profit of processing a packet of a job differs from other jobs. Moreover, considered deadlines are either hard or soft and a penalty is applied if a deadline is missed where the penalty is considered as an exponential function of time. The scheduling problem has been formulated as a mixed integer non-linear programming problem whose objective is to maximize net-profit. The formulated problem is computationally hard and not solvable in deterministic polynomial time. This research work proposes an algorithm named the Tube-tap algorithm as a solution to this scheduling optimization problem. Extensive simulation shows that the proposed algorithm outperforms existing solutions in terms of maximizing net-profit and preserving deadlines.     

Unification of scheduling, binding, and retiming to reduce power consumption under timings and resources constraints

Scheduling and binding are two tasks found in high-level synthesis of hardware as well as in compiling software. These tasks are realized on graphs that are models of the hardware or of the software to be compiled to run on a specific processor. Scheduling focuses on determining the start execution time of each node in the graph. Binding is the task of assigning each node in the graph to a specific computational element. Realize binding before or after scheduling can exclude generating high-quality designs (hardware or binary code). The latter statement is true in particular in the era of design for low power. Do not combine scheduling and binding can lead to designs with high switching activities and hence to high power consumption. To the best of our knowledge, there is no approach at this moment that addresses the problem of unifying scheduling and binding with an exact algorithm to produce designs with reduced power consumption. Known approaches to that problem are heuristics. That problem is NP-hard in general, since it is the composition of two NP-hard problems. Also, it has not yet been formulated in the literature. The problem becomes more complex when one has to deal with cyclic graphs and/or there are constraints to be met such as timings. For cyclic graphs, one has to integrate retiming in the unification of scheduling and binding. We propose a mathematical formulation to that problem. We extend this formulation to solve the problem of combining modulo scheduling, binding, and retiming under timings and resources constraints while reducing power consumption due to switching activities. The proposed approach is tested using known benchmarks. Based on obtained numerical results, this approach is able to reduce power consumption by 33.24% on average, with an average of 33.83 s as a run time.     

Multicriteria decision‐making techniques for avoiding similar task scheduling conflict in cloud computing

An efficient task scheduling approach shows promising way to achieve better resource utilization in cloud computing. Various task scheduling approaches with optimization and decision‐making techniques have been discussed up to now. These approaches ignored scheduling conflict among the similar tasks. The conflict often leads to miss the deadlines of the tasks. The work studies the implementation of the MCDM (multicriteria decision‐making) techniques in backfilling algorithm to execute deadline‐based tasks in cloud computing. In general, the tasks are selected as backfill tasks, whose role is to provide ideal resources to other tasks in the backfilling approach. The selection of the backfill task is challenging one, when there are similar tasks. It creates conflict in the scheduling. In cloud computing, the deadline‐based tasks have multiple parameters such as arrival time, number of VMs (virtual machines), start time, duration of execution, and deadline. In this work, we present the deadline‐based task scheduling algorithm as an MCDM problem and discuss the MCDM techniques: AHP (Analytical Hierarchy Process), VIKOR (VIseKriterijumska Optimizacija I Kompromisno Resenje), and TOPSIS (Technique for Order Preference by Similarity to Ideal Solution) to avoid similar task scheduling conflicts. We simulate the backfilling algorithm along with three MCDM mechanisms to avoid scheduling conflicts among the similar tasks. The synthetic workloads are considered to study the performance of the proposed scheduling algorithm. The mechanism suggests an efficient VM allocation and its utilization for deadline‐based tasks in the cloud environment.     

Incremental scheduling algorithms for WDM/TDM networks with arbitrary tuning latencies

We focus on all-optical broadcast and select slotted WDM networks. Each network user is equipped with one tunable transmitter and one fixed receiver; full connectivity is achieved by tuning transmitters to all different wavelengths available in the optical spectrum. Tuning latencies are considered to be not negligible with respect to the slot time. A network controller allocates fixed size slots in a TDM/WDM frame according to requests issued by users via signalling procedures. User requests are accommodated in the frame incrementally, as soon as they are received by the network controller. Since we aim at an incremental solution, we impose a transparency constraint in the scheduling algorithm: new user requests may be accepted only without affecting existing allocations, otherwise they are refused. We propose a novel scheduling algorithm that may route some flows from source to destination through some intermediate nodes, following a multi-hop approach. A formal definition of an optimal transparent incremental scheduling algorithm is provided as an integer linear programming problem. The optimal incremental scheduling algorithm is NP-hard. Thus, a heuristic quasi-optimal scheduling algorithm is proposed, and its complexity is evaluated. Performance results show that significant benefits can be achieved with respect to traditional single-hop approaches and to other multi-hop approaches.     

Scheduling tests for VLSI systems under power constraints

This paper considers the problem of testing VLSI integrated circuits in minimum time without exceeding their power ratings during test. We use a resource graph formulation for the test problem. The solution requires finding a power-constrained schedule of tests. Two formulations of this problem are given as follows: (1) scheduling equal length tests with power constraints and (2) scheduling unequal length tests with power constraints. Optimum solutions are obtained for both formulations. Algorithms consist of four basic steps. First, a test compatibility graph is constructed from the resource graph. Second, the test compatibility graph is used to identify a complete set of time compatible tests with power dissipation information associated with each test. Third, from the set of compatible tests, lists of power compatible tests are extracted. Finally, a minimum cover table approach is used to find an optimum schedule of power compatible tests     

A Novel Reconfigurable Wrapper for Testing of Embedded Core-Based SOCs and its Associated Scheduling Algorithm

In this paper a mathematical formulation and an efficient solution, of the embedded core-based system-on-chip (SOC) test scheduling problem (ECTSP) is presented. The ECTSP can be stated as follows; given a chip with N _C cores each having a test T _i; where T _i takes time to execute on a test access mechanism (TAM) of width w _j, and a constraint W on the number of top-level test pins; calculate the TAM assignment vector and the schedule for each test T _i, such that the completion time of the full chip test is minimized. All existing approaches have solved the ECTSP by solving the TAM partition and scheduling problem sequentially. In this paper we present an unified approach to solve the ECTSP. We present the first report of a design of reconfigurable core wrapper which allows for a dynamic change in the width of the test access mechanism (TAM) executing a core test. An automatic procedure for the creation of DfT hardware required for reconfiguration using a graph theoretic representation of core wrappers is also presented. For the case of reconfigurable wrappers, efficient algorithms to compute the schedule are presented based upon some recent results in the field of malleable task scheduling. Cases in which the degree of reconfigurability are constrained are considered; the case when only a single core can have reconfigurable wrapper, a schedule with zero TAM idle time can be found in time O(N _C(N _C + W)lgW), and the case when only 2 different wrapper configurations are allowed can be solved in time O(N _C ³). Comparison with existing results on benchmark SOCs show that our algorithms outperform state-of-art ILP formulations not only in schedule makespan, but also significantly reduce computation time.     

Task scheduling mechanisms in cloud computing: A systematic review

Today, cloud computing has developed as one of the important emergent technologies in communication and Internet. It offers on demand, pay per use access to infrastructure, platforms, and applications. Due to the increase in its popularity, the huge number of requests need to be handled in an efficient manner. Task scheduling as one of the challenges in the cloud computing supports the requests for assigning a particular resource so as to perform effectively. In the resource management, task scheduling is performed where there is the dependency between tasks. Many approaches and case studies have been developed for the scheduling of these tasks. Up to now, a systematic literature review (SLR) has not been presented to discover and evaluate the task scheduling approaches in the cloud computing environment. To overcome, this paper presents an SLR‐based analysis on the task scheduling approaches that classify into (a) single cloud environments that evaluate cost‐aware, energy‐aware, multi‐objective, and QoS‐aware approaches in task scheduling; (b) multicloud environment that evaluates cost‐aware, multi‐objective, and QoS‐aware task scheduling; and (c) mobile cloud environment that is energy‐aware and QoS‐aware task scheduling. The analytical discussions are provided to show the advantages and limitations of the existing approaches.     

New metrics and scheduling rules for disassembly and bulk recycling

In recent years, growing quantities of end-of-life electronics have increased the amount of attention devoted to product recovery. Research on end-of-life electronics returns has primarily focused on manual disassembly operations. In this paper, we focus on the scheduling problem for a facility with staging, manual disassembly operations, and bulk recycling. In bulk recycling, shredding or grinding reduces the size of the material fragments while magnetic, eddy current or other density separation techniques separate the material fragments. Unlike production, there are often no due dates in materials recovery processing. Recyclers can sell the recovered materials to material commodity buyers at any time. However, recyclers wait to accumulate a shipment of material to reduce transportation costs and meet minimum sales quantities. Another important difference between production and recycling is that manufacturers purchase raw materials while recyclers may be paid to receive products. When due dates do not apply to scheduling products for materials recycling and product receipts generate revenue for recycling services, we propose two new metrics: the staging space turnover and the shipment fill time. We use our metrics to analyze new scheduling rules for disassembly and bulk recycling and to evaluate their performance. Using discrete-event simulation models, we test our scheduling rules on seven product families, where product families are defined based on material composition and separation operations. Of the rules we test, the disassembly scheduling rule which ranks product families based on the ratio of product size to disassembly time (SDT) most quickly empties the staging space. Shipment fill time is less sensitive to our scheduling rules. Our results illustrate how a recycler can reduce incoming product inventory with a new scheduling rule.     

分布式系统中多用户网络应用的概率型调度算法研究

多用户网络应用是分布式计算中最主要的形式之一。为了充分挖掘分布式系统中的计算资源,任务调度是解决该问题的关键。然而,由于多用户网络应用中存在的不确定性,使得当前的调度方法在动态性、实时性、适应性等方面都存在诸多不足。考虑到用户实时性需求,本文提出了概率型调度的思想。该思想将任务的分配看作概率事件,以用户角度的最短响应时间为目标,给出了多用户网络应用的排队模型,并进一步将调度定义为一个非线性规划问题。分析表明上述方法在任务到达过程、服务率方面存在限制,进而提出了一个基于强化学习理论自适应调度算法。该算法首先利用Markov决策过程（MDP）描述该调度问题,然后对任务到达过程和服务率知识进行在线的学习。一旦获得任务分配概率,遵从该概率可进行快速的任务调度。实验表明上述两个算法相比于Min-Min、Max-Min、Suffrage、ECT四种经典调度算法具有更短的平均响应时间。除此性能外,通过实验分析了该概率型调度方法的稳定性。     

Creating templates to achieve low delay in multi-carrier frame-based wireless data systems

We consider the problem of creating template-based schedules for multi-carrier frame-based wireless data systems. A template consists of an assignment of carriers to users over a fixed set of time slots. This schedule can then be repeated multiple times. Repeated template schedules require no continuous feedback of information (such as channel conditions), thereby relieving the signaling overhead. This setup is suitable for applications such as Wimax where users are typically static. Our aim is to assign carriers to users in such a way that the service per user is as smooth as possible. This in turn ensures that the users experience low delay. A number of elegant template scheduling algorithms exist for the single-carrier case. However, the case of multi-carrier systems where the channel rates can be different on different carriers has received much less attention. We present a general framework for studying the delay performance of a multi-carrier template. We then describe a number of deterministic and randomized scheduling algorithms for template creation and study their delay performance via analysis and simulation. We also show that the delay bounds can sometimes be improved by randomly shifting the schedule on each carrier and by scheduling in a hierarchical manner.     

Greedy Tree Growing Heuristics on Block-Test Scheduling Under Power Constraints

Greedy scheduling algorithms are proposed here to improve the test concurrency under power limits. An extended tree growing technique is used to model the power-constrained test scheduling problem in these algorithms. A constant additive model is employed for power dissipation analysis and estimation. The efficiency of this approach is assessed with test scheduling examples and the experimental results are presented. Known list scheduling approaches are proven to give acceptable power-constrained test scheduling results quickly, but not guaranteed to be optimal.     

Improving communication energy efficiency in wireless networks powered by Renewable energy sources

Energy efficiency is an important issue in wireless networks where the nodes are powered by batteries. In this work, we analyze the energy consumption in one-transmitter-multiple-receiver communication and develop scheduling schemes to improve energy efficiency at the transmitter. Our focus is on systems powered by a renewable energy source such as solar power. We consider an environment where both energy and time to access the wireless channel and transmit data are limited, and data destined for different receivers have different values and incur different energy costs. We present optimal scheduling algorithms that selectively transmit data at calculated rates so that the throughput or the total transmission value is maximized under given time limits and energy constraints.