极端低温下SiGe HBT器件研究进展

系统地介绍了极端低温下SiGe HBT器件的研究进展。在器件级,分析了能带工程对SiGe HBT器件特性的影响,分析了极端低温下器件的直流、交流、噪声特性的变化,以及器件的特殊现象。在电路级,分析了基于SiGe HBT的运算放大器、低噪声放大器和电压基准源电路的低温工作特性。研究结果表明,SiGe HBT器件在低温微电子应用中具有巨大潜力。     

0.8 μm PDSOI CMOS器件和环振电路研究

研究了0.8μm部分耗尽绝缘体上硅(PDSOI)CMOS器件和电路,开发出成套的0.8μmPDSOI CMOS工艺.经过工艺投片,获得了性能良好的器件和电路.其中,当工作电压为5 V时,基于浮体SOI CMOS技术的0.8μm 101级环振单级延时为49.5 ps;基于H型栅体引出SOI CMOS技术的0.8μm 101级环振单级延时为158 ps.同时,对PDSOI CMOS器件的特性,如浮体效应、背栅特性、反常亚阈值斜率、击穿特性和输出电导变化等进行了讨论.     

高性能硅双极器件的发展

以ECL电路为主,讨论了硅双极器件近期的发展。简述了VLSI中ECL电路结构和性能之后,着重讨论双极器件的按比例缩小、结构的改进以及相关的工艺技术的发展,最后分析了双极器件的低温工作性能。     

硅低温双极晶体管的数值模拟

本文讨论了有关低温双极器件模拟物理参数的低温模型和各种低温物理效应,确立了适用于低温双极器件模拟的数值分析方法,建立了适用于77-300K温度范围内硅双极器件模拟程序,最后模拟分析了一典型结构品体管的常温和低温时的工作特性。     

MOSFET亚阈特性分析与低温按比例缩小理论的研究

器件尺寸按比例缩小是实现超大规模集成电路的有效途径，但寄生和二级效应却将器件限在一定的水平，本文在对比分析常温与低温下小尺寸器件效应的基础上，重点研究了ＭＯＳ器件亚阈特性对器件性能及按比例缩小的影响，并根据低温工作的特点，提出了ＭＯＳ器件一种低温按比例缩小规则，该原则对低温器的优化设计，从而更大程度在提高电路与系统性能具有重要的指导意义。     

硅低温双极晶体管的数值模拟

本文讨论了有关低温双极器件模拟物理的数的低温模型和各种低温物理效应，确立了适用于低温双极器件模拟的数值分析方法，建立了适用于７７－３００Ｋ温度范围内硅双极器件模拟程序，最后模拟分析了一典型结构晶体管的常温和低温时的工作特性。     

动态应力下MOS器件热载流子效应研究

研究了 MOS器件中的热载流子效应 ,在分析了静态应力下 MOSFET寿命模型的基础上 ,提出了动态应力条件下 MOSFET的寿命模型。此外 ,还研究了沟道热载流子的产生和注入与器件偏置条件的关系 ,讨论了热载流子效应对电路性能的影响。通过对这些失效因素的研究和通过一定的再设计手段 ,可以减少热载流子效应导致的器件退化     

Kink效应对低温CMOS读出电路的影响

在深低温下(T＜50K),CMOS器件会出现Kink效应,即Ⅰ-Ⅴ特性曲线会发生扭曲.当漏源电压较大时(Vds＞4V),漏电流突然加大,电流曲线偏离正常的平方关系.本文通过实验表明,Kink效应对CMOS读出电路中的一些电路结构产生较严重的影响,Kink效应会导致源跟随器输出产生严重的非线性;对于共源放大器和两级运放,Kink效应会使其增益产生非线性.最后,针对影响低温读出电路性能的Kink效应进行分析和研究,提出在低温CMOS读出集成电路设计中如何解决这些问题的方案.     

0.5μm SOI CMOS器件和电路

研究了0.5μm SOI CMOS器件和电路,开发出成套的0.5μm SOI CMOS工艺.经过工艺投片,获得了性能良好的器件和电路,其中当工作电压为3V时,0.5μm 101级环振单级延迟为42ps.同时,对部分耗尽SOI器件特性,如“浮体”效应、“kink”效应和反常亚阈值特性进行了讨论.     

Kink效应对低温CMOS读出电路的影响

在深低温下(T<50K)，CMOS器件会出现Kink效应，即I-V特性曲线会发生扭曲。当漏源电压较大时(Vds＞4V)，漏电流突然加大，电流曲线偏离正常的平方关系。本文通过实验表明，Kink效应对CMOS读出电路中的一些电路结构产生较严重的影响，Kink效应会导致源跟随器输出产生严重的非线性；对于共源放大器和两级运放，Kink效应会使其增益产生非线性。最后，针对影响低温读出电路性能的Kink效应进行分析和研究，提出在低温CMOS读出集成电路设计中如何解决这些问题的方案。     

低压低功耗智能传感器模拟前端设计进展

介绍了国内外模拟前端低功耗设计的发展现状以及挑战。基于模拟集成电路功耗设计理论,对智能传感器模拟前端进行了分析,重点论述了模拟前端低功耗设计的特点以及系统级、电路级创新性的实现方法,展望了低压低功耗模拟设计技术的发展趋势。     

基于25 nm FinFET结构的SRAM单粒子效应研究

对基于25 nm FinFET结构的SRAM单粒子效应进行研究。使用Synopsys Sentaurus TCAD仿真软件进行器件工艺校准,并对独立3D FinFET器件以及包含FinFET器件和HSpice模型的混合电路(如6管SRAM单元)进行单粒子瞬态仿真。通过改变重粒子入射条件,分析影响瞬态电流峰值、脉宽、漏极翻转阈值等参数的因素。研究发现,混合模型中,FinFET结构器件的漏极翻转阈值为0.023 MeV·cm²/mg,对未来基于FinFET结构的器件及电路结构的加固提出了更高的要求。     

Characterization of Single Barrier Microrefrigerators at Cryogenic Temperatures

The experimental characterization of single barrier heterostructure thermionic cooling devices at cryogenic temperatures is reported. The device studied was a cylindrical InGaAs microrefrigerator, in which the active layer was a 1 μm thick In_0.527Al_0.218Ga_0.255As heterostructure barrier with n-type doping concentration of 6.68 × 10¹⁶ cm⁻³ and an In_0.53Ga_0.47As emitter/collector of 5 × 10¹⁸ cm⁻³ n-doping. A full field thermoreflectance imaging technique was used to measure the distribution of temperature change on the device’s top surface when different current excitation values were applied. By reversing the current direction, we studied the device’s behavior in both cooling and heating regimes. At an ambient temperature of 100 K, a maximum cooling of 0.6 K was measured. This value was approximately one-third of the measured maximum cooling value at room temperature (1.8 K). The paper describes the device’s structure and the first reported thermal imaging at cryogenic temperatures using the thermoreflectance technique.     

GaN技术发展新趋势

氮化镓(GaN)是第三代半导体的典型代表,受到学术界和产业界的广泛关注,正在成为未来超越摩尔定律所依靠的重要技术之一。对于射频(RF)GaN技术,在电信和国防两大主要应用增长行业,尤其是军用领域对先进雷达和通信系统不断增加的需求,推动了RF GaN器件向更高频率、更大功率和更高可靠性发展。文章梳理了在该领域中GaN RF/微波HEMT、毫米波晶体管和单片微波集成电路(MMIC)、GaN器件空间应用可靠性和抗辐射加固等技术发展的脉络。在功率电子方面,对高效、绿色和智能化能源的需求拉动GaN功率电子、电源变换器向快速充电、高效和小型化方向发展。简述了应用于纯电动与混合动力电动汽车(EV/HEV)、工业制造、电信基础设施等场合的GaN功率器件的研发进展和商用情况。在数字计算特别是量子计算前沿,GaN是具有应用前景的技术之一。介绍了GaN计算和低温电子技术研究的几个亮点。总而言之,对GaN技术发展几大领域发展的最新趋势作了概括性描述,勾画出技术发展的粗略线条。     

Mechanical stress effects on electrical breakdown of freestanding GaN thin films

Gallium Nitride (GaN) devices are intended to operate at high temperature and mechanical stress conditions, rendering reliability a major concern. To investigate the effects of temperature and stress on electrical breakdown they were applied individually and simultaneously, on free standing epitaxially grown GaN specimens after release from the growth substrate. Both temperature and mechanical stress were seen to degrade the material by decreasing the breakdown voltage. Up to 60% decrease was observed at around 870 MPa. It is hypothesized that stress-generated defects climb to the free surfaces, creating localized leakage current instability or 'ringing' effects. This study also captures the synergy of temperature and stress, which can be translated to breakdown of buffer layers in GaN devices or in designing harsh environment sensors.     

多层UV-LIGA惯性开关温度可靠性评估研究

为了评估采用UV-LIGA技术制作的多层MEMS惯性开关的温度可靠性,进行了可靠性强化试验。介绍了开关的结构特征、工作原理和制作工艺。建立了试验系统,对开关进行温度循环和振动冲击试验。利用扫描电子显微镜观察开关失效模式,并利用公式进行热应力分析。试验结果表明,开关主要失效模式为位错和分层。开关热应力分析结果表明,种子层为开关薄弱位置。结合可靠性强化实验和热应力分析结果,从结构设计和制作工艺角度提出了可靠性强化方法。该研究为应用于极限温度环境下的多层UV-LIGA惯性器件的设计与制作提供了试验依据。     

熔性/亚熔性激光退火工艺过程数值分析

熔性/亚熔性激光退火在IGBT类电力电子器件制造中有着重要的作用。该工艺涉及瞬间、局部、高强度的能量馈入冲击,材料在升温段涉及固态至亚熔或局部熔化状态的相变,在随后降温段的退火,还有离子注入杂质在此短暂过程中的激活和扩散再分布等复杂的物理过程。为了从机理上比较好地处理和揭示这样的工艺步骤,在大量激光退火实验的基础上,进行了工艺过程的全数值分析。首先,利用瞬态热场分析技术计算出激光作用下的硅材料浅表层中,不同时刻和不同位置处沿硅晶圆深度方向各点的温度-时间变化曲线,之后将菲克第二定律推广到方程式中相关量为时变的情况,利用数值积分计算出最终的杂质再扩散量,并与实验结果相比较验证。该工作初步建立起了熔性/亚熔性激光退火工艺步骤的可量化的物理模型。     

Influence of the lightly doped drain resistance on the worst-case hot-carrier stress condition for NMOS devices

In this paper the underlying mechanisms that produce the cross-over in worst-case hot-carrier stress condition observed at room temperature in some deep submicron lightly doped drain (LDD) NMOS devices and at cryogenic temperatures for devices with longer channel lengths are investigated. Experiments were performed that demonstrate the generality of the cross-over. The role of stress temperature, measurement temperature and stress condition were experimentally addressed. The temperature dependence of the mobility was measured, and an analysis is presented that shows that mobility changes alone do not explain the observed changes in the transconductance. A model is proposed that allows for changes in the source–drain resistance with stress time. It is suggested that the origin of the time-dependent increasing source–drain resistance is the injection of charge, either in the form of fixed charge or as interface states, into the spacer oxide above the LDD region. This model is used to explain the qualitative dependence of the worst-case stress condition on channel length and temperature. Finally, it is suggested that the methodology used to design the LDD structure be modified to account for these new observations.     

Microwave Loss Reduction in Cryogenically Cooled Conductors

Measurements of microwave attenuation at room temperature and 4.2 K have been performed on some conductors commonly used in receiver input circuits. The reduction in loss on cooling is substantial, particularly for copper and plated gold, both of which showed a factor of 3 loss reduction. Copper passivated with benzotriazole shows the same loss as without passivation. The residual resistivity ratio between room temperature and 4.2 K, deduced from the measurements using the classical skin effect formula, was smaller than the measured DC value to a degree consistent with conduction in the extreme anomalous skin effect regime at cryogenic temperatures. The measurements were made in the 5–10 GHz range. The materials tested were: aluminum alloys 1100-T6 and 6061-O, C101 copper, benzotriazole treated C101 copper, and brass plated with electroformed copper, Pur-A-Gold 125-Au soft gold, and BDT200 bright gold.