一种新型CMOS图像传感器的设计

为了提高CMOS图像传感器的图像质量,通过对图像主要的噪声源以及图像失真的分析,提出一种新型的CMOS有源像素图像传感器.该CMOS图像传感器使用4T有源像素,大大提高了图像传感器的灵敏度.通过在传感器中集成图像预处理功能,对改善图像的质量起到了很好的效果.     

低噪声CMOS图像传感器技术研究综述

文章总结了低噪声CMOS图像传感器代表性关键技术的最新研究进展。从CMOS图像传感器架构及各模块设计的角度,介绍了有源像素结构和图像传感器架构,分析了广泛采用的像素内源跟随CMOS图像传感器读出电路及其噪声等效模型,重点介绍了低噪声CMOS图像传感器关键技术,包括共享参考像素差分共源放大器技术、相关多采样技术、像素内斩波技术,以及相关技术的电路级实现方式。     

传感器

采用增强型像素结构的CMOS图像传感器;可用在极恶劣环境下的不锈钢视觉传感器;全集成200万像素CMOS图像传感器.     

一种梯度自适应宽动态CMOS图像传感器像素结构

提出了一种梯度自适应的宽动态CMOS图像传感器像素结构。该像素结构采用多路分流设计,改变了3T-APS图像传感器的单线性响应率;根据不同的光照强度自适应调整响应率,在低照度时具有较大的响应率,在高照度时具有较小的响应率,从而增大了像素的动态范围。该像素结构简单,无需额外复杂的控制电路即可实现对光照强度的自适应梯度响应。基于0.18 μm 1P4M SMIC工艺,采用SILVACO TCAD仿真软件进行电路设计和仿真。结果表明,该CMOS图像传感器像素结构电路的动态范围可达到112.36 dB。     

简化4T像素结构CMOS图像传感器设计与实现

阐述了一种简化4T像素结构的设计。较普通4T像素结构而言,该简化结构像素内部去掉了行选通管,从而提高了像素的填充因子,简化了内部电路设计,减小了版图的面积,消除了行选通管引入的随机噪声。该像素结构采用0.11μm CIS工艺,成功应用于一款像素阵列为640×480的CMOS图像传感器芯片,经过流片测试,芯片整体性能达到了预期的设计目标。     

深亚微米CMOS有源图像传感器技术

在深亚微米CMOS技术，传统CMOS图像传感器像素结构如PD、PG等受到极大挑战，为了获得良好摄像质量，需要一些CMOS生产工艺的改变和像素结构的革新。     

基于4T结构的高灵敏度CMOS图像传感器设计

基于0.35μm工艺,设计了应用于低光照环境下的低噪声、高灵敏度CMOS图像传感器。该图像传感器采用PPD 4T像素结构,像素阵列512×512,包含列级运放、水平移位寄存器、逻辑控制单元、单斜率模数转换器和偏置电路等模块。通过采用低噪声PPD 4T像素结构、低噪声列级放大器电路结构,以及对版图的优化设计等措施实现了低噪声、高灵敏度的CMOS图像传感器设计。     

CMOS图像传感器的硬复位电路研究

像素复位电路是CMOS图像传感器的重要组成部分,其特性直接影响着图像的质量.本文对CMOS APS图像传感器的动态范围、抗饱和能力、图像滞后以及非线性等性能进行了分析,并讨论了通过复位电路改善CMOS图像传感器性能的方法.在本文中,设计了两种带有抗饱和电路的硬复位电路,一种是采用传统的交叉耦合结构实现电压转换,另一种是基于改进的锁存器结构并增加阈值补偿管来实现,两种方案各具特点,分别适用不同的应用要求.仿真结果表明,两种电路方案均能够使动态范围提高2~3dB,增强像素抗饱和能力,同时消除了图像滞后与弱光下的非线性.     

垂直多结PPD像素势阱容量与电荷转移研究

研究了一种具有垂直多结结构的CMOS图像传感器四管像素结构,通过引入垂直多结结构可扩展感光区的势阱容量,增大耗尽区,提高信号电荷收集效率,特别对于长波长光波的吸收大幅增加。并为减小垂直多结结构的图像拖影现象,在N区水平方向上进行梯度掺杂,消除了电位障,使得信号电荷更易向外传输,从而减小图像拖影现象,并通过SILVACO TCAD软件对该结构进行数值仿真。     

CMOS图像传感器的设计考虑

由于CMOS图像传感器的应用,新一代图像系统的开发研制已经得到了极大的加快。这些芯片采用与调制解调器、传真机、便携式移动电话以及微处理器相同的设备制造,并且随着经济规模的形成,其生产成本也得到了降低。现在,CMOS图像传感器的画面质量已能够与CCD图像传感器相媲美了,这主要归功于图像传感器芯片设计的改进,以及亚微米级设计水平增加了像素内部新的功能。实际上CCMOS图像传感器更确切地说应当是一个图像系统。一个典型的CMOS图像传感器通常包含有：一个图像传感器核心（是将离散信号电平多路复用传送到一个单一的输出,…     

An approach to obtain the pinch-off voltage of 4-T pixel in CMOS image sensor

An approach to obtain the pinch-off voltage of 4-T pixel in CMOS image sensor is presented.This new approach is based on the assumption that the photon shot noise in image signal is impacted by a potential well structure change of pixel.Experimental results show the measured pinch-off voltage is consistent with theoretical prediction.This technique provides an experimental method to assist the optimization of pixel design in both the photodiode structure and fabrication process for the 4-T CMOS image sen...     

The effect of size on photodiode pinch-off voltage for small pixel CMOS image sensors

The electron potential of a photodiode in a CMOS image sensor should be designed precisely since the charge capacity of the photodiode decreases as the pixel area shrinks. The pinch-off voltage of a photodiode, which also affects the electron capacity, is dependant on the doping profile of the pn junction as well as the size of the photodiode. The pinch-off voltage is lower in a smaller photodiode. A simple method that uses the lateral depletion of a photodiode for an estimate of the pinch-off voltage in small photodiodes is proposed, and is compared to the measured experimental data. Two constants are used to account for the doping profile and photodiode size. The measurement data shows the error of the estimation of the pinch-off voltage to be <0.05 V.     

Two-dimensional pixel image lag simulation and optimization in a 4-T CMOS image sensor

Pixel image lag in a 4-T CMOS image sensor is analyzed and simulated in a two-dimensional model.Strategies of reducing image lag are discussed from transfer gate channel threshold voltage doping adjustment,PPD N-type doping dose/implant tilt adjustment and transfer gate operation voltage adjustment for signal electron transfer.With the computer analysis tool ISE-TCAD,simulation results show that minimum image lag can be obtained at a pinned photodiode n-type doping dose of 7.0×10~(12) cm~(-2),an implant ...     

CMOS图像传感器钳位光敏二极管夹断电压模型研究

A novel analytical model of pinch-off voltage for CMOS image pixels with a pinned photodiode structure is proposed. The derived model takes account of the gradient doping distributions in the N buried layer due to the impurity compensation formed by manufacturing processes; the impurity distribution characteristics of two boundary PN junctions located in the region for particular spectrum response of a pinned photodiode are quantitative analyzed. By solving Poisson＇s equation in vertical barrier regions, the relationships between the pinch-off voltage and the corresponding process parameters such as peak doping concentration, N type width and doping concentration gradient of the N buried layer are established. Test results have shown that the derived model features the variations of the pinch-off voltage versus the process implant conditions more accurately than the traditional model. The research conclusions in this paper provide theoretical evidence for evaluating the pinch-off voltage design.     

Sensitivity Controllable CMOS Image Sensor Pixel Using Control Gate Overlaid on Photodiode

A new sensitivity controllable pixel structure is proposed for CMOS active-pixel image sensor. The proposed pixel structure has a sensitivity control gate overlaid on the photodiode. The sensitivity of the pixel is controlled by the bias voltage of the control gate that forms a variable accumulation-mode MOS capacitor. The prototype sensor is fabricated with a 0.35-mum CMOS process and consists of 60 times 240 pixels with 5.6-mum pixel pitch. Measurement results show that the sensitivity of the photodiode can be controlled by a factor of 4.     

基于4T像素结构的CMOS图像传感器设计

传统的CMOS图像传感器采用3T像素结构,但由于自身结构的关系,整体性能难以满足较高的要求,4T像素结构应运而生,它比3T像素有更小的噪声,更好的性能;同时要求控制部分更加复杂。文中介绍了基于一种4T像素结构的图像传感器的设计。     

A charge pump for driving CMOS active pixel reset

To overcome the limitation of low image signal swing range and long reset time in four Iransistor CMOS active pixel image sensor, a charge pump circuit is presented to improve the pixel reset performance. The charge pump circuit consists of two stage switch capacitor serial voltage doubler. Cross-coupled MOSFET switch structure with well close and open performance is used in the second stage of the charge pump. The pixel reset transistor with gate voltage driven by output of the pump works in linear region, which can accelerate reset process and complete reset is achieved. The simulation results show that output of the charge pump is enhanced from 1.2 to 4.2 V with voltage ripple lower than 6 inV. The pixel reset time is reduced to 1.14 ns in dark. Image smear due to non-completely reset is elIminated and the image signal swing range is enlarged. The charge pump is successfully embedded in a CMOS image sensor chip with 0.3 × 10^6 pixels.     

Sub-1-V Supply Self-Adaptive CMOS Image Sensor Cell With 86-dB Dynamic Range

This letter presents a high dynamic range CMOS active pixel structure operating at a sub-1-V supply voltage, which is implemented using a standard 0.18-mum CMOS logic process. In order to improve the output voltage swing range and associated pixel dynamic range at a low supply voltage, a pMOS reset structure is incorporated into the pixel structure along with a photogate pixel structure based on the self-adaptive photosensing operation. At a low supply voltage of 0.9 V, the new pixel provides an output voltage swing range of 0.41 V and a high dynamic range of 86 dB, which is the highest among the reported pixel structures up to date operating at sub-1-V     

一种新型大动态范围CMOS图像传感器

提出了一种具有新型像素结构的大动态范围CMOS图像传感器,通过调整单个像素的积分时间来自适应不同的局部光照情况,从而有效提高动态范围。设计了一种低延时、低功耗、结构简单的新型pixel级电压比较器及基于可逆计数器的时间-电压编码电路。采用0.6μm DPDM标准数字CMOS工艺参数对大动态范围像素单元电路进行仿真,积分电容电压Vcint与光电流呈良好的线性关系,其动态范围可达126dB。在3.3V供电电压下,单个像元功耗为2.1μW。