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一种低电压工作的高速开关电流Σ-Δ调制器 总被引:1,自引:0,他引:1
基于作者先前提出的时钟馈通补偿方式的开关电流存储单元及全差分总体结构,本文设计了一种二阶开关电流Σ-Δ调制器.工作中采用TSMC 0.35μm CMOS数字电路工艺平台,在低电压工作下进行电路参数优化.实验表明,调制器在3.3V工作电压、10MHz采样频率、64倍过采样率下实现10-bit精度.与已有类似研究相比,本工作在相当的精度条件下,实现了低电压、视频速率的工作. 相似文献
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介绍了一种适用于语音信号处理的16位24 kHzΣ-Δ调制器。该电路采用单环三阶单比特量化形式,利用Matlab优化调制器系数。电路采用SIMC 0.18μm CMOS工艺实现,通过Cadence/Spectre仿真器进行仿真。仿真结果显示,调制器在128倍过采样率时,带内信噪比达到107 dB,满足设计要求。 相似文献
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设计了一种适用于过高磁场抗扰度的电容式隔离型全差分Σ-Δ调制器。它采用单环2阶1位量化的前馈积分器结构,运用斩波技术降低低频噪声和直流失调。与传统的全差分结构相比,该调制器的每级积分器均采用4个采样电容,在一个时钟周期内能实现两次采样与积分,所需的外部时钟频率仅为传统积分器的一半,降低了运放的压摆率及单位增益带宽的设计要求,实现了低功耗。基于CSMC 0.35 μm CMOS工艺,在5 V电源电压、10 MHz采样频率和256过采样率的条件下进行电路仿真。后仿真结果表明,调制器的SNDR为100.7 dB,THD为-104.9 dB,ENOB可达16.78位,总功耗仅为0.4 mA。 相似文献
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Traditional feedforward structures suffer from performance constraints caused by the complex adder before quantizer.This paper presents an improved 4th-order 1 -bit sigma-delta modulator which has a simple adder and delayed input feedforward to relax timing constraints and implement low-distortion.The modulator was fabricated in a 0.35μm CMOS process,and it achieved 92.8 dB SNDR and 101 dB DR with a signal bandwidth of 100 kHz dissipating 8.6 mW power from a 3.3-V supply.The performance satisfies the requirements of a GSM system. 相似文献
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A fourth-order low-distortion low-pass sigma-delta (∑△) modulator is presented for micro-machined inertial sensors. The proposed single-loop single-bit feedback modulator is optimized with a feed-forward path to decrease the nonlinearities and power consumption. The IC is implemented in a standard 0.6 μm CMOS technology and operates at a sampling frequency of 3.846 MHz. The chip area is 2.12 mm^2 with 23 pads. The experimental results indicate a signal-to-noise ratio (SNR) of 100 dB and dynamic range (DR) of 103 dB at an oversampling rate (OSR) of 128 with the input signal amplitude of-3.88 dBFS at 9.8 kHz; the power consumption is 15 raW at a 5 V supply. 相似文献
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This paper presents a third-order single-loop delta-sigma modulator of a biomedical micro-system for portable electroencephalogram(EEG) monitoring applications.To reduce the power consumption,the loop filter of the proposed modulator is implemented by applying a switched-capacitor structure.The modulator is designed in a 0.35-μm 2P4M standard CMOS process,with an active area of 365×290μm~2.Experimental results show that this modulator achieves a 68 dB dynamic range with an input sinusoidal signal of 100 ... 相似文献
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介绍了一个200kHz信号带宽、用于低中频结构GSM射频接收机的高精度ΣΔ调制器. 为了达到高线性和稳定性,调制器采用2-1级联单比特的结构实现. 电路在0.18μm CMOS工艺下流片验证,核心面积为0.5mm×1.1mm. 调制器工作在19.2MHz的采样频率,在3V电源电压下功耗为5.88mW. 测试结果表明,在200kHz信号带宽,过采样率为64的条件下,调制器达到84.4dB动态范围,峰值SNDR达到73.8dB,峰值SNR达到80dB. 相似文献
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P. Cusinato F. Pasolini F. Stefani A. Baschirotto 《Analog Integrated Circuits and Signal Processing》2003,36(1-2):7-19
Stability and saturation recovery are a key concern in High-order Switched Capacitor (SC) modulators, since they are conditionally stable architectures.A novel digital technique, which allows to detect instability in the digital domain, a fast recover of high-order modulators from instability and guarantees a minimum of Signal-to-Noise Ratio (SNR) also when the architecture gets unstable, is proposed. This technique operates in two steps: first, the instability is detected in the digital domain and the system is recovered to a proper operation and then a digital post-processing is performed in order to achieve a residual SNR also in the instability condition.This strategy has been applied to a 6th-order SC bandpass modulator operating at 42.8 MHz and featuring 74 dB Dynamic Range (DR) in a 200 kHz bandwidth. The benchmark modulator has been integrated in a standard double-poly 0.35 m 3.3 V CMOS technology with five metal layers. 相似文献
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Ana Rusu Alexei Borodenkov Mohammed Ismail Hannu Tenhunen 《Analog Integrated Circuits and Signal Processing》2006,47(2):113-124
A 1.8 V sigma-delta modulator with a 4 bit quantizer has been designed for GSM/WCDMA/WLAN receivers in a 0.18 um CMOS process.
The modulator makes use of low-distortion sigma-delta modulator architecture and Pseudo-Data-Weighted-Averaging technique
to attain high linearity over a wide bandwidth. Power dissipation is minimized by optimizing the architecture and by a careful
design of analog circuitry. In GSM mode, the modulator achieves 96/104 dB peak SNR/SFDR over 100 kHz bandwidth and dissipates
18 mW at a sampling frequency of 32 MHz. The modulator achieves 92/68 dB peak SFDR and 77/54 dB peak SNR over a 2 MHz/10 MHz
bandwidth and dissipates 23/39 mW at a sampling frequency of 64 MHz/160 MHz in WCDMA/WLAN.
Ana Rusu received degrees of diploma engineer in electronics and telecommunications engineering from Technical University of Iasi,
Romania, in 1983 and Ph.D. in electronics engineering from Technical University of Cluj-Napoca, Romania, in 1998. During 1983–1986
she was with Research Institute for Electronics Iasi, as researcher engineer. From 1986 to 1988 she was with Territorial Computer
Centre, Piatra-Neamt, Romania, as a programmer in software engineering. Since 1988 she has been with the Technical University
of Cluj-Napoca, Electronics and Telecommunications Faculty. In 1999 she was appointed as an associate professor. She has been
in visiting researcher positions in University of Bradford, England, and Institute National Politechnique of Grenoble, France,
in 1997 and 2001, respectively. Since September 2001, she has been with the Royal Institute of Technology (KTH), Stockholm,
Sweden, where she is a senior researcher in radio and mixed-signal systems group. Her research interests include data conversion
techniques for wireless communications and the design of low-voltage low-power analog and mixed-signal ICs. Ana Rusu has authored
or coauthored five books (published in Romanian language) and more than 40 papers in international conference proceedings
and journals.
Alexey Borodenkov received his B.Sc. degree in computer science and engineering from St. Petersburg Electrotechnical University, Russia in
2002 and M.Sc. degree in electrical engineering from Royal Institute of Technology (KTH), Stockholm, Sweden in 2004. In October
2004 he joined Samsung Electronics Co. Ltd., Gyeunggi-Do, Korea, where he is involved in the design of multi-standard transceivers
for wireless communications. His current research interests include integrated-circuit development of frequency synthesizers
and data converters.
Mohammed Ismail received the B.S. and M.S. degrees in electronics and telecommunications engineering from Cairo University, Egypt, in 1974
and 1978 and the Ph.D. in electrical engineering from the University of Manitoba, Canada, in 1983. He is a Professor with
the Department of Electrical Engineering, The Ohio State University, Columbus. Since April 2003, he is also a Professor with
the Department of Microelectronics and Information Technology, Royal Institute of Technology (KTH) Stockholm, Sweden. He has
over 20 years experience of R&D in the fields of analog, RF and mixed signal integrated circuits. He has held several positions
in both industry and academia and has served as a corporate consultant to nearly 30 companies in the US, Europe and the Far
East. His current interest lies in research involving digitally programmable/configurable fully integrated radios with focus
on low voltage/low power first-pass solutions for 3G and 4G wireless handhelds. He publishes intensively in this area and
has been awarded 11 patents. He has co edited and coauthored several books. He co-founded ANACAD-Egypt (now part of Mentor
Graphics, Inc.) and Spirea AB, Stockholm (now Firstpass Semiconductors AB), a developer of CMOS radio and mixed signal IPs
for handheld wireless applications. Dr. Ismail has been the recipient of several awards including the US National Science
Foundation Presidential Young Investigator Award, the US Semiconductor Research Corp Inventor Recognition Awards in 1992 and
1993, and a Fulbright/Nokia fellowship Award in 1995. He is the founder of the International Journal of Analog Integrated
Circuits and Signal Processing, Springer and serves as the Journal's Editor-In-Chief. He has served as Associate Editor for
many IEEE Transactions, was on the Board of Governors of the IEEE Circuits and Systems Society and is the Founding Editor
of “The Chip” a Column in The IEEE Circuits and Devices Magazine. He is a Fellow of IEEE.
Hannu Tenhunen received degrees of diploma engineer in electrical engineering and computer sciences from Helsinki University of Tehnology,
Helsinki, Finland, in 1982 and Ph.D. in Microelectronics from Cornell University, Ithaca, NY, U.S.A., in 1986. During 1978–1982
he was with Electron Physics Laboratory, Helsinki University of Technology, and from 1983 to 1985 at Cornell University as
a Fullbright scholar. From September 1985 he has been with Tampere University of Technology, Signal Processing Laboratory,
Tampere, Finland, as an associate professor. He was also a coordinator of National Microelectronics Program of Finland during
1987–1991. Since January 1992, he has been with Royal Institute of Technology (KTH) Stockholm, Sweden, where he is a professor
of electronic system design. His current research interests are VLSI circuits and systems for wireless and broadband communication,
and related design methodologies and prototyping techniques. He has made over 400 presentations and publications on IC technologies
and VLSI systems worldwide, and has over 16 patents pending or granted. 相似文献