Theory of the doped quantum well superlattice APD: A new solid-state photomultiplier

A new superlattice avalanche photodiode structure consisting of repeated unit cells formed from a p-i-n Al0.45Ga0.55As region immediately followed by near intrinsic GaAs and Al0.45Ga0.55As layers is examined using an ensemble Monte Carlo calculation. The effects of various device parameters, such as the high-field layer width, GaAs well width, low-field AlGaAs layer width, and applied electric field on the electron and hole ionization coefficients is analyzed. In addition, the fraction of electrons which ionize in a spatially deterministic way, at the same place in each stage of the device, is determined. As is well known, completely noiseless amplification can be achieved if each electron ionizes in each stage of the device at precisely the same location while no holes ionize anywhere within the device. A comparison is made between the doped quantum well device and other existing superlattice APD's such as the quantum well and staircase APD's. It is seen that the doped quantum well device most nearly approximates photomultiplier-like behavior when applied to the GaAs/AlGaAs material system amongst the three devices. In addition, it is determined that none of the devices, when made from GaAs and AlGaAs, fully mimic ideal photomultiplier-like performance. As the fraction of electron ionizations per stage of the device is increased, through variations in the device geometry and applied electric field, the hole ionization rate invariably increases. It is expected that ideal performance can be more closely achieved in a material system in which the conduction band edge discontinuity is a greater fraction of the band gap energy in the narrow-band gap semiconductor.     

A Monte Carlo investigation of multiplication noise in thin p+-i-n+ GaAs avalanche photodiodes

A Monte Carlo (MC) model has been used to estimate the excess noise factor in thin p⁺-i-n⁺ GaAs avalanche photodiodes (APD's). Multiplication initiated both by pure electron and hole injection is studied for different lengths of multiplication region and for a range of electric fields. In each ease a reduction in excess noise factor is observed as the multiplication length decreases, in good agreement with recent experimental measurements. This low noise behavior results from the higher operating electric field needed in short devices, which causes the probability distribution function for both electron and hole ionization path lengths to change from the conventionally assumed exponential shape and to exhibit a strong dead space effect. In turn this reduces the probability of higher order ionization events and narrows the probability distribution for multiplication. In addition, our simulations suggest that fur a given overall multiplication, electron initiated multiplication in short devices has inherently reduced noise, despite the higher feedback from hole ionization, compared to long devices     

Multiple quantum well PIN optoelectronic devices and a method of restoring failed device characteristics

Multiple quantum well (MQW) optical modulators have a wide range of applications in fiber-optic and remote communication systems. One of the challenges in producing reliable devices is maintaining the necessary PIN electrical characteristics while having large areas of complex MQW structures for optical processing. We report the first direct correlation between crystalline material imperfections and reverse bias behavior in MQW PIN devices. Molecular beam epitaxy grown GaAs/AlGaAs and strained InGaAs/AlGaAs MQW PIN structures are examined. Defects originating in the epitaxial material provide a conducting path along the PIN junction degrading the device performance and lowering the yield. Defectectomy, a method of eliminating the crystalline defects and restoring the device characteristics and improving the yield is described.     

High-performance Mach-Zehnder modulators in multiple quantum wellGaAs/AlGaAs

We demonstrate Mach-Zehnder interferometric waveguide intensity modulators which employ electrorefraction due to the quantum-confined Stark effect in multiple quantum well (MQW) GaAs/AlGaAs. These devices exhibit average half-wave voltage-length products as low as 3.0 V·mm and extinction ratios greater than 23.8 dB, which are superior to any MQW devices of this type. An effective index based model is developed to extract linear and quadratic electro-optic coefficients from the modulation data. Also, the power handling limitations of MQW modulators are discussed in terms of device performance and catastrophic electrical failure     

Compound semiconductors for low-noise microwave MESFET applications

In order to determine the low-noise potential of microwave MESFET's fabricated from materials other than GaAs, a one-dimensional FET model is employed. From material parameters and device geometry the model enables the calculation of a small-signal equivalent circuit from which performance information is acquired. Material parameters, as predicted from Monte Carlo calculations, are used to simulate 1-µm devices fabricated from GaAs as well as InP, Ga0.47In0.53As, InP0.8As0.2, Ga0.27In0.73P0.4As0.6, and Ga0.5In0.5As0.96Sb0.04. Results obtained from simulations comparing a Ga0.5In0.5As0.96- Sb0.04device to an equivalent GaAs device indicate that a decrease in minimum noise figure of almost a factor of two is possible. Considerable improvement in noise performance over a GaAs device is also predicted for devices fabricated from Ga0.47In0.53As and Ga0.27In0.73P0.4As0.6. In addition, the quaternary and ternary devices as well as the InP device should exhibit superior gain and high-frequency performance compared to GaAs devices.     

Optoelectronic Smart Pixels Comprising Flip-Chip-Bonded GaAs/AIGaAs MQW Detectors and Modulators on Silicon CMOS Circuit

Optoelectronic smart pixels with hybrid integration of GaAs/AlGaAs multiple quantum well (MQW) detectors and modulators arrays have beed made,which are flip-chip bonded directly on the top of lμm silicon CMOS circuits,as enables an achievement of Optoelectronic Integrated Circuits (OEIC) as well as does the design and optimization of CMOS circuits and GaAs/AlGaAs MQW devices to proceed independently.     

Optimum design method of optoelectronic devices using simulatedannealing

A design methodology for optimizing optoelectronic functional devices is described. The introduction of cost function for electrical and optical device characteristics enables automatic optimization by simulated annealing. The optimum design of AlGaAs/GaAs pnpn differential optical switches in consideration of light emission efficiency, light sensitivity, and switching voltage is successfully demonstrated     

InGaAs／GaAs多量子阱SEED设计和特性研究

本文分析了计算了InGaAs/GaAs多量子阱（SEED）的激子吸收行为,对器件的多量子阱及谐振腔结构进行了设计和理论分析,用MOCVD系统生长了多量子阱外延材料,并且对器件的反射谱和光电流谱特性进行了测试。     

Design considerations for high performance avalanche photodiodemultiplication layers

We have studied the effect of the thickness of the multiplication region on the noise performance characteristics of avalanche photodiodes (APD's). Our simulation results are based on a full band Monte Carlo model with anisotropic threshold energies for impact ionization. Simulation results suggest that the well known McIntyre expression for the excess noise factor is not directly applicable for devices with a very thin multiplication region. Since the number of ionization events is drastically reduced when the multiplication layer is very thin, the “ionization coefficient” is not a good physical parameter to characterize the process. Instead “effective quantum yield,” which is a measure of the total electron-hole pair generation in the device, is a more appropriate parameter to consider. We also show that for the device structure considered here, modeling the excess noise factor using a “discrete Bernoulli trial” model as opposed to the conventional “continuum theory” produces closer agreement to experimental measurements. Our results reinforce the understanding that impact ionization is a strong function of carrier energy and the use of simplified field-dependent models to characterize this high energy process fails to accurately model this phenomenon     

Graded channel FET's: Improved linearity and noise figure

The characteristics of GaAs field-effect transistors were examined as a function of the channel doping profile in the direction perpendicular to the surface. Theoretical considerations predict that improved device linearity is expected for channel doping profiles with relatively low carrier concentrations near the surface. These predictions are experimentally confirmed by comparison of GaAs FET's fabricated with uniform (flat) and exponentionally varying (graded) carrier concentrations as a function of depth. In addition, the graded devices are observed to exhibit noise figures approximately 1 dB lower than those of uniformly doped devices of the same geometry.     

High-frequency noise in AlGaN/GaN HFETs

We present in this letter the benefits of GaN-based electronic devices for low-noise MMICs. A temperature-dependent two-temperature noise model for AlGaN/GaN HFETs is implemented on a wide range of bias conditions. This study enables to access the device high-frequency noise parameters, and allow a comparison of the noise performances with SiC and GaAs technologies.     

Effect of doping on the reliability of GaAs multiple quantum wellavalanche photodiodes

The effect of various doping methods on the reliability of gallium arsenide/aluminum gallium (GaAs/AlGaAs) multiple quantum well (MQW) photodiode (APD) structures fabricated by molecular beam epitaxy is investigated. Reliability is examined by accelerated life tests by monitoring dark current and breakdown voltage. Median device lifetime and the activation energy of the degradation mechanism are computed for undoped, doped-barrier, and doped-well APD structures. Lifetimes for each device structure are examined via a statistically designed experiment. Analysis of variance (ANOVA) shows that dark current is affected primarily by device diameter, temperature and stressing time, and breakdown voltage depends on the diameter, stressing time, and APD type. It is concluded that the undoped APD has the highest reliability, followed by the doped-well and doped-barrier devices, respectively. To determine the source of the degradation mechanism for each device structure, failure analysis using the electron-beam induced current method is performed. This analysis reveals some degree of device degradation caused by ionic impurities in the passivation layer, and energy-dispersive spectrometry subsequently verifies the presence of ionic sodium as the primary contaminant. However since all device structures are similarly passivated, sodium contamination alone does not account for the observed variation between the differently doped APD's. This effect is explained by dopant migration during stressing, which is verified by free carrier concentration measurements using the capacitance-voltage (C-V) technique     

High performance ion-implanted low noise GaAs MESFET's

Low noise GaAs MESFET's fabricated by ion-implanting into AsCl3VPE buffer layers have demonstrated not only excellent dc and RF performance, but also a highly reproducible process. The average noise figure and associated gain of four device lots at 12 GHz are 1.6 dB and 10.0 dB, respectively. The standard deviation of noise figure and associated gain from device lot to lot are 0.03 dB and 0.19 dB, respectively. And the standard deviation of noise figure and associated gain from device to device for 35 devices over four lots are 0.13 dB and 0.47dB, respectively. The best device performance includes a 1.25 dB noise figure with 10.46 dB associated gain at 12 GHz for a 0.5 µm × 300 µm FET structure. These results demonstrate the excellent performance and process consistency of ion implanted MESFET's.     

Parametric analysis for a millimeter wave low noise high electron mobility transistor

This paper presents parametric analysis for low noise High Electron Mobility Transistor (HEMT) devices suitable for mm-wave radar, satellite communication, and radiometric applications. Preliminary computations reveal that pseudomorphic HEMT devices using InGaAs/GaAs heterojunction structures offer significant improvements in power added efficiency, noise figure, gain, reliability, and input power requirements compared to standard HEMT's. A Pseudomorphic HEMT device is capable of providing a room temperature noise fiqure of 3.5dB and small signal gain of 3dB at 95 GHz, approximately.     

Variability aware SVM macromodel based design centering of analog circuits

Design centering is the term used for a procedure of obtaining enhanced parametric yield of a circuit despite the variations in device and design parameters. The process variability in nanometer regimes manifest into variations in these devices and design parameters. During design space exploration of analog circuits, a methodology to find design-instances with better yield is necessitated; this would ensure that the circuit will function as per specifications after fabrication, even with impact of statistical variations. We need to evaluate circuit performance for a given instance of a circuit-design identified by possessing a set of nominal values of device-design parameters. A lot of instances need be searched, having different sizes for a given circuit topology. HSPICE is very compute intensive. Instead, we employ macromodeling approach for analog circuits based on support vector machine (SVM), which enables efficient evaluation of performance of such circuits of different sizing during yield optimization loops. These performance macromodels are found to be as accurate as SPICE and at the same time, time-efficient for use in sizing of analog circuits with optimal yield. Process variability aware SVM macromodels are first trained and then used inside the Genetic algorithm loops for design centering of different circuits, subsequently resulting into sized-circuit instances having optimal yield. Post design centering, the sized circuits will be able to provide functions as per specifications upon fabrication. The application of this design centering approach as process variability analysis tool is illustrated on various circuits e.g. two stage op amp, voltage controlled oscillator and mixer circuit with layouts drawn into 90?nm UMC technology (Euro-practice).     

Noise in AlGaAs/InGaAs/GaAs pseudomorphic HEMTs from 10 Hz to 18GHz

Noise properties of AlGaAs/InGaAs/GaAs pseudomorphic HEMTs (PHEMTs) have been investigated simultaneously in the low and intermediate frequency range (10 Hz to 150 MHz) and in the microwave range (4 to 18 GHz) and compared to the noise of more classical devices such as MESFETs and GaAlAs/GaAs HEMTs. Unlike the other commercially available devices, PHEMTs exhibit the unique capability of providing simultaneously state-of-the-art microwave noise performance and a reasonable low-frequency excess noise     

Low field mobility, effective saturation velocity and performance of submicron GaAs MESFETs

An analytical model is proposed which relates the transconductance of submicron GaAs MESFETs to a low field mobility, effective electron saturation velocity and device geometry and doping. The model predicts that the effective saturation velocity determines the performance of the devices at relatively high pinch-off voltages (Vpo > 5 V). At smaller pinch-off voltages (especially for enhancement-mode devices) the low field mobility becomes increasingly important, leading to additional advantages of GaAs devices over Si devices. Another prediction is a higher transconductance in thinner and higher-doped devices. This effect is also more important for devices with low pinch-off voltages. The obtained results may be used to deduce the effective values of the electron drift velocity in GaAs MESFETs as a function of the gate length.     

A new TCAD-based statistical methodology for the optimization andsensitivity analysis of semiconductor technologies

A new TCAD-based statistical methodology for the optimization and sensitivity analysis of semiconductor technologies has been developed and demonstrated on a 0.18-μm SOI CMOS process. Two new screening techniques applicable to deterministic systems (Lenth's test and normal probability plots) were introduced and compared with correlation analysis. The graphical nature of the new techniques provided easier analysis of the screening results by clearly displaying which process factors surpass predefined significance limits. A multiresponse steepest ascent analysis was developed to locate regions of improved process performance before beginning response surface experimentation. To perform the analysis, a composite function representing the response criteria was constructed using desirability functions and incorporated within the steepest ascent methodology. Locating the region of improved performance allowed smaller experimental designs to be used for the response study significantly improving model accuracy. The response models were used to optimize the SOI CMOS process and perform sensitivity analyzes on both the baseline and optimized processes. Optimization resulted in a 15% increase in I_dsat without violating any other criteria. The results of the sensitivity analyzes, which showed the greatest benefit from the increased model accuracy, indicated no conspicuous device performance degradation caused by anticipated manufacturing variations     

Multiple quantum-well technology takes SEED

Progress in the development of self-electrooptic-effect devices (SEEDs) is discussed. The devices include the resistor-SEED (R-SEED) device, which can be viewed as a simple NOR gate. The symmetric SEED (S-SEED) and the logic-SEED (L-SEED) devices with improved features, functionality, and performance are also considered. The integration of FETs with multiple quantum well (MQW) modulators (FET-SEED), enables optical interconnections of electronic circuits. Where the SEED technology can be used is discussed, and an experimental optical switching fabric made using these devices is described     

A noise model for high electron mobility transistors

A model to explain the noise properties for AlGaAs/GaAs HEMT's, AlGaAs/InGaAs/GaAs pseudomorphic HEMT's (P-HEMT's) and GaAs/AlGaAs inverted HEMT's (I-HEMT's) is presented. The model Is based on a self-consistent solution of Schrodinger and Poisson's equations. The influence of the drain-source current, frequency and device parameters on the minimum noise figure F_min and minimum noise temperature T_min, for different HEMT structures are presented. The study shows that P-HEMT's have a better noise performance than the normal and inverted HEMT's. The present model predicts that a long gate P-HEMT device will exhibit a better noise performance than a conventional HEMT. There is a range of doped epilayer thickness where minimum noise figure is a minimum for pseudomorphic HEMT's which is not observed in conventional and inverted HEMT's. The calculated noise properties are compared with experimental data and the results show excellent agreement for all devices