Zener and avalanche breakdown in As-implanted low-voltage Si n-p junctions

Implanted-diffused As layers in Si have been well-characterized and have been used in fabricating low-voltage n-p junctions. It is shown that these As layers form linearly graded junctions with a uniform B-doped background (ρ ≃ 0.006 Ω.cm). The grade constant of the As profile at the junction is known sufficiently well as a function of As dose, diffusion time, and temperature to allow quantitative use of existing tunneling and avalanche theories for the calculation of the reverse I-V curves. Following a verification of the calculated I-V curves and their temperature dependence as a function of grade constant, calculated curves are presented which correlate As implant dose and diffusion with junction breakdown voltage, breakdown impedance, and temperature coefficient of reverse voltage. The temperature coefficient is shown to change from negative to positive as the transition from tunneling to avalanche occurs. In addition, the relative importance of tunneling and multiplied-generation current as a function of current density is elucidated for any particular As layer grade constant.     

Tunneling currents in In0.53Ga0.47As homojunction diodes and design of InGaAs/InP hetero-structure avalanche photodiodes

Tunneling currents in InGaAs homojunctions were studied from measurements of temperature dependence of breakdown voltage, current-voltage characteristics, tunneling effective mass, and noise spectrum. Zener emission dominates the reverse current prior to avalanche breakdown in the carrier concentration region of >10¹⁵ cm^?3 and restricts the avalanche gain in InGaAs homojunctions. An InGaAs/InP hetero-structure having a p-n junction in the InP layer was studied to reduce dark currents caused by Zener emission. A design chart to aid in the realization of a high performance APD is discussed.     

Simulating and modeling the breakdown voltage in a semi-insulating GaAs P+N junction diode

This work aims to determine the characteristic PN junction diode, subject to a reverse polarization, while I （breakdown voltage） of the inverse current in a GaAs specifying the parameters that influence the breakdown voltage of the diode. In this work, we simulated the behavior of the ionization phenomenon by impact breakdown by avalanche of the PN junctions, subject to an inverse polarization. We will take into account both the trapping model in a stationary regime in the P＋N structure using like material of basis the Ⅲ-Ⅴ compounds and mainly the GaAs semi-insulating in which the deep centers have in important densities. We are talking about the model of trapping in the space charge region （SCR） and that is the trap density donor and acceptor states. The carrier crossing the space charge region （SCR） of W thickness creates N electron-hole pairs： for every created pair, the electron and the hole are swept quickly by the electric field, each in an opposite direction, which comes back, according to an already accepted reasoning, to the crossing of the space charge region （SCR） by an electron or a hole. So the even N pair created by the initial particle provoke N2 ionizations and so forth. The study of the physical and electrical behaviour of semiconductors is based on the influence of the presence of deep centers on the characteristic I（V） current-tension, which requires the calculation of the electrostatic potential, the electric field, the integral of ionization, the density of the states traps, the diffusion current of minority in the regions （1） and （3）, the current thermal generation in the region （2）, the leakage current in the surface, and the breakdown voltage.     

关于雪崩结开启电压和关断电压差别的研究

本文详细研究了雪崩结导通电压和关断电压的差别。 当结特征尺度在微米量级时,这个差别将不能忽略, 这个结果与现有报道不一致,并且对对器件参数的正确表征有较大影响。 实验发现当结面积变小时, 这个差别将增大。 本文对该现象进行了分析, 给出了理论解释,认为这个现象是由于结导通的阈值增益随着结面积的减小而增加的缘故。在雪崩渐近电流公式中, 所谓的“击穿电压”实际上应该是雪崩结关断电压。 修正了传统的关于雪崩渐近电流和盖革模式雪崩光电二极管的增益公式。     

Dynamic avalanche in diodes with local lifetime control by means of palladium

The increase of the static breakdown voltage and the reduction of dynamic avalanche in a fast recovery 2.5 kV/150 A P-i-N diode subjected to the radiation enhanced diffusion of a palladium are discussed. The in-diffusing palladium compensates the doping profile in a lightly doped N-base close to the anode junction. Using a device simulation, the increase of the breakdown voltage and the reduction of the dynamic avalanche are explained by the reduction of peak electric field in the additional low-doped P-type layer created by the compensation effect. This is presented for both a dc and transient device operation and confirmed experimentally as well. An improved technology curve for the static versus recovery losses at a high line voltage has been obtained. A high thermal budget of deep levels and a low leakage current are additional benefits of the method.     

Pulsed breakdown of 4H-SiC Schottky diodes terminated with a boron-implanted p-n junction

Pulsed reverse current-voltage characteristics have been measured in the breakdown region for 1-kV 4H-SiC Schottky diodes terminated with a boron-implanted p-n junction. It was shown that the dynamic breakdown voltage of the diodes increases as the pulses become shorter. Owing to the homogeneous avalanche formation at the edge of the guard p-n junction and to the high differential resistance in the breakdown region, the diodes sustain without degradation a pulsed reverse voltage substantially exceeding the static breakdown threshold. Characteristic features of the pulsed breakdown are considered in relation to the specific properties of the boron-implanted guard p-n junction.     

The breakdown voltage of double-sided p-n junctions

The avalanche breakdown voltage of an abrupt double-sided junction is a function only of Neff(the doping obtained from capacitance-voltage analysis) in a material in which the ionization rates for electrons and holes are equal or maintain a constant ratio. This doping parameter, together with the published breakdown voltage data for single-sided junctions, immediately gives the breakdown voltage of the more complex structure.     

Practical aspects of the depletion etch method in high-voltage devices

In an earlier paper a new junction-termination geometry was described which was able to give near-ideal avalanche breakdown voltage in both plane and planar p-n junctions. The difficulty of the DEM (depletion etch method) was to achieve a precise etch depth which failure to achieve led to reduced effectiveness. In this paper the range of avalanche breakdown voltage is related to the accuracy of the depletion etch in a quanitative and rather general way so thatDelta V, the decrease in breakdown voltage below the ideal is related toDelta Y, the deviation in etch depth from the ideal, for any p-n junction.     

Single-electron effect in PtSi/porous Si Schottky junctions

PtSi/porous Si schottky junctions exhibit a breakdown type current-voltage (I-V) curve in reverse bias mode. Below breakdown their current density is much less than regular PtSi/Si junctions. The breakdown voltage decreases with application of infrared radiation for both n and p-type junctions. N-type junctions are sensitive to IR wavelengths of up to 7 /spl mu/m even at room temperature. The small reverse bias current, the change of breakdown voltage with radiation, and IR sensitivity at room temperature can all be explained by single-electron effect. Numerical results show that representative porous schottky junctions exhibit depletion capacitances in 10/sup -19/ f range which is enough to observe single-electron effect at room temperature. Single-electron effect and avalanche multiplication can explain existing experimental data.     

Snapback breakdown ESD device based on zener diodes on silicon-on-insulator technology

An Electrostatic Discharge (ESD) device with snapback breakdown property based on two abreast PN junctions with different reverse breakdown voltages is proposed. The proposed device can be implemented with conventional epitaxial silicon substrate with traditional VDMOS process, such that it can be applied to protect the dielectric layer under the gate of the transistor. The ESD protection characteristics of the proposed device can be easily adjusted by controlling the junction formation condition. The performance of the proposed device is validated by experimental measurements, which have shown to be able to withstand >2 kV ESD protection voltage consistently. The layout dependence of the proposed structure is also investigated.     

Avalanche photodiode with sectional InGaAsP/InP charge layer

An InGaAs/InP avalanche photodiode (APD) with a sectional InGaAsP/InP charge layer at the heterointerface between the InGaAs absorption and InP multiplication region has been designed, fabricated and tested. We demonstrate a new APD structure that utilizes the sectional 140 nm thin charge layer and a 500 nm thin multiplication layer. The band diagram, electrical field distribution and current-voltage (I-V) characteristics up to punch-through voltage have been simulated. The fabricated mesa structure photodiode shows responsivity 0.9 A/W at 1310 nm at 20 V and avalanche gain up to 10 near breakdown voltage 36 V. The measured results revealed that the sectional charge layer could be used for control of the electric field profile in the APD structure.     

High-voltage planar p-n junctions

A concentric ring junction has been devised to prevent surface breakdown of a planar junction. By properly choosing the spacing between the main junction and the ring, the ring junction acts like a voltage divider at the surface. In addition, the ring junction minimizes the effect of the junction curvature at the periphery of a planar junction. Devices fabricated with three such rings showed breakdown voltages of 2000 and 3200 volts on n-type silicon with impurity concentrations 6.5 × 10¹³and 2.5 × 10¹³cm^-3, respectively. That the structure operated as proposed was corroborated by comparison of the reverse leakage current with a one parameter fit to a theoretically calculated current obtained from the approximated volume of the space charge regions. These results together with the photo response measurements indicate that the field-limiting ring junction can be used successfully to obtain high-voltage planar p-n junctions.     

Avalanche breakdown characteristics of a diffused P-N junction

A one-dimensional analysis is presented on the avalanche breakdown characteristics of a diffused p-n junction diode. By numerically integrating the carrier ionization rate in a junction space-charge layer, avalanche breakdown voltage is calculated for diffused diodes of silicon and germanium; this voltage is graphically illustrated throughout a range of parameters applicable to most practical situations. In addition, for calculating the maximum cutoff frequency of varactor diodes, junction capacity is similarly illustrated assuming the device is biased to avalanche breakdown. From these illustrations, and from an accompanying nomograph which relates the physical constants of a junction to its impurity atom gradient, the above parameters can be readily established without additional calculations. Further, examples are also presented to demonstrate the reduction of breakdown voltage resulting from a rapid increase of conductivity within the space-charge layer of a diffused p-n junction; this situation approximates many epitaxial and double diffused structures.     

High-gain GaAs avalanche photodiodes with proton-implanted guard ring

A GaAs avalanche photodiode with a multiplication factor as high as 8000 was prepared by Zn diffusion and proton double implantation. The proton-implanted guard ring completely prevented edge breakdown, and multiplication occurred uniformly over the junction area. Dark current was proved to be due to a leakage current at the periphery between junction and implanted layer.     

The anomalous avalanche breakdown

Normally, the breakdown voltage of a p-n junction decreases with increasing doping density. But there are also cases in which the breakdown voltage increases with increasing doping density, e.g., for InSb in the doping range from 10¹³cm^-3to 2 × 10¹⁴cm^-3. The reason for the anomalous behavior is the saturation of the ionization coefficient with increasing electric field strength. The anomalous behavior can only be observed if the tunnel breakdown requires a higher field strength as the one required for saturation of the ionization coefficient. This paper presents a rather simple theory yielding analytical solutions for the normal and anomalous avalanche breakdown. Treated is the influence of the doping profile upon the breakdown voltage in plane junctions and the influence of the radius of curvature for cylindrical one-sided abrupt junctions. The influence of the temperature upon the breakdown voltage and the multiplication factor as function of voltage is calculated for one-sided abrupt plane junctions. Finally, the temperature and doping range for the anomalous avalanche breakdown and the transition region is plotted for the semiconductors InSb, InAs, CdHgTe, PbSnTe, Ge, Si, GaAs, and GaP.     

一种隐埋缓冲掺杂层高压SBD器件新结构

提出了一种新型隐埋缓冲掺杂层(IBBD)高压SBD器件,对其工作特性进行了理论分析和模拟仿真验证。与常规高压SBD相比,该IBBD-SBD在衬底上方引入隐埋缓冲掺杂层,将反向击穿点从常规结构的PN结保护环区域转移到肖特基势垒区域,提升了反向静电释放(ESD)能力和抗反向浪涌能力,提高了器件的可靠性。与现有表面缓冲掺杂层(ISBD)高压SBD相比,该IBBD-SBD重新优化了漂移区的纵向电场分布形状,在保持反向击穿点发生在肖特基势垒区域的前提下,进一步降低反向漏电流、减小正向导通压降,从而降低了器件功耗。仿真结果表明,新器件的击穿电压为118 V。反向偏置电压为60 V时,与ISBD-SBD相比,该IBBD-SBD的漏电流降低了52.2%,正向导通电压更低。     

Increased avalanche breakdown voltage and controlled surface electric fields using a junction termination extension (JTE) technique

Extremely high breakdown voltages with very low leakage current have been achieved in plane and planar p-n junctions by using an ion-implemented junction extension for precise control of the depletion region charge in the junction termination. A theory is presented which shows a greatly improved control of both the peak surface and bulk electric fields in reverse biased p-n junctions. Experimental results show breakdown voltages greater than 95 percent of the ideal breakdown voltage with lower leakage currents than corresponding unimplanted devices. As an example, diodes with a normal breakdown voltage of 1050 V and a 0.5 mA leakage current become 1400 V (1450 ideal) devices with a 5 µA leakage current. Applications of the junction termination technique is feasible in MOS technology, but is more attractive in power devices where reduced surface fields are as important as the extremely high breakdown voltages. Reduced surface fields allow more flexibility in passivation techniques, two of which we have used to date. Our results also show that the implant can be activated at a variety of temperatures with a good degree of success; process flexibility being the goal of these tests.     

Evaluation of voltage dependent series resistance of epitaxial varactor diodes at microwave frequencies

The series resistance of a high-quality varactor diode is primarily determined by the resistance of the semiconductor material close to the junction. With increasing reverse bias, the width of the space-charge region becomes greater, and the series resistance decreases. Theoretical models of graded and step junctions have been assumed, and calculations have been made of the series resistance as a function of bias. Epitaxial silicon diodes have been measured for series resistance as a function of bias by using the transmission loss method at 6 to 12 Gc/s, with the diode mounted across a reduced-height waveguide. The variation of series resistance with bias agrees well with the theoretical calculations. By measuring of the 3-dB bandwidth of the series resonance of the diode mounted in the reduced-height waveguide, the junction capacitance and the effective series inductance of the package also can be determined. Because the width of the space-charge region must vary with applied voltage in order to obtain the varactor characteristic, the diode cannot have zero-series resistance at zero-volt bias. The minimum possible series resistance is a function of the breakdown voltage and increases with increasing breakdown voltage. Calculations of the maximum possible cutoff frequency as a function of the diode breakdown voltage are presented for both graded and step junction silicon varactors. A plot of series resistance vs. reverse bias can be used to determine the impurity concentration profile in the epitaxial film. The impurity concentration profile can also be determined by measuring the capacitance vs. reverse bias, a technique which has been in use for some time. However the former method appears to be more accurate in that it is independent of junction area.     

Avalanche breakdown in multicrystalline solar cells due to preferred phosphorous diffusion at extended defects

Multicrystalline solar cells break down strongly at reverse voltages well below the theoretical limit. Previous explanations were based on assuming a constant depth of the junction below the surface. In this work, preferred phosphorous diffusion at special line defects in grain boundaries is shown to lead to spikes in the p–n junctions even below flat surfaces. The curvature radii of the spherical p–n junction bending are measured by electron beam‐induced current to be in the range of 300–500 nm, leading to the observed type III avalanche breakdown voltages. Copyright © 2012 John Wiley & Sons, Ltd.     

Multiple uniform layer approximation in analysis of negative resistance in p-n junction in breakdown

A simplified analytical method of calculating high-frequency, small signal negative resistance of p-n junctions in breakdown is presented. The negative resistance can lead to microwave oscillations in Impact Avalanche Transit Time (IMPATT) diodes. The method consists in subdividing the entire space charge region into several uniform layers, each of which has constant avalanche multiplication (including zero), and connecting the analytical solutions of the successive layers (multiple uniform layer approximation). The simplest case of the approximation, in which there is only one constant-avalanche region and one or two avalanche-free drift regions, is used to investigate how the small signal characteristics change with width and position of the avalanche region. From the behavior of the small signal negativeQ, it is expected that for low bias currents the oscillator performance improves when the avalanche region becomes relatively shorter, when its position moves from the center to the edge of the space charge region, and when the total space charge layer becomes wider. In materials with larger ionization rates, a negative resistance of a given quality (Q) is obtained at lower breakdown voltage and bias current.