一种基于MO-OTA-C的多功能电流模式滤波器

文中提出了一种由多端输出的运算跨道放大器(M0-OTA)及电容(C)构成的具有单端输入三端输出的多功能电流模式滤波器电路及MO-OTA的CMOS实现电路。该滤波器电路仅由1个三端输出的OTA、3个双端输出的OTA及2个接地电容(C)组成,能实现二阶低通、带通、高通、带阻及全通滤波器,其中二阶低通、带通、高通滤波器能同时实现。整个电路仅由MO-OTA及接地电容构成,而MO-OTA由CMOS器件构成,所以文中电路便于集成且与VLSI工艺兼容。文中还给出了电路的计算机PSPICE仿真结果。     

一种新型通用有源二阶电流模式滤波器的设计

提出了用单个CCⅡ 实现电流模式双二阶滤波器,采用三输入单输出(TISO)结构,滤波器的有源部分用低电源低功耗的CMOS CCⅡ 实现。所得的电流模式二阶滤波器结构简单,能实现出单输出低通、带通、高通电流模式滤波,不仅所有无源和有源灵敏度都很低,而且当无源参数确定后,有源参数α、β对极点频率ω0不产生任何影响,ω0保持恒定。电路的整体功耗不超过80μW。文中给出了MOS管级的CCⅡ 实现电路和相应的PSPICE仿真结果。     

基于MOCCII差分式二阶电流模式滤波器

本文提出了基于MOCCII的差分式二阶多功能电流模式滤波器电路.该电路能同时产生二阶低通、带通、高通输出,并通过适当连接输出端能得到带阻及全通滤波输出.对提出的电路进行了计算机PSPICE仿真.该电路具有对偶次谐波及共模干扰信号具有抑制作用.最后,对MOCCII的非理想特性进行了分析,并提出了其补偿方法.     

采用改进电流传送器的二阶电流滤波器

本文基于ＫＨＮ电路结构，使用第二代改进电流传送器，提出了二阶滤波器的电流模式实现电路。该电路能实现低通、带通、高通、全通、带阻及陷波等种二阶滤波器函数。同时民路具有输入电流滤波器函数。另外该电路也便于集成实现。     

基于MO-CCCDTA的电控调谐电流模式六阶椭圆带通滤波器

提出了一个多输出电流差分跨导放大器(MO-CCCDTA),利用它设计了一个电流模式二阶带通、二阶高通带阻和二阶低通带阻电路,以此为基础,利用级联法设计了电流模式六阶椭圆带通滤波器.该滤波器仅使用3个MO-CCCDTA、1个CDTA和7个电容,通过调节偏置电流,各滤波器参数均能被电控调谐.计算机仿真表明电路正确有效.     

单MDDCC多功能电流模式二阶滤波器的实现

提出一种单MDDCC三输入、单输出多功能电流模式二阶滤波器结构电路。该电路仅由单个DDCC有源器件及5个RC无源元件构成,能产生二阶高通、低通及带通滤波器。电路具有结构简单,灵敏度低,滤波器固有频率ω0和品质因数Q相互独立可调,便于集成。最后对所提出的滤波器进行了HSpice仿真,理论分析和计算机仿真表明电路方案正确有效。     

最少元件的多输入多输出MOCCII电流模式滤波器

本文提出了两种基于MOCCⅡ（多端输出的第二代电流传输器）的多输入多输出的电流模式滤波器。两种电路均由2个MOCCⅡ及4个接地RC元件构成。每一种电路除了实现出单输出的低通、带通、高通、带组、全通电流模式滤波器外，还能实现三种不同类型的具有同时多输出的电流模式滤波器，提出的电路具有很低的无源灵敏度；同时应用基本电流镜技术实现出结构简单的高精度CMOS MOCCⅡ，并对MOCCⅡ及提出的滤流器电路进行了PSICE仿真。     

基于CCⅡ＋／-的三输入单输出电流模式多功能二阶滤波器

提出了一种基于双输出第二代电流传送器的二阶多功能电流模式滤波器,该电路采用三输入单输出的形式,电路结构十分简单,仅有2个有源器件、2个电容和2个阻抗构成;这一结构可以实现高通、带通、低通、全通、带阻滤波器,且电容均接地。此外,所产生的电路具有很低的灵敏度。最后对所引入的第二代多输出电流传输器及提出的滤波器进行了PSpice仿真和理论计算。     

通用电流模式双二次节的实现

文中基于ＫＨＮ电路结构，使用第二代改进电流传送器，提出二阶滤波器的电流模式实现电路，该电路能实现低通，带通，高通，全通，带阻及陷波等各种二阶滤波器函数。同时该电路具有输入阻抗低，输出阻抗高、元件灵敏度低等优点，易于级联实现各种高阶电流滤波器函数，另外该电路也便于集成实现。     

基于单个CCⅡ＋的通用二阶电流模式滤波器

提出了用单CCⅡ＋实现电流模式双二阶滤波器，采用三输入单输出（TISO）结构，滤波器的有源部分用低电源低功耗的CMOSCCⅡ＋实现。所得的电流模式二阶滤波器具有结构简单，能实现单输出低通、带通、高通电流模式滤波，不仅所有无源和有源灵敏度都很低，而且当无源参数确定后，有源参数α， β对极点频率ω0不产生任何影响，ω0保持恒定。电路的整体功耗不超过80μW。     

New universal filter using only current followers as active elements

A new universal current-mode (CM) biquad filter is presented which can realise all the five standard filter functions namely lowpass, bandpass, highpass, notch and allpass employing only unity-gain current followers (CF) as active elements. The workability of the proposed universal biquad, realised with CMOS unity-gain current followers, is established by SPICE simulations. The new circuit provides explicit CM outputs from high output impedance terminals and possesses a number of advantageous features all of which are not available simultaneously in any of the previously reported CF-based universal biquad filters.     

Current mode filters with reduced complexity using a single EX-CCCII

In this paper an active element Extra-X current controlled conveyor (EX-CCCII) is used to reduce the complexity of some existing circuits. Two second-order current-mode biquadratic filter circuits are proposed, each using a single active element and two grounded capacitors. The first circuit is three input single output (TISO) and the second one is single input three outputs (SITO) biquadratic filter. The First circuit can realize all the standard filter transfer functions, while the second circuit can realize LP, BP and HP responses. The study of non-idealities and parasitics of the active element and their effects on transfer functions is carried out. The new circuits are found to be simpler than the earlier ones in terms of number of transistors. The functionality of the proposed biquadratic filters is verified through detailed PSPICE simulations using 0.25 µm TSMC CMOS technology parameters.     

一系列新的基于电流模式的二阶滤波器

本文提出了一种新的基于电流模式的二阶滤波器综合电路，适当选择电路元件，可综合出一系列电流模式二阶低通、高通和带通滤波电路，对其中部分电路进行了理论设计和灵敏度分析，结果表明本文提出的电路灵敏度低、增益可独立调节。计算机仿真结果证实了理论分析的正确性。     

A low power current controllable single-input three-output current-mode filter using MOS transistors only

A novel circuit configuration for the realization of low power single-input three-output (SITO) current mode (CM) filters employing only MOS transistors are presented. The proposed circuit can realize low-pass (LP), band-pass (BP) and high-pass (HP) filter functions simultaneously at three high impedance outputs without changing configuration. Despite the other previously reported works, the proposed circuit is free from resistors and passive capacitors. Instead of passive capacitors; the gate-source capacitor of MOS transistor is used making the proposed circuit ideally suitable for integration. Compared to other works, the proposed filter has also the lowest number of transistors and lowest power consumption. The proposed circuit exhibits low-input and high-output impedances, which is highly desirable for cascading in CM signal processing. Moreover, it is center frequency can be electronically adjusted using a control current without a significant effect on quality factor (Q) granting it the highly desirable capability of electronic tunability. Transfer functions of the LP, BP and HP outputs are derived and the performance of the proposed circuit is proved through pre layout and post layout simulations at supply voltage of 1.8 V and using 0.18 μm CMOS process parameters. The power consumption and the required chip area are only 0.5 mW and 77.4 μm × 70.2 μm, respectively.     

CMOS analogue median circuit

Median filters are very important nonlinear filters, finding many applications in image and speech processing. A novel CMOS analogue median circuit is proposed with a design that employs a combination of current-mode circuits such as a current absolute value circuit and a current minimum circuit     

The effectiveness of a current flattening circuit as countermeasure against DPA attacks

This paper presents an on-chip current flattening circuit designed in 0.18-μm CMOS technology, which can be integrated with secure microsystems, such as smart cards, as a countermeasure against power analysis attacks. The robustness of the proposed countermeasure is evaluated by measuring the number of current traces required for a differential power analysis attack. We analyze the relationship between the required number of current traces and the dynamic current variations, and we show empirically that the required numbers of current traces is proportional to an inverse of the square of the rms value of the flattened current. Finally, we evaluate the effectiveness of the proposed design by using the experimental results of the fabricated chip. The analysis of the experimental results confirms the effectiveness of the current flattening circuit.     

新型差动输入CMOS电流传送器及其应用

基于P阱CMOS工艺提出了一种新的差动输入电流传送器。通过引入误差抑制负反馈电路,有效地减小了信号失真,拓宽了电路线性动态范围。文中还详细分析了电路性能,并由此指导电路的优化。给出的几个典型应用电路表明,与第二代电流传送器（CCII）相比,差动输入电流传送器的通用性更强,可获得较简洁的电路结构。本文最后设计了一个既可作为电流模式又可作为电压模式的MOSFET－C二阶滤波器。PSPICE模拟表明所提出的电路与其它同类电路相比具有更好的电路特性。     

Voltage mode universal filters employing single FDCCII

In this paper, four new voltage-mode universal biquad filters configuration are proposed. First of two circuits proposed high-input impedance universal filter with single-input and three-outputs, which can simultaneously realize voltage mode low-pass, band-pass and high-pass filter responses employing all grounded passive components. The third proposed universal filter three-input and single-output, which also can realize all the standard filter functions. The fourth circuit proposed universal filter with three-input and five-outputs, which can be used as either a three-inputs single-output or a two-inputs five-outputs universal filters. It can realize all five different generic filtering signals: low-pass, band-pass, high-pass, band-stop and all-pass. Simulation results are given to confirm the theoretical analysis. The proposed biquad filters are simulated using TSMC CMOS 0.35 μm technology.     

On the realization of electronically current-tunable CMOS OTA

A CMOS operational transconductance amplifier (OTA) called as an EOTA, where its transconductance gain can be electronically and linearly tuned is proposed in this paper. The realization method is achieved by squaring the transconductance gain of the balanced CMOS OTA. The EOTA transconductance gain can be linearly tuned by an external bias current for three decades. The linear input-voltage range of about 1 Vp with less than 1% nonlinearity is obtained. The usefulness of the proposed EOTA is demonstrated through application example with a current multiplier. The performance of the proposed circuit is discussed and confirmed through PSPICE-simulation results.     

A 200 MHz-to-1.4 GHz fast-locking pulse width control loop

In this article, we propose a wide frequency range low lock time pulse width control loop (PWCL) circuit. The control stage of the PWCL with proposed frequency selection block can increase its output charge/discharge current at high frequency clocks. Therefore, narrow pulses can be generated at the output of this stage, which leads to the enhancement of the frequency range. Lock time of the circuit is also reduced, owing to the use of optimised second-order passive lead–lag loop filters instead of conventional loop filters. A 0.18-µm CMOS technology and 1.8-V supply voltage are used to verify the operation of the circuit. The simulation results show that the acceptable frequency range is from 200 MHz to 1.4 GHz, while maximum lock time of the circuit at this frequency range is about 580 ns. The proposed PWCL consumes 1 mW of power at 1.4 GHz.