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88 nm栅长fmax=201 GHz InP基In0.53Ga0.47As/In0.52Al0.48As HEMT器件 总被引:1,自引:1,他引:0
我们成功研制了栅长88 nm, 栅宽2 50 μm, 源漏间距为2.4 μm 的InP基In0.53Ga0.47As/In0.52Al0.48As高电子迁移率器件(HEMT)。栅是使用PMMA/Al/UVⅢ,通过优化电子束曝光时间及其显影时间的方式制作的。这些器件有比较好的直流及其射频特性:峰值跨导、最大源漏饱和电流密度、开启电压、ft和fmax 分别为765 mS/mm, 591 mA/mm, -0.5 V, 150 GHz 和201 GHz。这些器件将非常适合于毫米波段集成电路。 相似文献
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利用新型的PMMA/PMGI/ZEP520/PMGI四层胶电子束光刻胶研制出一种性能卓越的T型栅,该T型栅栅头宽980纳米,栅脚宽120纳米,有效地减小了栅的寄生电阻和电容效应, 增强了器件的高频特性。利用该T型栅工艺制备出的120nm栅长晶格匹配In0.53Ga0.47As/In0.52Al0.48As InP基HEMT器件获得了优越的直流和高频性能,电流增益截止频率和最大单向功率增益频率分别达到190 GHz 及 146 GHz。文中的材料结构和所有器件制备均为本研究小组自主研究开发。 相似文献
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为了提高太阳电池的转换效果,降低反射光栅的偏振敏感性,开发了一种新的抗反射结构的微细加工技术.首先用X光光刻在PMMA光刻胶上得到相应的亚微米级的线宽图形,再利用显影技术获得了高深宽比的立体亚波长纳米结构,即抗反射结构.设计了适用于可见光波段的二维亚波长抗反射光栅,用X光光刻制作工艺在硅衬底上进行了实验制备.用此纳米加工技术获得了线宽为150 nm、高度约为450 nm(即深宽比为3.O)的PMMA减反射结构.同时还优化了曝光近接间隔、曝光剂量、显影时间等X光光刻参数. 相似文献
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亚微米尺寸金属电极在高电子迁移率晶体管(HEMT)等半导体电子学器件中有重要应用,其制作是器件制作中的关键工艺,对器件性能有着重要影响。本文选择合适的涂胶旋转转速、烘烤温度(180℃)和时间,可以有效地减少电子束曝光后所产生的气泡。通过对聚甲基丙烯酸甲酯/聚二甲基戊二酰亚胺(PMMA/PMGI)双层胶进行电子束曝光和显影,确定了合适的曝光剂量为550 μC/cm2。通过调整显影液配比,并将显影时间控制在合理范围,获得了光滑完整的PMMA/PMGI双层光刻胶曝光图形。开发了双层光刻胶电子束曝光工艺,制备出宽度为200 nm的金属电极。 相似文献
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采用普通接触曝光研制成栅长为0 .2 5 μm的Ga As基In Al As/ In Ga As变组分高电子迁移率晶体管(MHEMT) ,测得其跨导为5 2 2 m S/ m m,沟道电流密度达4 90 m A/ mm,截止频率为75 GHz,比同样工艺条件下Ga As基In Ga P/ In Ga As PHEMT的性能有很大的提高.对该器件工艺及结果进行了分析,提取了器件的交流小信号等效电路模型参数,并提出了进一步得到高稳定性、高性能器件的方法. 相似文献
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利用电子束光刻技术制备出200nm栅长GaAs基InAlAs/InGaAs MHEMT器件.Ti/Pt/Au蒸发作为栅极金属.同时为了减少栅寄生电容和寄生电阻,采用3层胶工艺,实现了T型栅.GaAs基MHEMT 器件获得了优越的直流和高频性能,跨导、饱和漏电流密度、域值电压、电流增益截止频率和最大振荡频率分别达到510mS/mm,605mA/mm,-1.8V,110GHz及72GHz,为进一步研究高性能GaAs基MHEMT器件奠定了基础. 相似文献
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利用电子束光刻技术制备出200nm栅长GaAs基InAIAs/InGaAs MHEMT器件.Ti/Pt/Au蒸发作为栅极金属.同时为了减少栅寄生电容和寄生电阻,采用3层胶工艺,实现了T 型栅. GaAs基MHEMT 器件获得了优越的直流和高频性能,跨导、饱和漏电流密度、域值电压、电流增益截止频率和最大振荡频率分别达到510mS/mm, 605mA/mm, -1.8V, 110GHz及 72GHz,为进一步研究高性能GaAs基MHEMT器件奠定了基础. 相似文献
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Subhalf-micrometre gate length ion-implanted GaAs MESFETs have been fabricated on 3 inch diameter substrates using trilayer deep UV lithography. Implanted MESFETs with 0.3 mu m gate lengths exhibit a maximum extrinsic transconductance of 205 mS/mm at a drain current of 600 mA/mm. From S-parameter measurements, a current gain cutoff frequency f/sub t/ of 56 GHz and a maximum available gain cutoff frequency f/sub max/ greater than 90 GHz are achieved. The gate-to-drain diode characteristics of the devices show a sharp breakdown voltage of 13-15 V. The high drain current-drain voltage and microwave characteristics indicate that ion-implanted technology with trilayer deep UV lithography has potential for the manufacture of power devices and amplifiers for Q-band communication applications. This is the first reported result using trilayer deep UV lithography to demonstrate both f/sub t/ over 56 GHz and 13-15 V gate-to-drain breakdown on 0.3 mu m gate-length ion-implanted GaAs MESFETs.<> 相似文献
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《Electron Device Letters, IEEE》1983,4(9):317-320
This letter describes the fabrication of submicrometer polysilicon-gate MOS devices by an advanced optical process called contrast enhancement. Functional devices having gate lengths as small as 0.4 µm were fabricated with this process. Contrast-enhanced lithography (CEL) allows usable photoresist patterns to be fabricated at smaller dimensions than is possible with conventional resist. The simultaneous replication of mask dimensions for isolated lines at 0.35 µm and above was achieved in this work using a single exposure on an Optimetrix 10:1 DSW system. Contrast enhancement has been applied to the fabrication of n-channel MOS devices having gate lengths from 0.4 to 1.5 µm in steps of 0.1 µm. Long-channel devices were also fabricated. The transconductance of the 0.4-µm devices is 40 mS/mm at Vds = 5 V. Threshold voltages (Vds = 0) are nearly independent of gate length, ranging from 1.21 to 1.31 V over the 7.5- to 0.4-µm range in gate length. The effective mobility for long-channel devices is 430 cm2/V.s. 相似文献
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120 nm gate-length In_(0.7)Ga_(0.3)As/In_(0.52)Al_(0.48) As InP-based high electron mobility transitions(HEMTs) are fabricated by a new T-shaped gate electron beam lithograph(EBL) technology,which is achieved by the use of a PMMA/PMGI/ZEP520/PMGI four-layer photoresistor stack.These devices also demonstrate excellent DC and RF characteristics:the transconductance,maximum saturation drain-to-source current,threshold voltage,maximum current gain frequency,and maximum power-gain cutoff frequency of InGaAs/I... 相似文献
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利用新型的PMMA/PMGI/ZEP520/PMGI四层胶T形栅电子束光刻技术制备出120nm栅长InP基雁配In0.7Ga0.3As/In0.52Al0.48As 高电子迁移率晶体管。制作出的InP基HEMT器件获得了良好的直流和高频性能,跨导、饱和漏电流密度、阈值电压、电流增益截止频率和最大单向功率增益频率分别达到520 mS/mm, 446 mA/mm, -1.0 V, 141 GHz 及 120 GHz。文中的材料结构和所有器件制备均为本研究小组自主研究开发。 相似文献
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借助一新的工艺模拟与异质器件模型用CAD软件──POSES(Poisson-SchroedingerEquationSolver),对以AlGaAs/InGaAs异质结为基础的多种功率PHEMT异质层结构系统(传统、单层与双层平面掺杂)进行了模拟与比较,确定出优化的双平面掺杂AlGaAs/InGaAs功率PHEMT异质结构参数,并结合器件几何结构参数的设定进行器件直流与微波特性的计算,用于指导材料生长与器件制造。采用常规的HEMT工艺进行AlGaAs/InGaAs功率PHEMT的实验研制。对栅长0.8μm、总栅宽1.6mm单胞器件的初步测试结果为:IDss250~450mA/mm;gm0250~320mS/mm;Vp-2.0-2.5V;BVDS5~12V。7GHz下可获得最大1.62W(功率密度1.0W/mm)的功率输出;最大功率附加效率(PAE)达47%。 相似文献
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高性能1mm AlGaN/GaN功率HEMTs研制 总被引:3,自引:4,他引:3
报道了基于蓝宝石衬底的高性能1mm AlGaN/GaN HEMTs功率器件.为了提高微波功率器件性能,采用新的欧姆接触和新型空气桥方案.测试表明,器件电流密度为0.784A/mm,跨导197mS/mm,击穿电压大于40V,截止态漏电较小,1mm栅宽器件的单位截止频率达到20GHz,最大振荡频率为28GHz,功率增益为11dB,功率密度为1.2W/mm,PAE为32%,两端口阻抗特性显示了在微波应用中的良好潜力. 相似文献
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Daniels R.R. Ruden P.P. Shur M. Grider D. Nohava T.E. Arch D.K. 《Electron Device Letters, IEEE》1988,9(7):355-357
Quantum-well p-channel pseudomorphic AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors with enhanced hole mobility are described. The devices exhibit room-temperature transconductance, transconductance parameter, and maximum drain current as high as 113 mS/mm, 305 mS/V/mm, and 94 mA/mm, respectively, in 0.8-μm-gate devices. Transconductance, transconductance parameter, and maximum drain current as high as 175 mS/mm, 800 mS/V/mm, and 180 mA/mm, respectively were obtained in 1-μm p-channel devices at 77 K. From the device data hole field-effect mobilities of 860 cm2/V-s at 300 K and 2815 cm2/V-s at 77 K have been deduced. The gate current causes the transconductance to drop (and even to change sign) at large voltage swings. Further improvement of the device characteristics may be obtained by minimizing the gate current. To this end, a type of device structure called the dipole heterostructure insulated-gate field-effect transistor is proposed 相似文献