铯原子频率标准建标与不确定度评定

在测控、导航、雷达等领域,为保证时间和频率的统一,需要对铷钟及设备内部的高稳晶振进行高精度频率测量。阐述了建立铯原子频率标准装置的系统方案,并依据规程JJG180-2002《电子测量仪器内石英晶体振荡器》及JJF1059-1999《测量不确定度评定与表示》,对建立的铯原子频率标准装置进行不确定度评定,确保了量值溯源的科学性、可靠性。     

基于比时法的晶振频率测量建模与分析

受器件老化、随机噪声等因素影响,晶振频率变化较复杂。以GPS秒脉冲作为测量标准,构建了晶振频率随时间变化的测量系统,通过对测量数据进行一元回归统计处理,分离出了晶振实际频率与其标称频率的相对偏差及晶振的各种随机误差,并分析了这两种误差对晶振准确度及稳定度的影响。该方法可为频率源误差测量分析提供借鉴作用。     

采用射频调制实现对单频激光器频率噪声的抑制

在使用铷原子饱和吸收谱线作为激光频率参考进行稳频的激光稳频系统中,环路带宽是影响激光输出频率噪声的重要因素之一。对激光稳频系统中限制环路带宽的主要因素进行分析,使用射频调制信号直接调制商用外腔半导体激光器的高速电流调制端来对激光稳频系统的环路带宽进行拓展。根据对稳频环路的分析,合理设置反馈电路,实现激光稳频。使用低频谱分析仪对稳频后的鉴频信号进行分析,发现带宽拓展后,在傅里叶频率为5kHz处对频率噪声的抑制度达到了20dB以上。通过将该稳频激光器输出的激光与锁定在极稳恒温晶振上的飞秒光学频率梳进行拍频,测量了该稳频激光相对光梳的频率噪声,测量结果与直接分析鉴频信号的结果吻合。经过测量,通过拓展带宽抑制频率噪声,稳频激光器的短期频率稳定度得到改善。最后,测量了稳频激光相对于锁定在恒温晶振上的飞秒光学频率梳的频率稳定度,Allan方差在平均时间1s时达到4.52×10~(-12),在平均时间20s时达到1.65×10~(-12)。     

铷原子频率标准装置频率校准结果的不确定度评定

该文重点讲述了铷原子频率标准装置频率测量结果不确定度的评定,并对此标准装置的不确定度进行分析与计算。     

《电讯技术》专题资料《时间频率技术》题要（十）

锁相铷原子频标（王正忠） 铷原子频标具有高的频率准确度和良好的长期稳定度,而压控晶体振荡器具有高的短期稳定度和低相位噪声特性。利用锁相技术,可使两者优良性能有机结合,输出既具有原子频标的高频率准确度和良好长期稳定性,又具有晶振的高瞬稳和低相位噪声的频标信号。     

宽范围高稳晶振频率稳定度测试系统的设计

介绍一种宽范围、高稳晶振的频率稳定度测试系统设计,整个设计以铷原子钟为标准钟,采用直接数字频率合成技术,使用高分辨力频率计数器进行测量、计算,并由AVR单片机和CPLD可编程器件完成控制.实验结果证明,该设计不仅具备传统频稳测试系统的功能,而且又为解决非标准、高稳晶振的频率稳定度测试提供具体的方法.     

X波段固态微波频率合成器的研制

本文报道一种可用计算机控制输出频率的 X 波段固态微波频率合成器,其输出频率在100MHz 范围内以100kHz 步进可调,秒级频率稳定度为1.722×10~(-9),长期频率稳定度与主晶振相同。最后给出了利用差频法测量短期频率稳定度的测量系统框图及其测量结果。     

哈达玛方差在铷原子频标长稳测量中的应用

在国内阿仑方差(Allan Variance)通常用来表征原子频标的频率稳定度。在国外，通常运用哈达玛方差(Adamard Vatiance)测量铷原子频标长期频率稳定度。简要介绍了哈达玛方差在铷原子频标日频率稳定度测试中的具体应用，并对测量结果进行了分析。     

频率稳定度的测量

简单介绍了3种常用的测量短期频率稳定度的方法:差拍法,双混频法和频差倍增法,以及对于数据处理所采用的方法,并且在其中的差拍法和频差倍增法基础上提出一种改进的方法,从而可以提高整个系统的测量精度.     

利用锁相飞秒激光对碘分子R(59)8-4超精细跃迁的绝对频率测量

介绍了633 nm半导体激光频标系统,高重复频率锁相飞秒激光器系统和绝对频率测量系统的建立以及测量碘分子超精细跃迁绝对频率的系统方案.633 nm半导体激光频标采用三次微分稳频方法,将激光频率锁定在碘分子谱线上,获得0.5 mW的稳频激光输出.飞秒激光稳频系统通过锁相电路将飞秒激光的高重复频率(760 MHz)和初始频率稳定在微波频率标准上,从而得到稳定的飞秒光梳,其稳定度优于6.44×10-13.在此基础上建立了绝对频率的直接测量系统,即利用波长计直接测量光梳的齿数n,并通过拍频法,测出633 nm半导体激光频标与飞秒光梳的差频,从而计算出相应谱线的绝对频率.这样,通过锁相飞秒激光器,建立了微波频率标准到光学频率标准的传递,为进一步的基础研究工作奠定了基础.     

GPS驯服中无偏滑动平均滤波算法的研究

 分析已有GPS驯服中滤波算法的特点,提出了基于GPS的实时频率误差处理及状态估计的无偏滑动平均滤波算法.该方法继承了普通滑动滤波算法低噪声特点,且用线性回归估计补偿了普通滑动滤波算法的偏差,利用该方法滤除频率测量误差中的频率偏差和多通道GPS接收机秒信号(GPS1PPS)的锯齿误差,并预报晶振状态.MATLAB仿真和实际测试结果都证明了无偏滑动滤波算法比普通滑动滤波有效,提高了晶振频率的长期稳定度和准确度,实际系统中恒温晶振OXCO-131的长期频率稳定度的Allan方差提高了约三个数量级,达到3.5E-12/d.     

An all-digital PLL for frequency multiplication by 4 to 1022 with seven-cycle lock time

An all-digital phase-locked loop (PLL) circuit in which resolution in the phase detector and digitally controlled oscillator (DCO) exactly matches the gate-delay time is presented. The pulse delay circuit is connected in a ring shape with 32 inverters (2/sup 5/ inverters). With the inverter gate-delay time as the time base, the pulse phase difference is detected simultaneously with the generation of the output clock. In this system, the phase detector and oscillator share a single ring-delay-line (RDL). This means the resolution is the same at all times, making a high-speed response possible. In a prototype integrated circuit (IC) using 0.65-/spl mu/m CMOS, the generation of a frequency multiplication clock was achieved with four reference clocks, and that of a phase-locked clock with seven reference clocks, for a high-speed response. The cell size was 1.08 /spl times/ 1.08 mm/sup 2/, and the output clock frequency had a wide range of 50 kHz/spl sim/60 MHz. The multiplication range of the clock frequency was also a very wide 4/spl sim/1022, and a high level of precision was achieved with a clock jitter standard deviation of 234 ps. This digital PLL can withstand a broad range of operating environments, from -30/spl deg/C/spl sim/140/spl deg/C, and is suitable for making a programmable clock generator on a chip.     

基于Kalman滤波的目标信号TOA测量校正

多点定位系统中,目标信号TOA测量精度直接决定了系统对目标的定位精度,而目标信号TOA测量精度取决于提供系统时钟的晶振的准确度和稳定度。针对多点定位系统中目标信号TOA测量准确度的具体问题,分析晶振频率偏移和GPS秒脉冲抖动对TOA测量准确度的影响,导出基于Kalman滤波的目标信号TOA测量校正方法。数值仿真证明此方法可以有效地改善目标信号TOA的测量准确度,对提高多点定位系统定位性能具有较强的现实意义与实用价值。     

Short-term stability of passive atomic frequency standards

The instability of passive atomic frequency standards caused by shot noise introduced by the atomic reference is calculated. This instability can be characterized by a figure of merit for the atomic reference, and the asymptotic functions for the rms frequency fluctuation for long and short averaging times expressed in terms of this quantity. Measurements of the rms frequency fluctuation of cesium atomic beam and rubidium vapor frequency standards are compared with theory, and the predicted performances of various existing and proposed atomic standards are tabulated. It is feasible to build atomic beam frequency standards whose stability for averaging times less than one second is limited by noise in the crystal oscillator rather than by shot noise, a criterion generally met by rubidium vapor frequency standards. For long averaging times, shot noise will always be the fundamental limiting factor in atomic frequency standard stability.     

A high resolution frequency multiplier for clock signal generation

This paper presents a high resolution frequency multiplier (FMUL) with the ability to multiply frequency with a programmable high multiplication factor, in the order of 10²-10⁴ and of the form N/M. It was designed for chip-sets that use a real time clock (32768 Hz) for power-save operation, and an additional high-frequency oscillator, in the range of 40-60 MHz, for regular operation. Using the FMUL spares the need for the additional high-frequency oscillator. The FMUL's frequency resolution is 100 ppm, and its jitter is less than 200 ps. The circuit is designed to work with 25 V supply voltage. It is implemented in a standard 0.8 pm N-well CMOS process, and its area is 0.48 mm²     

A clock generator with cascaded dynamic frequency counting loops for wide multiplication range applications

This work presents a clock generator with cascaded dynamic frequency counting (DFC) loops for wide multiplication range applications. The DFC loop, which uses variable time period to estimate and tune the frequency of the digitally controlled oscillator (DCO), enhances the resolution of frequency detection. The conventional phase-frequency detector (PFD) and programmable divider are replaced with a digital arithmetic comparator and a DCO timing counter. The value in the DCO timing counter is separated into quotient and remainder vectors. A threshold region is set in the remainder vector to reduce the influence of jitter variation in frequency detection. The loop stability can be retained by cascading two DFC loops when the multiplication factor (N) is large. The proposed clock generator achieves a multiplication range from 4 to 13 888 with output peak-to-peak jitter less than 2.8% of clock period. A test chip for the proposed clock generator is fabricated in 0.18-/spl mu/m CMOS process with core area of 0.16 mm/sup 2/. Power consumption is 15 mW @ 378 MHz with 1.8-V supply voltage.     

Rubidium atomic frequency source having small size and fast warm up

An experimental miniaturised rubidium frequency source which has been built in a volume of a little more than 100 in3 provides a stability of better than 1 part in 108 over one year and a warm-up time of 5 min. This long-term stability lies between that of a good crystal frequency standard and a high-grade rubidium atomic frequency standard.     

780nm倍频激光器的研究

为了获得结构简单、成本相对低廉的高功率780nm激光, 采用了单块倍频晶体的腔外倍频方法。分布式反馈半导体激光器产生的连续激光注入光纤放大器后, 通过周期极化铌酸锂晶体进行准相位匹配, 取得了铷原子的饱和吸收光谱。结果表明, 该激光器产生了1.2W的倍频光, 具有较高的输出功率。这一结果对铷原子钟、原子干涉仪等冷原子物理实验的小型化是有帮助的。     

铷钟扩捕方法研究

铷钟的捕获带和其能否锁定密切相关,它通常比较小。对原子钟扩捕问题进行了研究,设计了主要由二次谐波幅度检测电路和由单片机同DA构成的扫描电路等组成的扩捕电路。工作时扫描电路输出三角波扫描信号,带动本振的频率扫动同时检测二次谐波的幅度,当幅值超过设定时,说明本振的频率已进入铷钟以前的捕获带,停止扫描,铷钟靠环路的作用便能锁定。以铷钟为对象进行了实验研究,实验结果是当把本振的频率调偏到捕获带以外时,不用扩捕电路环路没法锁定而使用扩捕电路后环路正常锁定,实验结果和理论分析一致。     

铷原子频标低噪声9次倍频链设计

铷原子频标短期频率稳定度由物理系统和电路系统共同决定.微波链的相位噪声是电路系统影响铷频标短期频率稳定度的主要因素.本文分析了传统铷频标微波链的结构和工作原理,指出9次倍频器和调制器是微波链相噪的主要来源.为抑制微波链噪声,采用肖特基二极管倍频和提高载波频率的调制方案,设计出一种低噪声9次倍频链.实验结果表明,该倍频链输出90MHz信号的相噪比传统方案降低了12dB以上,可将微波链噪声对铷频标1s频率稳定度的贡献控制在1.9E-13.将该倍频链应用于铷频标,测得铷频标短稳为3.53E-13（1s）、1.27E-13（10s）和3.97E-14（100s）.