碲锌镉缓冲层液相外延技术的研究

文章报道了采用液相外延方法，在碲锌镉衬底上进行碲锌镉薄膜缓冲层生长的情况，并且采用X光双晶衍射仪、X光形貌仪、红外傅里叶光谱仪、二次离子质谱仪等手段对碲锌镉薄膜进行了表征，碲锌镉薄膜具有较好地组分及均匀性，晶体结构质量也较好。采用碲锌镉缓冲结构生长了碲镉汞液相外延片，其碲锌镉与碲镉汞薄膜界面附近的杂质得到了有效的控制。     

碲锌镉缓冲层液相外延技术的研究

文章报道了采用液相外延方法,在碲锌镉衬底上进行碲锌镉薄膜缓冲层生长的情况,并且采用X光双晶衍射仪、X光形貌仪、红外傅里叶光谱仪、二次离子质谱仪等手段对碲锌镉薄膜进行了表征,碲锌镉薄膜具有较好地组分及均匀性,晶体结构质量也较好.采用碲锌镉缓冲结构生长了碲镉汞液相外延片,其碲锌镉与碲镉汞薄膜界面附近的杂质得到了有效的控制.     

Si基复合衬底碲镉汞液相外延技术的研究

文章报道了采用Si基复合衬底，利用液相外延方法成功进行中波碲镉汞薄膜生长的情况，并且采用X光双晶衍射、X光形貌、红外付立叶光谱仪等手段对碲镉汞薄膜进行了表征。Si基复合衬底碲镉汞外延膜晶体结构为单晶，并且它的双晶衍射半峰值接近国外同类产品的先进水平。     

碲锌镉衬底晶面极性对水平液相外延碲镉汞薄膜的影响

研究了碲锌镉衬底（111）晶面的不同极性对水平推舟液相外延生长碲镉汞薄膜的影响。实验结果显示,（111）A面碲锌镉衬底水平液相外延生长碲镉汞薄膜材料组分和厚度均与常规（111）B面碲锌镉衬底碲镉汞薄膜材料相当;碲镉汞母液在采用（111）A面、（111）B面衬底进行液相外延生长的碲镉汞薄膜上接触角分别为（50±2）°和（30±2）°,结合微观模型分析确认碲镉汞母液在碲镉汞薄膜（111）A面存在更大的表面张力;观察并讨论了（111）A面碲镉汞与（111）B面碲镉汞薄膜材料表面微观形貌的差别;实验获得的（111）A面碲镉汞薄膜XRD半峰宽为33.1arcsec。首次报道了（111）晶面选择对母液残留的影响,研究结果表明,采用（111）A面碲锌镉衬底进行碲镉汞水平推舟液相外延生长,能够在不降低晶体质量的情况下,大幅减小薄膜表面母液残留。     

长波碲镉汞薄膜外延用碲锌镉衬底筛选方法研究

主要报道了用于提高液相外延(Liquid Phase Epitaxy, LPE)长波碲镉汞薄膜质量的碲锌镉衬底筛选方法研究。通过对碲锌镉衬底的锌组分、红外透过率、沉淀/夹杂、位错密度、X射线形貌像和X射线衍射半峰宽等参数进行全面测试以及对外延后碲镉汞薄膜的X射线形貌像和X射线衍射半峰宽进行测试评估,发现目前X射线形貌像和锌组分是影响LPE长波碲镉汞薄膜用碲锌镉衬底的重要参数。结果表明,锌组分处于4.2%～4.8%之间、形貌像衍射强度高且均匀性好是长波碲镉汞薄膜外延用衬底的理想选择。     

高质量HgCdTe薄膜的液相外延生长

用固态HgTe作为Hg补偿源，采用开管、水平滑块推舟的富Te液相外延(LPE)方法在碲锌镉(Cd1-yZnyTe，y=0．04)衬底上外延生长大面积Hg1-xCdxTe(x=0．2)薄膜材料，通过适当的生长条件得到组分均匀、结构完整、表面形貌良好的长波碲镉汞薄膜。测试结果表明本方法生长的HgCdTe薄膜能满足目前研制红外焦平面器件的要求。     

昆明物理研究所大面积水平推舟液相外延碲镉汞薄膜技术进展

报道了近年来昆明物理研究所在富碲水平推舟液相外延碲镉汞外延薄膜制备技术方面的进展。2019年以来,突破了?120 mm碲锌镉晶体定向生长技术,使碲锌镉衬底沉积相和夹杂相密度≤5×103 cm－2,位错腐蚀坑密度（EPD）≤4.0×104 cm－2,?120 mm（111）晶圆衬底的Zn组份分布极差≤0.36%。基于碲锌镉衬底技术的进步,液相外延碲镉汞薄膜的最大生长尺寸达到了70 mm×75 mm,薄膜位错腐蚀坑密度均值为5×104 cm－2,X射线双晶回摆曲线半峰宽（DCRC-FWHM）≤35 arcsec,部分可控制到25 arcsec以下;50 mm×60 mm尺寸长波碲镉汞薄膜的厚度极差≤±1.25 μm,室温截止波长极差≤±0.1 μm,中波碲镉汞薄膜相应指标分别为≤±1 μm、≤±0.05 μm。材料技术的进展促进了制冷型碲镉汞探测器产能提升和成本的降低,也支撑了高性能长波/甚长波探测器、高工作温度（HOT）探测器以及2048×2048、4096×4096等甚高分辨率高性能探测器的研制。     

大尺寸碲锌镉基碲镉汞材料分子束外延技术研究

针对高质量、大规模碲镉汞红外焦平面探测器需求的持续增加,本文开展了使用分子束外延方式在50 mm×50 mm(211)B碲锌镉衬底上外延碲镉汞材料技术的研究.通过对碲锌镉衬底改进湿化学腐蚀、碲锌镉衬底预处理、碲锌镉衬底缓冲层生长、碲锌镉基碲镉汞材料工艺开发等方面的研究,开发出了能够稳定获得碲锌镉基碲镉汞材料的工艺.材料...     

碲锌镉衬底上中长双色红外碲镉汞分子束外延生长研究

报道了使用分子束外延(Molecular beam epitaxy,MBE)技术,在(211)B碲镉汞(CdZnTe,CZT)衬底上生长中长波双色碲镉汞(HgCdTe,MCT)薄膜材料,生长温度为180℃,研究了双色碲镉汞薄膜材料衬底脱氧技术、分子束外延薄膜生长温度与缓冲层生长等关键技术,实现了中长波双色碲镉汞薄膜生长,外延薄膜采用相差显微镜、扫描电子显微镜(SEM)、傅里叶变换红外光谱仪(FTIR)、二次离子质谱仪(SIMS)及X射线衍射仪(XRD)对薄膜的表面缺陷、厚度、组分及其均匀性、薄膜纵向组分以及晶体质量进行了表征,表面缺陷数量低于600 cm~(-2),组分(300 K测试)和厚度均匀性分别为(35)x≤0.001、(35)d≤0.9μm,X-Ray双晶衍射摇摆曲线FWHM=65 arcsec,得到了质量较高的中长波双色碲镉汞薄膜材料。     

液相外延原位Au掺杂碲镉汞薄膜材料的研究

通过液相外延方法,在碲锌镉衬底上制备了原位Au掺杂碲镉汞薄膜材料,采用金相显微镜、X光双晶衍射仪、二次离子质谱仪、Hall测试、少子寿命测试等手段对Au掺杂的碲镉汞薄膜材料进行了表征,外延片的表面形貌、晶格质量等和常规的碲镉汞外延材料基本相当,少子寿命较常规材料提高至少一个量级,芯片R0A提高至少5倍,并成功制备出了截止波长为10 μm的256×256探测器芯片,响应率非均匀性为2.85%,有效像元率为99.2%。     

HgCdTe／CdZnTe晶格失配与X光衍射貌相的关系研究

文章采用富Te水平推舟液相外延工艺在CdZnTe衬底上生长了HgCdTe外延薄膜。研究了外延薄膜／衬底晶格失配度、X光衍射貌相、红外焦平面器件探测率三者之间的关系。对于HgCdTe外延层的X光衍射貌相我们将其大致分为五类，分别是Crosshatch貌相、混合貌相、均匀背景貌相、Mosaic貌相以及由衬底质量问题引起的沟壑状貌相，采用Crosshatch貌相和混合貌相材料所制备的红外焦平面器件，平均来说其探测率(D*)较高。X射线双轴衍射的实验结果表明，当外延层与衬底的晶格失配度为～0.03％时，外延层会呈现明显的Crosshatch貌相；而当失配度减小时，会逐渐呈现出混合貌相、均匀背景貌相、直至失配度为负值时呈现Mosaic貌相。因此，对于特定截止波长的HgCdTe焦平面器件，可以通过控制HgCdTe／CdZnTe之间的失配，生长出符合我们要求的貌相的碲镉汞外延材料，从而来提高焦平面器件的性能。     

采用(211)碲锌镉衬底制备碲镉汞液相外延薄膜

文中对(211)晶向的CdZnTe衬底进行液相外延生长HgCdTe。获得的碲镉汞液相外延材料的组分为0. 30 ～0. 33,薄膜厚度为10 ～15μm,表面缺陷密度为500cm- 2 ,材料的FWHM达到24弧秒,位错腐蚀坑密度约为2 ×105 cm- 2 ,该材料的表面形貌与采用(111)晶向衬底的HgCdTe外延材料有较大区别。     

CdZnTe中富碲沉积相缺陷引起的液相外延HgCdTe薄膜表面缺陷

为了研究液相外延碲镉汞薄膜表面缺陷形成机制,采用光刻工艺结合化学腐蚀方法在碲锌镉衬底表面实现了网格化,研究了碲锌镉近表面富碲沉积相与外延薄膜表面缺陷的关系.结果表明:衬底近表面富碲沉积相会导致碲镉汞薄膜表面孔洞、类针形凹陷坑缺陷以及三角形凹陷坑聚集区;在液相外延过程中,高温碲镉汞熔液与CdZnTe衬底间的回熔作用可以减少与富碲沉积相相关的表面缺陷,薄膜表面缺陷与衬底表面富碲沉积相的匹配度与回熔深度负相关;回熔过程以及富碲沉积相形态、深度影响HgCdTe薄膜表面缺陷形态和分布.     

CdZnTe substrate impurities and their effects on liquid phase epitaxy HgCdTe

Impurity levels were tracked through the stages of substrate and liquid phase epitaxy (LPE) layer processing to identify sources of elements which degrade infrared photodetector performance. Chemical analysis by glow discharge mass spectrometry and Zeeman corrected graphite furnace atomic absorption effectively showed the levels of impurities introduced into CdZnTe substrate material from the raw materials and the crystal growth processes. A new purification process(in situ distillation zone refining) for raw materials was developed, resulting in improved CdZnTe substrate purity. Substrate copper contamination was found to degrade the LPE layer and device electrical properties, in the case of lightly doped HgCdTe. Anomalous HgCdTe carrier type conversion was correlated to certain CdZnTe and CdTe substrate ingots.     

Critical Thickness of Exponentially and Linearly Graded HgCdTe/CdZnTe

We have investigated the glide of strain-relaxing dislocations in closely lattice matched, liquid phase epitaxially (LPE) grown, HgCdTe. A generalized LPE heterostructure was modeled based on secondary-ion mass spectroscopy (SIMS) profile measurements. Critical thickness was predicted using a force balanced method which expands upon the work recently developed by Ayers. The behavior of dislocation dynamics is predicted with respect to exponentially and linearly graded metallurgical interfaces intrinsic to the high- temperature LPE growth process. The extended Ayers model is compared against x-ray topography and cross-sectional observations of misfit dislocations by the decoration of etch pits on cleaved HgCdTe/CdZnTe. The model predicts that, for bulk Cd/Zn compositions which are nearly lattice matched, the Zn compositional profile plays an important role in determining both the onset and distribution of misfit dislocations.     

Direct growth of CdZnTe/Si substrates for large-area HgCdTe infrared focal plane arrays

Direct epitaxial growth of high-quality 100lCdZnTe on 3 inch diameter vicinal {100}Si substrates has been achieved using molecular beam epitaxy (MBE); a ZnTe initial layer was used to maintain the {100} Si substrate orientation. The properties of these substrates and associated HgCdTe layers grown by liquid phase epitaxy (LPE) and subsequently processed long wavelength infrared (LWIR) detectors were compared directly with our related efforts using CdZnTe/ GaAs/Si substrates grown by metalorganic chemical vapor deposition (MOCVD). The MBE-grown CdZnTe layers are highly specular and have both excellent thickness and compositional uniformity. The x-ray full-width at half-maximum (FWHM) of the MBE-grown CdZnTe/Si increases with composition, which is a characteristic of CdZnTe grown by vapor phase epitaxy, and is essentially equivalent to our results obtained on CdZnTe/GaAs/Si. As we have previously observed, the x-ray FWHM of LPE-grown HgCdTe decreases, particularly for CdZnTe compositions near the lattice matching condition to HgCdTe; so far the best value we have achieved is 54 arc-s. Using these MBE-grown substrates, we have fabricated the first high-performance LWIR HgCdTe detectors and 256 x 256 arrays using substrates consisting of CdZnTe grown directly on Si without the use of an intermediate GaAs buffer layer. We find first that there is no significant difference between arrays fabricated on either CdZnTe/Si or CdZnTe/GaAs/Si and second that the results on these Si-based substrates are comparable with results on bulk CdZnTe substrates at 78K. Further improvements in detector performance on Si-based substrates require a decrease in the dislocation density.     

Impurity study of CdZnTe substrates used for LPE HgCdTe

Impurites were tracked from raw material purification through to CdZnTe processing in an effort to identify the sources of elements which impact on IR photodetector performance. Chemical analyses by GDMS and ZCGFAA effectively showed the levels of impurities introduced into CdZnTe substrate material from the manufacturing processes. A new purification process (ISDZR) for raw materials was developed, resulting in improved CdZnTe substrate purity. Substrate CU contamination was found to have detrimental effects on LPE layer and device electrical properties for lightly doped HgCdTe.     

MOCVD grown CdZn Te/GaAs/Si substrates for large-area HgCdTe IRFPAs

Large-area HgCdTe 480×640 thermal-expansion-matched hybrid focal plane arrays were achieved by substituting metalorganic chemical vapor deposition (MOCVD)-grown CdZnTe/GaAs/Si alternative substrate in place of bulk CdZnTe substrates for the growth of HgCdTe p-on-n double-layer heterojunctions by controllably-doped mercury-melt liquid phase epitaxy (LPE). (100) CdZnTe was grown by MOCVD on GaAs/Si using a vertical-flow high-speed rotating disk reactor which incorporates up to three two-inch diameter substrates. Layers having specular surface morphology, good crystalline structure, and surface macro defect densities <50 cm⁻² are routinely achieved and both the composition uniformity and run-to-run reproducibility were very good. As the composition of the CdZnTe layers increases, the x-ray full width at half maximum (FWHM) increases; this is a characteristic of CdZnTe grown by VPE techniques and is apparently associated with phase separation. Despite a broader x-ray FWHM for the fernary CdZnTe, the FWHM of HgCdTe grown by LPE on these substrates decreases, particularly for [ZnTe] compositions near the lattice matching condition to HgCdTe. An additional benefit of the ternary CdZnTe is an improved surface morphology of the HgCdTe layers. Using these silicon-based substrates, we have demonstrated 78K high-performance LWIR HgCdTe 480×640 arrays and find that their performance is comparable to similar arrays fabricated on bulk CdZnTe substrates for temperatures exceeding approximately 78K. The performance at lower temperatures is apparently limited by the dislocation density which is typically in the low-mid 10⁶ cm⁻² range for these heteroepitaxial materials.     

Si/CdTe复合衬底HgCdTe液相外延材料的生长与性能分析

通过改进推舟液相外延技术,成功地在(211)晶向Si/CdTe复合衬底上进行了HgCdTe液相外延生长,获得了表面光亮的HgCdTe外延薄膜.测试结果表明,(211)Si/CdTe复合衬底液相外延HgCdTe材料组分及厚度的均匀性与常规(111)CdZnTe衬底HgCdTe外延材料相当;位错腐蚀坑平均密度为(5～8)×105 cm-2,比相同衬底上分子束外延材料的平均位错密度要低一个数量级;晶体的双晶半峰宽达到70″左右.研究结果表明,在发展需要低位错密度的大面积长波HgCdTe外延材料制备技术方面,Si/CdTe复合衬底HgCdTe液相外延技术可发挥重要的作用.