Novel LDNMOS embedded SCR with strong ESD robustness based on 0.5 μm 18 V CDMOS technology

A novel LDNMOS embedded silicon controlled rectifier(SCR) was proposed to enhance ESD robustness of high-voltage(HV) LDNMOS based on a 0.5 μm 18 V CDMOS process. A two-dimensional(2D) device simulation and a transmission line pulse(TLP) testing were used to analyze the working mechanism and ESD performance of the novel device. Compared with the traditional GG-LDNMOS, the secondary breakdown current(It2) of the proposed device can successfully increase from 1.146 A to 3.169 A with a total width of 50 μm, and ESD current discharge efficiency is improved from 0.459 m A/μm2 to 1.884 m A/μm2. Moreover, due to their different turn-on resistances(Ron), the device with smaller channel length(L) owns a stronger ESD robustness per unit area.     

Robust power-on reset circuit with brown-out detection

An on-chip power-on reset circuit with a brown-out detection capability is implemented in a0.18μm CMOS.A pF-order capacitor is charged with a proportional-to-absolute-temperature(PTAT)current from a bandgap reference with limited loop bandwidth and slow start-up feature,to generate a reset signal with high robustness and wide-range supply rise time.An embedded brown-out detector based on complementary voltage-to-current(V-to-I)conversion and current comparison can accurately respond to the brown-out event with high robustness over process and temperature when the supply is lower than 1.5V and the brown-out duration is longer than 0.1ms.The presented design with embedded offset voltage cancellation consumes a quiescent current of 8.5μA from a 1.8Vsupply and works over ambient temperature of-40°to 120°.     

Low leakage 3×VDD-tolerant ESD detection circuit without deep N-well in a standard 90-nm low-voltage CMOS process

A new low leakage 3×VDD-tolerant electrostatic discharge(ESD)detection circuit using only low-voltage device without deep N-well is proposed in a standard 90-nm 1.2-V CMOS process.Stacked-transistors technique is adopted to sustain high-voltage stress and reduce leakage current.No NMOSFET operates in high voltage range and it is unnecessary to use any deep N-well.The proposed detection circuit can generate a 38 mA current to turn on the substrate triggered silicon-controlled rectifier(STSCR)under the ESD stress.Under normal operating conditions,all the devices are free from over-stress voltage threat.The leakage current is 88 nA under 3×VDD bias at 25°C.The simulation result shows the circuit can be successfully used for 3×VDD-tolerant I/O buffer.     

Pendulum-like oscillation controller for micro aerial vehicle with ducted fan based on LQR and PSO

This paper describes a novel type of pendulum-like oscillation controller for micro air vehicle(MAV) hover and stare state in the presence of external disturbances,which is based on linear-quadratic regulator(LQR) and particle swarm optimization(PSO).A linear mathematical model of pendulum phenomenon based upon actual wind tunnel test data representing the hover mode is established,and a hybrid LQR and PSO approach is proposed to stabilize oscillation.PSO is applied to parameter optimization of the designed LQR controller.A series of comparative experiments are conducted,and the results have verified the feasibility,effectiveness and robustness of our proposed approach.     

Design of quaternary logic circuits based on source-coupled logic

In order to improve the performance of arithmetic very large-scale integration ( VLSI) system,a novel structure of quaternary logic gates is proposed based on multiple-valued current mode ( MVCM) by using dynamic source-coupled logic ( SCL) . Its key components,the comparator and the output generator are both based on differential-pair circuit ( DPC) ,and the latter is constructed by using the structure of DPC trees. The pre-charge evaluates logic style makes a steady current flow cut off, thereby greatly saving the power dissipation. The combination of multiple-valued source-coupled logic and differential-pair circuit makes it lower power consumption and more compact. The performance is evaluated by HSPICE simulation with 0. 18 μm CMOS technology. The power dissipation,transistor numbers and delay are superior to corresponding binary CMOS implementation. Multiple-valued logic will be the potential solution for the high performance arithmetic VLSI system in the future.     

Effects of gate dielectric thickness and semiconductor thickness on device performance of organic field-effect transistors based on pentacene

In this paper,the pentacene-based organic field-effect transistors(OFETs)with poly(methyl methacrylate)(PMMA)as gate dielectrics were fabricated,and the effects of gate dielectric thickness and semiconductor thickness on the device performance were investigated.The optimal PMMA thickness is in the range of 350–400 nm to sustain a considerable current density and stable performance.The device performance depends on the thicknesses of the active layer non-monotonically,which can be explained by the morphology of the pentacene film and the position of the conducting channel in the active layer.The device with a pentacene thickness of 50 nm shows the best performance,which has a maximum hole mobility of 1.12 cm2/V·s.In addition,the introduction of a thin layer of tris-(8-hydroxyquinolinato)aluminum(Alq3)to the OFETs as a light-emitting material greatly decreases the device performance.     

Dopamine detection using a patch-clamp system on a planar microeletrode array electrodeposited by polypyrrole/graphene nanocomposites

To achieve a dopamine(DA)response with high sensitivity and high signal-to-noise ratio(S/N)with a patch-clamp system,polypyrrole/graphene(PPy/GR)nanocomposites were steadily electrodeposited by an electrochemical method on a planar microelectrode array(pMEA)fabricated by a standard micromachining process.The electrodeposition process was carried out by chronopotentimetry measurement scanning from 0.1 to 0.8 C/cm2at the current of 2 mA;0.5 C/cm2was found to be optimal.The pMEA modified by PPy/GR at the 0.5 C/cm2exhibits remarkable properties;for instance,the standard deviation(SD)decreases from 8.4614×10-11to 5.62×10 11A,reduced by 33.52%,and the sensitivity increases from 2566.88 to 76114.65μAmMcm-2,29.65 times higher than the bare Pt(platinum).A good linear relationship between the current and DA concentration in the range of 0.30 to 61.71μm was obtained,with a correlation coefficient of 0.997.The sensor is meaningful for neuroscience research and the treatment of neurological diseases.     

High-PSRR High-Order Curvature-Compensated CMOS Bandgap Voltage Reference

A high-PSRR high-order curvature-compensated CMOS bandgap voltage reference( BGR),which has the performances of high power supply rejection ratio( PSRR) and low temperature coefficient,is designed in SMIC 0. 18 μm CMOS process. Compared to the conventional curvature-compensated BGR which adopted a piecewise-linear current,the temperature characterize of the proposed BGR is effectively improved by adopting two kinds of current including a piecewise-linear current and a current proportional 1. 5 party to the absolute temperature T. By adopting a low dropout( LDO) regulator whose output voltage is the operating supply voltage of the proposed BGR core circuit instead of power supply voltage VDD,the proposed BGR with LDO regulator achieves a well PSRR performance than the BGR without LDO regulator. Simulation results show that the proposed BGR with LDO regulator achieves a temperature coefficient of 2. 1 × 10-6/ ℃ with a 1. 8 V power supply voltage and a line regulation of 4. 9 μV / V at 27 ℃. The proposed BGR with LDO regulator at 10 Hz,100 Hz,1 k Hz,10 k Hz and 100 k Hz have the PSRR of- 106. 388,- 106. 388,- 106. 38,- 105. 93 and-88. 67 d B respectively.     

4H-SiC monolithic Darlington transistors with slight current gain drop at high collector current density

Profit from high current gain features, 4 H-Si C power Darlington transistor has the capacity for handling high current transmission. In this paper, monolithic Darlington transistors were fabricated using a simultaneous formation process for both n-type(emitter) and p-type(base) ohmic contact. The isolated device shows current gain of 1061 and 823 with collector current density(JC) increasing from 200 to 800 A/cm2, exhibiting a slight current gain drop at high JC. By extracting the interface state density(Dit) between Si O2 and p-type 4 H-Si C, it is found that this advantage owes to the improvement of the shallow bulk minority carrier lifetime in base region. Furthermore, ISE-TCAD(technology computer aided design) simulation was carried out to study the relationship between base minority lifetime and the current gain, from which the total base minority lifetime is estimated to be 48 ns. The open base breakdown voltage(BVCEO) is 850 V at a leakage current of 2 μA due to the electric filed crowding at the isolation bottom between drive bipolar junction transistor(BJT) and output BJT. To solve this, non-isolated devices were also fabricated with improved BVCEOof 2370 V, indicating the superior potential of 4 H-Si C monolithic Darlington transistors for high power application, while the current gain is deceased to 420, which needs further improvement.     

High sp~3 content hydrogen-free amorphous diamond: an excellent electron field emission material

Details are given of a study of the characteristics of field-induced electron emission from hydrogen-free high sp~3 content (>90 % ) amorphous diamond (a-D) film deposited on heavily doped (p<0.01 Ω·cm) n-type monoerystalline Si (111 ) substrate. It is demonstrated that a-D film has excellent electron field emission properties. The emission current can reach 0.9 μA at applied field as low as 1 V/μm, and the emission current density can be ahout several mA/cm~2 under 20 V/μm. The emission current is stable when the beginning current is at 50 μA within 72 h. Uniform fluorescence display of electron emission from the whole face of the a-D film under the electric field of 10-12 V/μm is also observed. The contribution of excellent electron emission property results from the smooth, uniform, amorphous surface and high sp~3 content of the a-D film.     

Viscoelastic plastic continuous physical model of a magnetorheological damper applied in the high speed train

In the preliminary design stage of high-speed train smart suspension,a simple,yet accurate magnetorheological(MR)damper model whose parameters have clear physical meaning is needed.Based on the working mechanism analysis and the dynamic behavior study of the MR damper,a new consecutive viscoelastic plastics(VEP)model is proposed.A methodology to find the parameters of the proposed model directly has been proposed.The comparison with experimental results indicates that the proposed model could adequately characterize the intrinsic nonlinear behavior of the MR damper,including the hysteretic behavior,roll-off phenomenon,and the variation of the hysteresis width in terms of the frequency and magnitude of excitation.The results of experimental testing prove that the accuracy of the proposed model is higher than that of the phenomenological model while only containing four undetermined parameters with clear physical meaning.Moreover,based on the proposed VEP model,a nonlinear stiffness VEP(nkVEP)model is developed with higher precision in the hysteretic region.The nkVEP model,which can reproduce the behavior of the damper with fluctuating input current,is developed.The proposed model could predict accurately the response of the MR damper in a wide range of frequency and displacement.     

Systolic B –1 Circuit in Galois Fields Based on a Quaternary Logic Technique

In order to improve the circuit complexity and reduce the long latency of B~(-1) operations,a novel B~(-1) operation in Galois Field GF(24) is presented and the corresponding systolic realization based on multiple-valued logic(MVL) is proposed. The systolic structure employs multiplevalued current mode(MVCM) by using dynamic source-coupled logic(SCL) to reduce the initial delay and the transistor and wire counts. The performance is evaluated by HSPICE simulation in 0.18 μm CMOS technology and a comparison is conducted between our proposed implementation and those reported in the literature. The initial delay and the sum of transistors and wires in our MVL design are about 43% and 13% lower, respectively, in comparison with other corresponding binary CMOS implementations. The systolic architecture proposed is simple, regular, and modular,well suited for very large scale integration(VLSI) implementations. The combination of MVCM circuits and relevant algorithms based on MVL seems to be a potential solution for high performance arithmetic operations in GF(2~k).     

Research on the control method for voltage-current source hybrid-HVDC system

The hybrid-HVDC topology,which consists of line-commutated-converter(LCC)and voltage source converter(VSC)and combines their advantages,has extensive application prospects.A hybrid-HVDC system,adopting VSC on rectifier side and LCC on inverter side,is investigated,and its mathematic model is deduced.The commutation failure issue of the LCC converter in the hybrid-HVDC system is considered,and a novel coordinated control method is proposed to enhance the system commutation failure immunity.A voltage dependent voltage order limiter(VDVOL)is designed based on the constant DC voltage control on the rectifier side,and constant extinction angle backup control is introduced based on the constant DC current control with voltage dependent current order limiter(VDCOL)on the inverter side.The hybrid-HVDC system performances under normal operation state and fault state are simulated in the PSCAD/EMTDC.Then,system transient state performances with or without the proposed control methods under fault condition are further compared and analyzed.It is concluded that the proposed control method has the ability to effectively reduce the probability of commutation failure and improve the fault recovery performance of the hybrid-HVDC system.     

Robustness assessment for flight control system of an oceanographic unmanned aerial vehicle

A post-design robustness assessment for the longitudinal flight control system of an oceanographic unmanned aerial vehicle (UAV) is presented in this paper. Two novel systematic approaches of generating the linear fractional transformation (LFT) model directly from nonlinear equations are proposed for this particular robustness analysis problem. The closed-loop system combined with each controller is used to determine combinations of aerodynamic parameters that result in worst-case performance. Classical simultaneous gain and phase margin stability metrics currently used in the aerospace industry are introduced for the certification of robustness of this uncertain multivariable system. The results show that the control system remains stable and achieves desired performance for all possible parameter variations over a specified range in both frequency domain and time domain.     

Fabrication of a monolithic 4H-SiC junction barrier schottky diode with the capability of high current

There is a great interest in monolithic 4H-Si C Junction Barrier Schottky(JBS) diodes with the capability of a high forward current for industrial power applications.In this paper,we report large-area monolithic 4H-Si C JBS diodes fabricated on a 10 μm 4H-Si C epitaxial layer doped to 6×1015 cm3.JBS diodes with an active area of 30 mm2 had a forward current of up to 330 A at a forward voltage of 5 V,which corresponds to a current density of 1100 A/cm2.A near ideal breakdown voltage of 1.6 k V was also achieved for a reverse current of up to 100 A through the use of an optimum multiple floating guard rings(MFGR) termination,which is about 87.2% of the theoretical value.The differential specific-on resistance(RSP-ON) was measured to be 3.3 m cm2,leading to a FOM(VB2/RSP-ON) value of 0.78 GW/cm2,which is very close to the theoretical limit of the tradeoff between the specific-on resistance and breakdown voltage for 4H-Si C unipolar devices.     

Design of AB2 in Galois Fields Based on Multiple-Valued Logic

A new AB~2 operation in Galois Field GF(2~4)is presented and its systolic realization based on multiple-valued logic(MVL)is proposed.The systolic structure of the operation employs multiple-valued current mode(MVCM)by using dynamic source-coupled logic(SCL)to reduce the transistor and wire counts,and the initial delay.The performance is evaluated by HSPICE simulation with 0.18μm CMOS technology.A comparison is conducted between our proposed implementation and those reported in the literature.The transistor counts,the wire counts and the initial delay in our MVL design show savings of about 23%,45%,and72%,in comparison with the corresponding binary CMOS implementation.The systolic architecture proposed is simple,regular,and modular,well suited for very large scale integration(VLSI)implementation.The combination of MVCM circuits and relevant algorithms based on MVL seems to be a potential solution for high performance arithmetic operations in GF(2~k).     

An approach to explore the eddy currents of the new type divertor for EAST device using ANSYS code

An effective method for eddy current calculation has been developed for EAST’s new divertor by using ANSYS.A 3D model of a double null divertor for the EAST device was built to evaluate eddy currents and electromagnetic(EM)forces on these components.The main input to the model is the plasma current and poloidal field coil currents,which are loaded into the model using experimental data measured from the EAST discharges.These currents generate magnetic fields that match those producing an EAST discharge,and the time variation of these fields produces the eddy currents in the divertors,along with from the resulting EM forces.In addition,the first 10 time steps were discussed for the eddy current generation and changing trend.It indicates that a static analysis before a transient mode start can solve the eddy current origination in the initial time steps.With this method,the EM transient response of EAST’s new divertor can be predicted based on ANSYS simulations.Furthermore,the method is also an effective approach to estimate the EM results for the in-vessel components of a fusion reactor during a disruption.     

Novel scheme of high precision inertial measurement for high-speed rotating carriers

In order to satisfy the requirement of high precision measurement in a high dynamic environment, a kind of gyro aided multi-accelerometer inertial measurement unit (GAMA-IMU) with six accelerometers and two gyros (6A2G) was proposed in this paper. The available configurations have the problem of low measurement precision in a high dynamic environment due to channel coupling. The three channels were decoupled when calculating the angular velocity in the proposed configuration. The yawing and pitching angular velocity were directly measured by gyros, while only the rolling angular velocity was obtained by the GAMA-IMU indirectly from the rolling angular acceleration and quadratic component of rolling angular velocity. Then a single channel rolling angular velocity calculation model was established and the extended Kalman filter (EKF) was used to do state estimation. Simulations were carried out and results indicated that the calculation precision of the proposed 6A2G configuration could meet the demand of high precision measurement for a high-speed rotating carrier.     

Electrochemically Reduced Graphene Oxide as Modified Electrode Material for Determination of Dihydroxybenzenes

A simple and green method was introduced to fabricate the electrochemical sensor based on the electrochemically reduced graphene oxide(ERGO) modified electrode. It was found that the ERGO modified electrode exhibited an excellent catalytic activity toward the oxidation of dihydroxybenzenes isomers. Under the optimum conditions, in the simultaneous determination of the dihydroxybenzene isomers, the currents were linear with the concentrations of the isomers from 5 to 550 μmol/L for hydroquinone(HQ), from 6 to 400 μmol/L for catechol(CT) and from 5 to 350 μmol/L for resorcinol(RS), respectively. In addition, the proposed sensor has good stability and reproducibility. The developed method has been applied to the simultaneous determination of dihydroxybenzene isomers in real samples with a satisfactory recovery from 98% to 103%.     

A new PMSM speed modulation system with sliding mode based on active-disturbance-rejection control

A sliding mode and active disturbance rejection control(SM-ADRC)was employed to regulate the speed of a permanent magnet synchronous motor(PMSM).The major advantages of the proposed control scheme are that it can maintain the original features of ADRC and make the parameters of ADRC transition smoothly.The proposed control scheme also ensures speed control accuracy and improves the robustness and anti-load disturbance ability of the system.Moreover,through the analysis of a d-axis current output equation,a novel current-loop SM-ADRC is presented to improve the system’s dynamic performance and inner ability of anti-load disturbance.Results of a simulation and experiments show that the improved sliding-mode ADRC system has the advantages of fast response,small overshoot,small steady-state error,wide speed range and high control accuracy.It shows that the system has strong anti-interference ability to reduce the influence of variations in rotational inertia,load and internal parameters.