A new CMOS astable multivibrator and its nonlinear analysis

We present a nonlinear analysis of a new inductively tuned astable multivibrator obtained by connecting a timing inductor across a composite nonlinear resistor with a characteristic of N‐type, which is made up of the parallel connection of two complementary pairs of cross‐coupled MOS devices. Some possible practical applications of the circuit are also envisaged. Closed‐form expressions for the amplitude and the period of the periodic oscillation are derived in both cases when the circuit exhibits a relaxation oscillation and in the more difficult case when, due to the effect of parasitic capacitances of the devices, the circuit has an almost‐discontinuous relaxation oscillation with a nonzero switching time. The accuracy of the presented formulas, which are useful for both the analysis and design, is validated through circuit simulations and experimental results. Copyright © 2009 John Wiley & Sons, Ltd.     

Hyperchaos from two coupled Wien‐bridge oscillators

This paper proposes a simple inductorless approach to generating hyperchaos by coupling two Wien‐bridge oscillators with a resistor and a diode. The whole circuit is investigated both numerically and experimentally. Also, its hyperchaotic dynamics is studied theoretically by a topological horseshoe with two‐directional expansions which provides an immediate evidence of hyperchaos. Copyright © 2007 John Wiley & Sons, Ltd.     

Truly random number generators based on non‐autonomous continuous‐time chaos

A novel non‐autonomous continuous‐time chaotic oscillator suitable for high‐frequency integrated circuit realization is presented. Simulation and experimental results, verifying the circuit feasibility, are given. Two methods for using this oscillator as the core of a random number generator are also proposed. Numerical binary data obtained according to the proposed methods pass the four basic tests of FIPS‐140‐2, while experimental data pass the full NIST‐800‐22 random number test suite. Copyright © 2008 John Wiley & Sons, Ltd.     

An inductorless CMOS quadrature oscillator continuously tuneable from 3.1 to 10.6 GHz

Modern RF front‐ends require wide tuning‐range oscillators with quadrature outputs. In this paper we present a two‐integrator quadrature oscillator, which covers the whole bandwidth of UWB applications. A circuit prototype in a 130 nm CMOS technology is continuously tuneable from 3.1 to 10.6 GHz. The circuit die area is less than 0.013mm², leading to a figure‐of‐merit FOMA of ?176.7dBc/Hz at the upper frequency. The supply voltage is 1.2 V, and the power consumption is 7 mW at the lower frequency and 13 mW at the upper frequency. Copyright © 2010 John Wiley & Sons, Ltd.     

A study of amplitude‐to‐phase noise conversion in planar oscillators

This paper explores the many interesting implications for oscillator design, with optimized phase‐noise performance, deriving from a newly proposed model based on the concept of oscillator conjugacy. For the case of 2‐D (planar) oscillators, the model prominently predicts that only circuits producing a perfectly symmetric steady‐state can have zero amplitude‐to‐phase (AM‐PM) noise conversion, a so‐called zero‐state. Simulations on standard industry oscillator circuits verify all model predictions and, however, also show that these circuit classes cannot attain zero‐states except in special limit‐cases which are not practically relevant. Guided by the newly acquired design rules, we describe the synthesis of a novel 2‐D reduced‐order LC oscillator circuit which achieves several zero‐states while operating at realistic output power levels. The potential future application of this developed theoretical framework for implementation of numerical algorithms aimed at optimizing oscillator phase‐noise performance is briefly discussed.     

Quadrature VCOs based on direct second harmonic locking: Theoretical analysis and experimental validation

We propose a theoretical analysis of the class of quadrature VCOs (QVCOs) based on two LC‐oscillators directly coupled by means of the second harmonic. The analysis provides the conditions for the existence and stability of steady‐state quadrature oscillations and a simplified model for the phase noise (PN) transfer function with respect to a noise source in parallel to the tank. We show that the figure of merit defined as the product between PN and current equals that of the single VCO, confirming that quadrature generation is achieved by this class of QVCO without degrading that figure of merit. An analytical model for the phase quadrature error due to tank mismatches is also proposed. The validity of all analytical models is discussed against numerical simulations. A practical implementation at 3.26 GHz with ±20% tuning range in a 0.13µm CMOS technology is also presented, confirming the main theoretical findings. Copyright © 2009 John Wiley & Sons, Ltd.     

A class of versatile circuits,made up of standard electrical components,are memristors

In this paper, we propose a whole class of memristor circuits. Each element from the class consists of the cascade connection between a static nonlinear two‐port and a dynamic one‐port. The class may be divided into two subclasses depending on the input variable (voltage or current). Within each of these subclasses, two further sets of memristor circuits may be distinguished according to which output voltage and current of the two‐port represents one of the system states. The simplest memristor circuits make only use of purely passive elementary components from circuit theory, an absolute novelty in this field of research. Thus they are suitable circuit primers for the introduction of the topic of memristors to undergraduate students. A sample circuit is built using discrete devices and its memristive nature is validated experimentally. In case the one‐port is purely passive, the proposed circuits feature volatile memristive behavior. Allowing active devices into the dynamic one‐port, non‐volatile dynamics may also emerge, as proved through concepts from the theory of nonlinear dynamics. Given the generality of the proposed class, the topology of the emulators may be adjusted so as to induce a large variety of dynamical behaviors, which may be exploited to accomplish new signal processing tasks, which conventional circuits are unable to perform. Copyright © 2015 John Wiley & Sons, Ltd.     

Systematic realization of a class of hysteresis chaotic oscillators

A systematic method for realizing a class of hysteresis RC chaotic oscillators is described. The method is based on direct coupling of a general second‐order sinusoidal oscillator structure to a passive non‐monotone current‐controlled non‐linear resistor. Owing to this passive non‐linearity, the power consumption, supply voltage and bandwidth limitations imposed upon the chaotic oscillator are mainly those due to the active sinusoidal oscillator alone. Tunability of the chaotic oscillator can be achieved via a single control parameter and the evolution of the two‐dimensional sinusoidal oscillator dynamics into a three‐dimensional state‐space is clearly recognized. The flexibility of this method is demonstrated by two examples using PSpice simulations and experimental results. Numerical simulations of derived mathematical models are also shown. Copyright © 2000 John Wiley & Sons, Ltd.     

Chaotic oscillator configuration using a frequency dependent negative resistor

A chaotic oscillator configuration employing a frequency‐dependent negative resistor (FDNR) as the only active element is proposed. The configuration relies on a simple two‐terminal passive device; namely a general purpose signal diode, to provide the necessary non‐linearity. The structure requires no floating elements and is independent of any circuit specific realization of the FDNR. Experimental results, PSpice simulations and numerical simulations of the derived mathematical models are included. Copyright © 2000 John Wiley & Sons, Ltd.     

Analysis and optimization of a novel biasing for constant‐gain CMOS open‐loop amplifiers

A replica biasing circuit is presented which allows open‐loop gain in CMOS amplifiers to be accurately set. The proposed solution is a new biasing which takes advantage of a triode‐biased transistor instead of the ΔV_GS approach which is the traditional one. The circuit can be applied to both RF and IF amplifiers which are based on resistive loads in order to achieve high‐frequency and/or low‐noise performance. A detailed analysis of second‐order effects is then given which emphasizes the effects due to mobility degradation, channel‐length modulation and threshold voltage mismatches. Simulated results show a good sensitivity to process variations. Copyright © 2001 John Wiley & Sons, Ltd.     

RC oscillator admits negative frequency

The humble resistance–capacitance (RC) oscillator has held our attention for nearly seven decades. During that time many improvements have been made to enhance the performance and the range of applicability. In this letter we consider further refinements that extend the frequency range to include zero, and even negative frequencies. This allows the frequency to be swept through zero with no discontinuity in phase or amplitude. We then suggest an addition to the well‐known automatic level control (ALC) circuits to linearize the control function, with attendant benefits in modeling, simulation, and implementation. Closed‐loop dynamics for the improved ALC circuit are predicted, then verified by experiment. Copyright © 2010 John Wiley & Sons, Ltd.     

Switching‐mode counterparts of the Rayleigh and Van‐der‐Pol oscillators

The present work deals with two fundamental oscillator models. One of them can be regarded as a switching‐mode counterpart of the Rayleigh oscillator, while the other can be regarded as a switching‐mode counterpart of the Van‐der‐Pol oscillator. The models are investigated by several means. Their structure is discussed by treating their circuit models. It is also shown that the related differential equations can be solved analytically and explicit forms of exact solutions are attained by employing recursive algebraic processes. The latter solutions are successfully compared to comprehensive direct simulations based on the original differential equations. Furthermore, the exhibited solutions of the switching‐mode counterparts for small and moderate values of ϵ are shown to be closely similar to the solutions of their parent oscillators. Possible applications of the present oscillatory models are discussed. It is argued that the models can favourably serve for simply representing biological and other systems that rely on oscillatory processes. Copyright © 2000 John Wiley & Sons, Ltd.     

Numerical analysis of stochastic resonance in a bistable circuit

The paper documents the construction of a novel nonlinear model of a noise‐driven, multi‐dimensional, bistable circuit employing stochastic resonance. Simulations are performed in order to characterize the various relevant device performance measures and their sensitivity to parameter values. The numerical results are considered in the context of nonlinear energy harvesting, and it is explained how the developed simulation tools could prove useful for the development of such devices. The topic of reduced‐order modelling is discussed, and it is shown that this approach leads to incorrect results. Copyright © 2016 John Wiley & Sons, Ltd.     

Parameter identification of simplified common‐mode equivalent circuit for inverter‐fed motor drive systems by applying computer‐aided optimization software

This paper deals with common‐mode (CM) electromagnetic interference (EMI) in an inverter‐fed motor drive system. A simplified CM equivalent circuit including π‐type equivalent circuit for the motor winding is proposed by using the waveform of the common‐mode current flowing in the ground conductor. Moreover, a parameter identification method applying the computer‐aided software modeFRONTIER is proposed to decide objectively the circuit parameters of the proposed simplified equivalent circuit. Validity and effectiveness of the proposed equivalent circuit are confirmed by comparing the measured impedance characteristics with the calculated ones. Finally, the possibility of a nonlinear phenomenon is discussed in this system. It is shown that the accuracy of simulation result can be improved by introducing the nonlinear element. © 2015 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

A numerical model for the oscillation frequency,the amplitude and the phase‐noise of MOS‐current‐mode‐logic ring oscillators

This paper presents a new model for the frequency of oscillation, the oscillation amplitude and the phase‐noise of ring oscillators consisting of MOS‐current‐mode‐logic delay cells. The numerical model has been validated through circuit simulations of oscillators designed with a typical 130 nm CMOS technology. A design flow based on the proposed model and on circuit simulations is presented and applied to cells with active loads. The choice of the cell parameters that minimize phase‐noise and power consumption is addressed. Copyright © 2009 John Wiley & Sons, Ltd.     

Current mode CCII oscillators using grounded capacitors and resistors

New realizations of grounded C, grounded R current mode oscillators using the current conveyor (CCII) are given. The proposed oscillators are classified into two classes depending on the number of feedback loops. In class I, there is a single current feedback loop, whereas in class II, there are two current feedback loops. Class I includes two types and it employs two CCIIs, three capacitors and three or four resistors. Class II employs two CCIIs having two-outputs each, two capacitors and three resistors and has independent control on the condition of oscillation and on the frequency of oscillation by varying two alternative resistors. PSpice simulations are included. Exact analysis based on the parasitic elements of the CCII is carried out indicating that class I has a third order characteristic equation. Class II has the advantage that the effects of the parasitic elements of the CCIIs can be absorbed in the circuit components. © 1998 John Wiley & Sons, Ltd.     

A study of parallel tuner with voltage‐dependent capacitance

A study of varactor tuned LC circuits is presented. Nonlinear time domain circuit differential equation is rewritten in terms of phase plane variables, which can then be solved in closed form. General expressions are derived, which are applicable to any capacitance–voltage relationship. Two types of circuit structures, namely single‐ended and balanced, with MOS diodes as the variable capacitance elements, are specifically considered. The nature of the voltage waveforms across the two circuits is determined by phase plane plots. Variation of voltage with time is calculated numerically. It is shown that the voltage waveform for the single‐ended circuit is asymmetric, with higher harmonics present. Furthermore, the fundamental resonant frequency is dependent on amplitude of oscillation and could decrease to 94% of its small signal value for large voltage swings. Near 34% control over frequency is calculated, for a bias voltage range of 8 to 1. On the other hand, the balanced structure results in symmetric voltage waveform, with negligible harmonic content. Dependence of frequency on amplitude is weak, only decreasing to 98% of its small signal value, for the largest swings. The tuning range is marginally improved by the balanced structure. The results are compared with those obtained from Fourier‐based calculations and experimental data in literature, and good agreement is obtained. Copyright © 2011 John Wiley & Sons, Ltd.     

The design and implementation of a multi‐wing chaotic attractor based on a five‐term three‐dimension system

The last two decades have seen great progress about the generation and circuit realization of multi‐wing chaotic attractor. In this paper, several multi‐scroll chaotic attractors are generated from a five‐term system by adding a piecewise linear function. Moreover, some basic properties in terms of symmetry and dissipation, equilibrium points, eigenvalues of the Jacobian matrices, Lyapunov exponent spectrum, bifurcation diagram, and Poincaré map are studied. In particular, an analog circuit is designed to implement the proposed multi‐scroll attractors, which are different from the traditional attractors. Furthermore, an integrated circuit diagram is designed to realize the fractional‐order multi‐scroll attractors. Finally, the performed experimental results confirm the theoretical analysis, and our work lends itself to many potential applications in engineering. Copyright © 2015 John Wiley & Sons, Ltd.     

A minimum five‐component five‐term single‐nonlinearity chaotic jerk circuit based on a twin‐jerk single‐op‐amp technique

A minimum 5‐component 5‐term single‐nonlinearity chaotic jerk circuit is presented as the first simplest chaotic jerk circuit in a category that a single op‐amp is employed. Such a simplest circuit displays 5 simultaneous advantages of (1) 5 minimum basic electronic components, (2) 5 minimum algebraic terms in a set of 3 coupled first‐order ordinary differential equations (ODEs), (3) a single minimum term of nonlinearity in the ODEs, (4) a simple passive component for nonlinearity, and (5) a single op‐amp. The proposed 5‐term single‐nonlinearity chaotic jerk circuit and a slightly modified version of an existing 6‐term 2‐nonlinearity chaotic jerk circuit form mirrored images of each other. Although both mirrored circuits yield 2 different sets of the ODEs, both sets however can be recast into a pair of twin jerk equations. Both mirrored circuits are therefore algebraically twin 5‐component chaotic jerk circuits, leading to a twin‐jerk single‐op‐amp approach to the proposed minimum chaotic jerk circuit. Two cross verifications of trajectories of both circuits are illustrated through numerical and experimental results. Dynamical properties are also presented.     

一种新的三绕组自耦变压器的非线性建模

自耦变压器的精确建模在分析变压器运行于磁饱和区域的特性时至关重要。从单相三绕组自耦变压器的电磁关系入手,推导出折算到高压侧的三绕组自耦变压器的等效电路。给出模型中的线性绕组漏阻抗参数和非线性激磁阻抗参数的计算方法,并详细介绍了利用磁等值回路图得到激磁电抗非线性电感的方法。然后给出了利用JA磁滞模型编程实现非线性电感的方法。最后通过FORTRAN语言在PSCAD中搭建三绕组自耦变压器模型。仿真结果验证了所建模型能够准确地反映自耦变压器的非线性特性。