共查询到18条相似文献,搜索用时 109 毫秒
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H桥级联作为STATCOM主电路拓扑的主要结构,其调制策略是衡量STATCOM输出性能的一个重要指标。通过构建21电平H桥级联主电路结构并搭建载波移相(SPWM)和载波层叠式(SPWM)调制仿真模块。仿真结果表明载波移相调制能平衡各功率单元,但导致开关信号谐波增大;层叠波脉宽调制输出电压谐波低于载波调制,但各功率单元不平衡,易损坏开关器件。针对两种调制策略的优缺点提出了一种新的载波移相层叠波调制策略。仿真验证表明载波移相层叠波SPWM调制策略能够有效平衡功率单元和能降低开关信号的谐波含量。 相似文献
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针对已有调制策略应用于级联H桥型(CHB)逆变器中时存在的不足,结合载波移相(CPS)和载波同相层叠(PD)调制策略的优点,提出一种基于载波重构的新型功率均衡调制策略。所提调制策略通过对改进的CPS调制策略中三角载波进行重构,得到一种仍然保留载波移相特征的新型载波排列方式,且采用新型载波排列方式进行调制,逆变器输出电压谐波特性与PD调制策略下的完全一致。因此,在所提的新型功率均衡调制策略下,可以实现级联单元输出功率自均衡,同时可以有效改善逆变器输出线电压谐波特性。本文以三单元级联H桥型逆变器为例研究载波重构方法,分析新型功率均衡调制策略原理及功率均衡所需时间,并通过仿真和实验验证了理论分析的正确性和调制策略的可行性。 相似文献
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基于载波相移角度的级联型多电平变频器输出性能的研究 总被引:22,自引:0,他引:22
载波相移PWM技术应用于级联型多电平变频器可以在较低的器件开关频率下实现较高开关频率的效果,从而提高其输出性能,但是不同的载波相移角度,输出性能并不完全一样,因此对载波相移PWM技术的相移角度同级联型多电平变频器输出性能进行了研究。该文通过数学推导和理论分析,得出载波移相180°/N和360°/N两种移相方式的输出性能同级联数目的奇偶数有关,当级联数目为奇数时,两者输出性能相差不大,但当级联数目为偶数时,两者的输出电压电平数,等效开关频率及谐波范围均不一样,载波移相180°/N方式比360°/N移相方式优,更适合工程应用。最后通过大量的仿真和实验验证了理论分析及相关结论的正确性。 相似文献
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级联H桥多电平逆变器适用于各种高电压、大电流的场合;载波移相正弦脉宽调制(CPS-SPWM)技术易于实现,等效载波频率高,已成为级联多电平逆变器使用最广泛的调制方法。采用了一种可节省硬件资源的改进型载波移相调制方式,在对其调制原理进行详细分析的基础上,利用PSCAD/EMTDC软件搭建级联H桥多电平逆变器的软件仿真模型,结合基于IPM模块实现的物理实验系统,研究了载波频率对逆变器输出电压谐波特性的影响。仿真及实验结果均表明改进型CPS-SPWM技术能够使逆变器的输出电压波形趋近正弦波,并降低其畸变率。 相似文献
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《高电压技术》2017,(1)
基于载波移相(CPS)调制的H桥级联型(CHB)有源电力滤波器(APF)是中高压系统谐波治理的有效手段。分析并指出了级联型拓扑在输出谐波电流时存在的源性谐波能量不均问题。当输出的谐波电流频率与单元输出电压中某一开关谐波频率一致时,将产生功率耦合,导致单元直流电容电压发散。针对性地提出了一种载波频率优化方法:通过引入载波频率偏移量,实现了单元输出电压开关谐波与APF输出谐波电流的功率解耦;讨论了不同的载波偏移量对电容电压波动的影响,并给出了最优频率偏移量计算方法。对比了载波频率优化方法和传统载波轮换方法抑制源性谐波能量不均的效果,体现了载波频率优化方法的优越性。仿真和现场应用证明了所提方法能够有效地防止直流侧电压的发散并将波动抑制在最小值。 相似文献
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载波移相(CPS-PWM)应用于级联H桥型(CHB)多电平逆变器时,虽然各级联单元具有功率均衡的特点,但输出电压的直流电压利用率较低,且低调制度时谐波性能比较差。针对这2个问题,提出一种改进的CPS-PWM调制技术,该调制技术基于载波形状自由度,利用改进的载波代替原CPS-PWM中的三角形载波进行调制,通过状态空间平均法计算出在改进后的载波下逆变器输出电压的基波幅值和各个级联单元的输出电压,并和逆变器在CPS-PWM技术下的输出电压对比分析,改进的CPS-PWM技术可以显著地提高输出电压的直流电压利用率,改善低调制度的谐波性能,且和CPS-PWM技术一样,各级联单元输出功率能够实现自然均衡。该调制技术以CHB型五电平逆变器为例,通过实验、仿真验证了该技术的正确性。 相似文献
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基于不对称规则采样法的级联H桥型变流器CPS-SPWM输出电压谐波特性分析 总被引:1,自引:0,他引:1
对基于不对称规则采样法的级联H桥型多电平变流器的CPS-SPWM输出电压的谐波特性进行了分析研究。通过理论分析、仿真和实验验证,得出以下结论:在三角载波频率ωc远大于调制波频率时,N级联变流器的CPS-SPWM输出电压的基波分量在相位上滞后正弦调制波1/4个载波周期;谐波主要分布在偶数倍的Nωc附近,且呈奇数次分布。 相似文献
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《电网技术》2016,(7)
级联H桥逆变器能够显著提高器件的等效工作频率,降低补偿电压谐波畸变率。然而,单极性、双极性载波水平移相正弦脉宽调制(carrier phase-shifted sinusoidal pulse width modulation,CPS-SPWM)的输出性能与调制比关系密切。通过理论分析,得出了单极性、双极性CPS-SPWM的调制比与输出电平数的关系,阐明了双极性调制下,正负电平抵消原理;提出了特定补偿深度下,采用单极性、双极性CPS-SPWM时,输出期望电平数目的直流侧电压选择方法;通过PSCAD/EMTDC仿真软件搭建模型,验证了调制比与输出电平数分析的正确性以及直流侧电压选择方法的有效性。 相似文献
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In this article, a new basic unit for cascaded multi-level inverter is proposed. This inverter is able to increase the number of output voltage levels and reduces the number of power electronic devices. To generate all voltage levels at the output, five different algorithms to determine the magnitude of DC voltage sources are suggested. This inverter is compared with conventional cascaded multi-level inverters. The comparisons show that the proposed topology needs fewer DC voltage sources and power switches, less variety of the magnitude of DC voltage sources, and smaller amounts of blocked voltage by switches. As a result, the installation space and total cost of the inverter decrease. As it is impossible to use charge balance control methods for the asymmetric cascaded multi-level inverters, the developed topology based on the proposed cascaded inverter–the sub-symmetric topology with the usability of charge balance control methods–is proposed. A new algorithm is proposed to determine the magnitude of DC voltage sources. In addition, full-wave and half-wave charge balance control methods are applied in the proposed developed topology. The accurate performance of the proposed topology by applying charge balance control methods is verified through the simulation and experimental results of an 81-level sub-symmetric inverter. 相似文献
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为解决现有非对称级联多电平逆变器存在低压单元电流倒灌和输出电平数少的问题,提出一种基于开关电容电路的混合级联多电平逆变器。首先,在两单元非对称级联H桥型逆变器的低压单元中嵌入一个开关电容电路,有效避免了低压单元电流倒灌,且输出电平数得以增加。然后,为减少所提方案应用于三相系统时所需直流电源的数量,提出了用三电平中点箝位型或T型逆变器电路作为高压单元的三相混合级联多电平逆变器拓扑。之后,针对所提逆变器拓扑的特性,提出了含有移相载波和层叠载波的混合调制策略,在满足逆变器输出高质量正弦脉宽调制电压波形的同时,有效减小了开关电容电压纹波和开关器件的切换频率及开关应力。最后,通过实验验证了所提混合级联多电平逆变器拓扑及调制策略的可行性。 相似文献
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Recent trends in the multi-level inverter (MLI) technology demand reduced number of switches, driver circuits, isolated DC sources, peak inverse voltage (PIV), appreciable number of voltage level, and lower total harmonic distortion. This paper presents an improved cascaded MLI configuration. Each module comprises ten switches, two isolated DC sources, and two capacitors; it can generate a maximum of 9-level output voltage waveform. Optimized switching sequence is developed that ensures minimum switching transitions and is implemented through single-carrier pulse width modulation for the control of the proposed topology. The classical cascaded H-bridge inverter and some recently developed MLI configurations were compared with the proposed inverter circuit. Results show that the proposed inverter configuration generates high number of output voltage levels with reduced number of power switches and PIV. It also has a lower per-unit power loss profile. Unit capacitor voltage balancing scheme is developed, which ensures proper control of the unit step voltage level in each of the cascaded modules, at extreme loading condition. For two cascaded inverter modules, simulation and experimental verifications are carried out on the proposed inverter for an R–L load. Simulation results of the output voltage waveforms and its harmonic spectrum are in conformity with experimental results. 相似文献
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Charles Ikechukwu Odeh 《电力部件与系统》2015,43(1):1-9
Abstract—This article presents a sinusoidal pulse-width modulated three-phase multi-level inverter topology. In this configuration, the basic two-level, three-phase inverter is modified to synthesize higher voltage levels by the insertion of two auxiliary switches per phase leg. The multi-level inverter configuration generates output voltage levels similar to the corresponding well-known conventional diode-clamped flying capacitors and cascaded H-bridge inverters but with fewer power circuit components and more simplicity. For output voltage and frequency variations demanded by such applications as variable-speed drives, active power filters, photovoltaic power conversions, etc., the sinusoidal pulse-width modulation technique is employed in the generation of the gating signals for the proposed three-phase multi-level inverter. A balanced three-phase R-L load is applied at the inverter output terminals, and the inverter performance is compared with that of other sinusoidal pulse-width modulated conventional multi-level inverter configurations. The validity of the proposed multi-level inverter topology and the modulation scheme are verified through simulations and experiments. 相似文献