共查询到18条相似文献,搜索用时 312 毫秒
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随着信号传输速度的提高,高速信号抗干扰能力也越来越低,人们对信号可靠性有了更高的要求.为了抵抗高速信号在传输过程中因为各种干扰而产生误码,人们提出了纠错编码理论.其中汉明码是最早提出的一类纠错编码,具有译码电路简单,译码延时小的优点,但是其只能纠正一位随机错误.为了提高汉明码的纠错能力,结合其译码优点,利用交织的方式设计了一种交织汉明码.根据循环汉明码的生成多项式,设计了并行输出的汉明码编码器和具有双译码电路的译码器,并利用移位寄存器设计了交织器和解交织器,构成了交织汉明码编译码电路.基于FPGA实现该交织汉明码编译码器,行为仿真结果表明,该交织汉明码大大提高了汉明码的纠错能力. 相似文献
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数字基带信号的传输是数字通信系统的一个重要组成部分,HDB3编码是数字基带信号传输中常用的传输码型.本文介绍了HDB3编码规则,提出了一种基于EPM3128实现编译码的方法,该方法具有成本低、电路简单、执行速度快、升级方便等特点.同时由于CPLD可重复编程的特点,可以对它进行在线修改,便于设备的调试和运行.此编译码器已... 相似文献
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分组乘积Turbo码 (简称TPC码)是一类将分组码进行串行级联,并采用分组交织器构成的级联码,是一种构造十分简单的纠错码,它是香农信息理论提出后第一个在非零码率时可以实现无误码传输的纠错编码.采用迭代译码方法,可发挥该码的良好性能,并特别适合于高速硬件译码.良好的纠错性能使得TPC码正在被广泛的应用.本文首先对TPC码的编码结构和译码算法进行介绍,其后对TPC码的动态迭代译码进行分析与仿真,最后对其算法提出了优化方法. 相似文献
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针对目前LVDS(Low Voltage Differential Signal)在高速传输过程中容易出现的误码和丢数现象,分别从硬件和逻辑两方面对传输接口进行了优化设计。硬件方面,在发送端增加高速驱动器,驱动双绞线电缆,同时在接收端采用均衡器,补偿信号在长距离传输过程中出现的衰减;逻辑方面,通过增加标志位避免失锁,减少数据发生误码和丢数问题。优化后的LVDS接口,相比于RS-232和RS-485接口,具有更高的通信速率,同时达到更远的通信距离,该接口设计简易,低功耗,性能稳定,无误码和丢数现象,经测试,优化后的LVDS接口,能以120 Mbps的通信速率实现48 m双绞长线稳定可靠传输。 相似文献
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基于FPGA的异步FIFO缓存设计 总被引:2,自引:1,他引:1
介绍了异步FIFO的类型以及工作原理,研究了使用用FPGA芯片内部的双口RAM来实现异步FIFO设计方案,重点阐述了如何判断空/满标志信号以及消除亚稳态的设计思路。针对多位跨时钟域的数据传输,可能出现亚稳态导致数据出现不可知的错误,讨论了通过格雷码对读写地址进行编码以用来减少亚稳态出现的概率,并给出了具体的程序流程图,进行了仿真验证。这种方法设计的异步FIFO具有高速,高可靠性,移植性强的特点。 相似文献
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针对遥感相机系统小型化和高速数据可靠传输的需求,本文从物理硬件和传输协议两个方面进行研究,设计出了一种应用高速串行/解串器(SERDES)与FPGA编写高速串行信号全时双工通信协议相互配合的高速数据传输系统.通过伪随机码传输测试,实现了以12.5 Gbit/s为最高速率的1013数量级比特数据无误码的稳定、可靠的串行传输.该设计相比于采用传统SERDES的数传系统传输速率更快、可靠性更高,为解决高分辨率遥感相机设备间的数据传输速率不足提供了一种设计方案. 相似文献
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可靠的深海远程通信技术在水下安全和海洋开发等方面扮演着重要的角色,其中有缆遥传短节是系统的关键组成部分.介绍了深海地层测试有缆遥传短节系统结构及其编解码调制解调的基本原理,在对比分析了数据传输特点后,使用OFDM+曼彻斯特码代替目前常用的OFDM+AMI码的编码方式,以曼彻斯特码中丰富的时钟信号来提高在深海地层测试信道环境中高速数据传输时解码端的解码准确率.然后通过自顶向下模块划分的设计方法给出了在现场可编程门阵列上遥传短节系统的硬件实现方案,在高性能FPGA上分别设计了OFDM调制解调器、曼彻斯特码调制解调器及相应的传输耦合电路来构建OFDM码与曼彻斯特码编码转换的遥传短节系统.最后通过综合仿真,验证了系统能稳定运行,也验证了设计方法的可行性. 相似文献
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基于USB2.0的半导体激光雷达数据传输接口的设计与实现 总被引:4,自引:0,他引:4
高速数据传输接口是半导体激光成像雷达系统的重要组成部分.简要地介绍了基于USB2.0总线的半导体激光雷达数据传输接口的开发过程,系统地阐述了半导体激光雷达数据传输接口的软硬件设计.实验结果表明,该传输接口工作稳定,平均传输速度达到48Mb/s,能够较好地满足半导体激光雷达图像的实时传输要求. 相似文献
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丁明亮 《国外电子测量技术》2013,(12):84-86,91
导弹伺服机构和弹载计算机在数据交互过程中,由于噪声的影响造成数据传输出现错误.针对这一问题,采用修正海明码实现1个检错纠错模块,该模块集成在数字信号处理器内部,实现检测数据单元的2 bits错误,检测定位并纠正数据单元的1 bit错误.通过计算分析,采用检错纠错模块后一个22 bit传输数据单元出现错误的概率减小了5个数量级.该模块可以极大降低数据在传输过程中出现错误的概率,同时易于集成、工程实用性强. 相似文献
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Hans‐Jürgen Zepernick 《International Journal of Adaptive Control and Signal Processing》2002,16(8):577-588
The evolution of digital mobile communications along with the increase of integrated circuit complexity has resulted in frequent use of error control coding to protect information against transmission errors. Soft decision decoding offers better error performance compared to hard decision decoding but on the expense of decoding complexity. The maximum a posteriori (MAP) decoder is a decoding algorithm which processes soft information and aims at minimizing bit error probability. In this paper, a matrix approach is presented which analytically describes MAP decoding of linear block codes in an original domain and a corresponding spectral domain. The trellis‐based decoding approach belongs to the class of forward‐only recursion algorithms. It is applicable to high rate block codes with a moderate number of parity bits and allows a simple implementation in the spectral domain in terms of storage requirements and computational complexity. Especially, the required storage space can be significantly reduced compared to conventional BCJR‐based decoding algorithms. Copyright © 2002 John Wiley & Sons, Ltd. 相似文献
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We demonstrate an integrated-optic encoder/decoder for time-spreading/wavelength-hopping optical code division multiple access. It is composed of a wavelength multi/demultiplexer and variable delay lines fabricated by using silica-based planar lightwave circuit technology. We evaluated the device characteristics, including those of the key components and the encoding/decoding operation, and confirmed its flexible code assignment ability and good auto/cross correlations. We then tested the performance of the encoder/decoder by undertaking bit error rate measurements with 10-Gb/s pseudorandom binary sequence signals and confirmed its applicability to optical layer multicast routing and its ability to compensate for bit skew caused by fiber chromatic dispersion. 相似文献
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21位光电编码器数据处理系统 总被引:4,自引:2,他引:2
为了减少绝对式光电编码器的体积,增强编码器的数据处理能力,设计了一种21位光电编码器数据处理系统。该编码器码盘采用矩阵码盘形式,分为粗码和精码,粗码12位,其中一位校正码道,精码为一周4096对线。数据处理部分采用DSP芯片和AD转换器相结合,将所有码道的信息全部输入到AD转换器,DSP根据AD转换器的值将原始信号转换为21位编码器的角度信息并显示。该编码器外径为160mm,采用自准直仪和正17面体对该编码器精度进行检测,精度均方差为1.09s。 相似文献
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《Potentials, IEEE》2001,20(1):29-31
The article discusses systematic cyclic linear block codes. A block code uses an encoder that accepts a block of message symbols, and generates a block of code word symbols at the output. This type is in contrast to a convolutional code when the encoder accepts a continuous stream of symbols and similarly generates a continuous encoded output stream. A code is linear if the addition of any two valid code words results in another valid code word. Similarly, a code is cyclic if a circular shift of any valid code word results in another valid code word. The term systematic is used for codes in which the code word contains the message symbols in an unaltered form. Systematic code words are formed by appending additional symbols to the message. These additional symbols are called redundancy or parity symbols. The term symbols as used in this article denotes the individual elements of a code word. In a binary code, the symbols are bits and in a non-binary code, the symbols are collections of bits (e.g., bytes) 相似文献
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Forward error correction based on block turbo code with 3-bit soft decision for 10-Gb/s optical communication systems 总被引:1,自引:0,他引:1
Mizuochi T. Miyata Y. Kobayashi T. Ouchi K. Kuno K. Kubo K. Shimizu K. Tagami H. Yoshida H. Fujita H. Akita M. Motoshima K. 《IEEE journal of selected topics in quantum electronics》2004,10(2):376-386
The first experimental demonstration of a forward error correction (FEC) for 10-Gb/s optical communication systems based on a block turbo code (BTC) is reported. Key algorithms, e.g., extrinsic information, log-likelihood ratio, and soft decision reliability, are optimized to improve the correction capability. The optimum thresholds for a 3-bit soft decider are investigated analytically. A theoretical prediction is verified by experiment using a novel 3-bit soft decision large scale integrated circuit (LSI) and a BTC encoder/decoder evaluation circuit incorporating a 10-Gb/s return-to-zero on-off keying optical transceiver. A net coding gain of 10.1 dB was achieved with only 24.6% redundancy for an input bit error rate of 1.98/spl times/10/sup -2/. This is only 0.9 dB away from the Shannon limit for a code rate of 0.8 for a binary symmetric channel. Superior tolerance to error bursts given by the adoption of 64-depth interleaving is demonstrated. The ability of the proposed FEC system to achieve a receiver sensitivity of seven photons per information bit when combined with return-to-zero differential phase-shift keying modulation is demonstrated. 相似文献