Zero-current Switching Series Resonant High-voltage DC-DC Converter with Series-connected Primary Windings of Center-tapped Transformer

Abstract—This article proposes a novel zero-current switching series resonant inverter-fed voltage multiplier based high-voltage DC-DC converter. The series resonant inverter in the proposed topology has two power switches (insulated-gate bipolar transistors), two resonant capacitors, and only one high-voltage transformer with center-tapped primary windings. The power switches are connected in the form of a half-bridge network. The leakage inductances of the transformer's primary windings together with resonant capacitors form two series resonant circuits. The series resonant circuits are fed alternately by operating power switches with an interleaved half-switching cycle. The secondary winding of the high-voltage transformer is connected to a voltage multiplier circuit to rectify and boost the voltage. The converter operates in discontinuous conduction mode, and its output voltage is regulated by pulse-frequency modulation. Therefore, all the power switches turn ON and OFF at the zero-current switching condition. The main features of the proposed converter are lower power loss, less cost, and smaller size compared to previously proposed series resonant high-voltage DC-DC converters. The experimental results of a 130-W prototype of the proposed converter are presented both for dynamic and steady-state operation. The results confirm the excellent operation and performance of the converter.     

多电平变换器开关管的光纤隔离驱动保护电路

为解决开关器件在多电平高压功率变换器的驱动和保护问题,提出了一种光纤隔离的驱动保护电路。该电路与传统的驱动电路相比,隔离电压高,用光传递驱动信号不受电路的电磁干扰。电路在开关管过流时能识别是否真过流并实现驱动脉冲的慢关断,提高了电路安全性。实验结果证明,该电路正确可行。     

An accurate reference-generating circuit for successive approximation current mode A/D converters

As pressures increase on VLSI designers to use a lower supply voltage of 3.3 V rather than the present 5 V, current mode signal-processing techniques will surely become increasingly important and attractive. This paper presents the design of a reference-generating (RG) circuit which employs a current mode divide-by-two circuit. Current dividers are usually implemented by using resistor networks or weighted transistors. the division accuracy of such solutions is limited by resistor or transistor mismatch. In this study the proposed divide-by-two circuit does not rely on well-matched components and high-gain op amps to achieve high accuracy. This paper also addresses the relationship among the operation and accuracy of the division process, the transistor mismatch and the resolution of a converter which employs the RG circuit. the proposed RG circuit can be implemented not only for medium-speed successive approximation current mode A/D converters but also for A/D converter arrays achieving a high conversion rate.     

A 1.2 V 83 dB DR single‐ended input SC ΔΣ modulator including a large‐swing analog buffer for portable ECG applications

This study proposes a subsystem consisting of an analog buffer and a single‐ended input to a fully differential ΔΣ modulator to obtain low‐power consumption for portable electrocardiogram applications. With the proposed subsystem, the need for an inverting amplifier is avoided, and low‐power consumption is achieved. The ΔΣ modulator with a second order, 1 bit, and cascade of integrators feedforward structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a digital‐to‐analog converter feedback circuit to reduce the effect of the reference voltage, reduce the amplifier requirements, and obtain low‐power consumption. Input‐bias and output‐bias transistors working in the weak‐inversion region are implemented to obtain an extremely large swing for the analog buffer. At a supply voltage of 1.2 V, signal bandwidth of 250 Hz, and sampling frequency of 128 kHz, the measurement results show that the modulator with a buffer achieves a 77 dB peak signal‐to‐noise‐distortion ratio, an effective‐number‐of‐bits of 12.5 bits, an 83 dB dynamic range, and a figure‐of‐merit of 156 dB. The total chip size is approximately 0.28 mm² with a standard 0.13 µm Complementary Metal‐Oxide‐Silicon (CMOS) process. Copyright © 2016 John Wiley & Sons, Ltd.     

串并联谐振倍压变换器高压电源的设计与研究

为了满足高电压小电流特别是小体积的要求,设计了一种软开关变换器(串并联谐振倍压变换器)的技术方案。该变换器的优点在于利用谐振元件吸收了电路寄生参数,消除了电路寄生振荡。并实现开关管的零压开通。同时利用倍压整流技术,解决了传统高压电源方案中升压变压器升压倍数大、体积笨重、制作难度大的问题。与传统的串并联谐振变换器相比,该变换器采用容性滤波模式,使串并联谐振变换器在高压小电流的应用中得以实现。简要分析了该变换器在工作负载时的工作原理,并利用正弦交流法建立了系统数学模型,绘出了变换器的输出特性曲线图。提出了一种适用于LCC谐振倍压电路的参数设计方法。实验结果证明了该新型变换器原理和理论分析的正确性。     

Design of a Pulsewidth-Modulated Resonant Converter for a High-Output-Voltage Power Supply

The design and fabrication of a parallel resonant converter circuit and a high-frequency step-up transformer used to supply an adjustable dc voltage to a load is described. The 500-W system is operated from 115/230 V single-phase 60-Hz power, which is rectified and filtered to form a 310-V dc link. A two-transistor half-bridge circuit operating at a fixed frequency above the circuits resonant frequency converts the dc voltage to an ac voltage at approximately 20 kHz. This high-frequency voltage is transformed with a low-capacitance oil-impregnated ferrite transformer. The output voltage is rectified to form a dc voltage with a maximum value of 90-kV peak. The output voltage is adjustable using pulsewidth modulation of the conduction time of the two transistors in the power circuit. The energy stored in the resonant circuit provides a sinusoidal transformer voltage at fixed frequency over a wide range of control. The system is provided with a closed-loop peak-voltage regulator and an on-off capability from the control electronics. The transformer is designed for a specific value of inductance and capacitance to operate at the desired resonant frequency and characteristic impedance.     

A 5.25‐V‐tolerant bidirectional I/O circuit in a 28‐nm CMOS process

A 5.25‐V‐tolerant bidirectional I/O circuit has been developed in a 28‐nm standard complementary metal‐oxide‐semiconductor (CMOS) process with only 0.9 and 1.8 V transistors. The transistors of the I/O circuit are protected from over‐voltage stress by cascode transistors whose gate bias level is adaptively controlled according to the voltage level of the I/O pad. The n‐well bias level of the p‐type metal‐oxide‐semiconductor transistors of the I/O circuit is also adapted to the voltage level of the I/O pad to prevent any junction leakage. The 5.25‐V‐tolerant bidirectional I/O circuit occupies 40 µm × 170 µm of silicon area. Copyright © 2014 John Wiley & Sons, Ltd.     

High-voltage DC-DC converter for new-generation electric locomotives

Existing dc high-power locomotives at standard input voltages of 3 kV or 1.5 kV can be connected to high-voltage contact systems operated at a level of dc voltage that is n times higher via a novel n-cell capacitor, switching, bidirectional converter. Each cell voltage is defined by the locomotive power train DC input level, thus, the balancing of capacitor voltages is not required. PSIM-simulation has confirmed the positive properties of the scheme.     

无交流电容的构网型换流器电压电流比例控制及故障限流

通过引入电压电流比例关系,构建了适用于高压构网型换流器的无电容矢量电压控制,可与传统内环电流控制组成构网型换流器级联控制架构,保留正序电流限幅和负序电流抑制能力,防止换流器在电网故障时发生过流闭锁和损坏。与传统外环电压控制不同,该电压电流比例控制不依赖于交流侧并联容性滤波器的电气关系构建,适用于无交流电容的高压构网型换流器的外环电压控制。通过选取特定的交流电压频率指令值,构网型换流器可实现恒电压运行或虚拟同步机运行。时域仿真结果表明,所提高压构网型换流器控制在电网故障时可自动实现换流器的负序电流抑制和故障穿越功能,避免换流器过流闭锁及损坏,并在故障清除后恢复正常运行。     

采用辅助变压器的全占空比调节三电平AC/AC变换器

高压大功率变换场合下,传统三电平AC/AC变换器需要同时控制输出电压和飞跨电容电压,使得控制电路相对复杂,且输出电压和负载范围受到限制。为此提出了一种采用辅助变压器的全占空比调节三电平AC/AC变换器,其飞跨电容电压由辅助变压器直接供给,无需通过其他控制电路进行调节。该变换器只有输出电压1个控制对象,其控制简单、易于实现,可全占空比满幅调节输出电压,且辅助变压器的容量很小,只需略大于飞跨电容的无功负载。详细分析了电路工作原理,并研制了原理样机。实验结果表明,采用简单的控制电路就可实现三电平AC/AC变换器的全占空比满幅调节。