Evaluation of plasma deposited silicon nitride thin films for microsystems technology

Plasma deposited silicon nitride thin films were deposited at temperatures between 150/spl deg/C and 300/spl deg/C. Diagnostic microstructures were fabricated from the thin films using bulk micromachining, and the strain was calculated from optical measurement of postbuckling deflection. The results indicate that the residual strain of the thin films is dominated by film-substrate thermal mismatch, with the coefficient of thermal expansion monotonically increasing with decreasing deposition temperature. Metal-insulator-metal devices of variable area were also fabricated to measure the dielectric constant, which was shown to be independent of deposition temperature. The importance of these results to microsystems technology (MST) was briefly discussed.     

Microbridge testing on symmetrical trilayer films

In this paper, we extended the microbridge testing method to characterize the mechanical properties of symmetrical trilayer thin films. Theoretically, we analyzed the deformation of a trilayer microbridge sample with a deformable boundary condition and derived load-deflection formulas in closed-form. The slope of a load-deflection curve under small deformation gives the relationship between the bending stiffness and the residual force of a trilayer microbridge. Taking this relationship, we were able to assess simultaneously the Young's modulus of two kinds of materials composing the symmetrical trilayer film and the thickness-averaged residual stress of the film. Experimentally, we fabricated symmetrical trilayer microbridge samples of SiO/sub 2//Si/sub 3/N/sub 4//SiO/sub 2/ on 4-inch p-type (100) silicon wafers and conducted the microbridge tests with a load and displacement sensing nanoindenter system equipped with a microwedge indenter. The experimental results verified the proposed microbridge testing method. The thickness-averaged residual stress of the 1.1-/spl mu/m trilayer thin films was determined to be 8.8 MPa, while the Young's modulus of the 0.3-/spl mu/m silicon oxide layers and the Young's modulus of the 0.5-/spl mu/m silicon nitride layer were evaluated to be 31 GPa and 294 GPa, respectively.     

Wafer-level mechanical characterization of silicon nitride MEMS

The mechanical and physical properties of silicon nitride thin films have been characterized, particularly for their application in load-bearing MEMS applications. Both stoichiometric (high-stress) and silicon-rich (low-stress) films deposited by LPCVD have been studied. Young's modulus, E, has been determined using conventional lateral resonators and by bulge testing of membranes, and tensile strength has been determined using a specially designed microtensile specimen. All microdevices have been fabricated using standard micromachining. We have also measured the thermal expansion coefficient of stoichiometric silicon nitride. Our best estimate of E is 325/spl plusmn/30 GPa for stoichiometric and 295/spl plusmn/30 GPa for silicon-rich silicon nitride. The average tensile strength for the stoichiometric material is 6.4/spl plusmn/0.6 GPa, while that for the silicon-rich material is 5.5/spl plusmn/0.8 GPa; the burst strength of membranes of the stoichiometric material is 7.1/spl plusmn/0.2 GPa.     

Evaluation of elastic properties and temperature effects in Si thin films using an electrostatic microresonator

Laterally driven microresonators were used to estimate the temperature-dependent elastic modulus of single-crystalline Si for microelectromechanical systems (MEMS). The resonators were fabricated through surface micromachining from silicon-on-glass wafers. They were moved laterally by alternating electrostatic force at a series of frequencies, and then a resonance frequency was determined, under temperature cycling in the range of 25/spl deg/C to 600/spl deg/C, by detecting the maximum displacement. The elastic modulus was obtained in the temperature range by Rayleigh's energy method from the detected resonance frequency. At this time, the temperature dependency of elastic modulus was affected by surface oxidation as well as its intrinsic variation: a temperature cycle permanently reduces the resonance frequency. The effect of Si oxidation was analyzed for thermal cycling by applying a simple composite model to the measured frequency data; here the oxide thickness was estimated from the difference in the resonance frequency before and after the temperature cycle, and was confirmed by field-emission scanning electron microscopy. Finally, the temperature coefficient of the elastic modulus of Si in the <110> direction was determined as -64/spl times/10/sup -6/[/spl deg/C/sup -1/]. This value was quite comparable to those reported in previous literatures, and much more so if the specimen temperature is calibrated more exactly.     

Effect of trimethylsilane flow rate on the growth of SiC thin-films for fiber-optic temperature sensors

We have investigated the effect of trimethylsilane ([(CH/sub 3/)/sub 3/SiH] or 3MS) flow rate on the growth of SiC thin-film on single-crystal sapphire substrate for fiber-optic temperature sensor. The SiC film thickness was in the range of 2-3 /spl mu/m. The variation of the 3MS flow rate affected the structural properties of the SiC films. This, in turn, changed the optical properties and temperature sensing performance of the sensors. Optical reflection from the SiC thin-film Fabry-Pe/spl acute/rot interferometers showed one-way phase shifts in resonant minima on all measured samples. Linear fits to the resonant minima (at 660 to 710 nm) versus temperature provide the corresponding thermal expansion coefficient, /spl kappa//sub /spl phi//, of 1.7-1.9/spl times/10/sup -5///spl deg/C. With the optimized 3MS flow rate, the SiC temperature sensor exhibits a temperature accuracy of /spl plusmn/2.8/spl deg/C from 22 to 540/spl deg/C. The short-term SiC sensor stability at 532/spl deg/C for two weeks shows a very small standard deviation of 0.97/spl deg/C.     

MEMS器件贴片工艺研究

贴片工艺是MEMS封装中的关键工艺。根据残余应力理论,应用有限元方法和试验技术研究了贴片胶杨氏模量和热膨胀系数对贴片应力和芯片翘曲的影响。结果表明:杨氏模量和热膨胀系数是影响贴片应力和芯片翘曲的重要因数。杨氏模量越大,贴片后产生的应力越大,引起芯片的翘曲越大,但杨氏模量大到一定数值后,应力不会再增大,反而对应力具有一定的隔离作用;热膨胀系数越大,贴片后产生的应力越小,引起芯片的翘曲越小,反之,引起芯片的翘曲越大。在满足粘接强度和工艺条件下,选用软胶有利于减小应力和芯片翘曲。     

Design of a temperature-stable RF MEM capacitor

This paper presents a novel temperature-compensated two-state microelectromechanical (MEM) capacitor. The principle to minimize temperature dependence is based on geometrical compensation and can be extended to other devices such as MEM varactors. The compensation structure eliminates the effect of intrinsic and thermal stress on device operation. This leads to a temperature-stable device without compromising the quality factor (Q) or the voltage behavior. The compensation structure increases the robustness of the devices, but does not require any modifications to the process. Measurement results verify that the OFF and ON capacitance change is less than 6% and the pull-in voltage is less than 5% when the temperature is varied from -30 to +70/spl deg/C.     

VHF single crystal silicon capacitive elliptic bulk-mode disk resonators-part II: implementation and characterization

This work, the second of two parts, reports on the implementation and characterization of high-quality factor (Q) side-supported single crystal silicon (SCS) disk resonators. The resonators are fabricated on SOI substrates using a HARPSS-based fabrication process and are 3 to 18 /spl mu/m thick. They consist of a single crystal silicon resonant disk structure and trench-refilled polysilicon drive and sense electrodes. The fabricated resonators have self-aligned, ultra-narrow capacitive gaps in the order of 100 nm. Quality factors of up to 46 000 in 100 mTorr vacuum and 26000 at atmospheric pressure are exhibited by 18 /spl mu/m thick SCS disk resonators of 30 /spl mu/m in diameter, operating in their elliptical bulk-mode at /spl sim/150 MHz. Motional resistance as low as 43.3 k/spl Omega/ was measured for an 18-/spl mu/m-thick resonator with 160 nm capacitive gaps at 149.3 MHz. The measured electrostatic frequency tuning of a 3-/spl mu/m-thick device with 120 nm capacitive gaps shows a tuning slope of -2.6 ppm/V. The temperature coefficient of frequency for this resonator is also measured to be -26 ppm//spl deg/C in the temperature range from 20 to 150/spl deg/C. The measurement results coincide with the electromechanical modeling presented in Part I.     

Fluidic packaging of microengine and microrocket devices for high-pressure and high-temperature operation

The fluidic packaging of Power MEMS devices such as the MIT microengine and microrocket requires the fabrication of hermetic seals capable of withstanding temperature in the range 20-600/spl deg/C and pressures in the range 100-300 atm. We describe an approach to such packaging by attaching Kovar metal tubes to a silicon device using glass seal technology. Failure due to fracture of the seals is a significant reliability concern in the baseline process: microscopy revealed a large number of voids in the glass, pre-cracks in the glass and silicon, and poor wetting of the glass to silicon. The effects of various processing and materials parameters on these phenomena were examined. A robust procedure, based on the use of metal-coated silicon substrates, was developed to ensure good wetting. The bending strength of single-tube specimens was determined at several temperatures. The dominant failure mode changed from fracture at room temperature to yielding of the glass and Kovar at 600/spl deg/C. The strength in tension at room temperature was analyzed using Weibull statistics; these results indicate a probability of survival of 0.99 at an operational pressure of 125 atm at room temperature for single tubes and a corresponding probability of 0.9 for a packaged device with 11 joints. The residual stresses were analyzed using the method of finite elements and recommendations for the improvement of packaging reliability are suggested.     

Cross-linked PMMA as a low-dimensional dielectric sacrificial layer

A surface nanomachining fabrication process using electron beam cross-linked poly(methyl) methacrylate (PMMA) has been developed and characterized. PMMA with different molecular weights (MW 100 K, MW 495 K, MW 950 K) in anisole casting solvent has been crosslinked with different electron beam irradiation levels ranging from 20 C/m/sup 2/ to 240 C/m/sup 2/. This is to investigate the quantifiable relationship between electron dose and its submicrometer remaining thickness after dissolving in acetone. This technique which uses electron beam lithography, offers a high resolution semi-three-dimensional (3-D) nanomachining of the sacrificial layer in a single run. Because of its low Young's modulus, it has been successfully integrated with nanoelectromechanical systems processing and has the advantage of producing low-stress submicrometer thick structures with lateral dimensions as low as, but not limited to 1 /spl mu/m. A fast dry release time from 55 to 100 s using oxygen plasma ashing has been demonstrated for a sacrificial layer aspect ratio of 125. This corresponds to an etch rate of about 0.6 /spl mu/m/s at an average temperature of 40/spl deg/C. The success of using cross-linked PMMA as a gate dielectric is demonstrated by the fabrication of multilayered gated lateral quantum dot devices. Periodic and continuous conductance oscillations arising from Coulomb charging effects are clearly observed in the transport properties at 50 mK.     

A comparative study on the failure resistance of thermal barrier coatings

A bi-material structure, representing a single layer thermal barrier coating, containing an interfacial crack and subjected to a cooling shock, is investigated using the finite element method. Numerical tests are performed to study the effect of material properties mismatch, between the coating and the substrate, on the failure resistance of the cracked structure, represented by the strain energy release rate. No special care is taken for taking into consideration the singular nature of near tip temperature and displacement fields. The parametric study is based on a quasi-static uncoupled thermo-elasticity assumption and a crack opening displacement formula for obtaining the strain energy release rate. The methodology that is followed has been validated in a previous article by comparison to an analytic solution. Computational results indicate that the strain energy release rate peak, experienced during the thermal shock, is highly dependent on the thermal conductivity and thermal expansion coefficient mismatch, but almost independent from the Young’s modulus mismatch between the two materials. It is concluded that, the failure resistance of the thermal barrier coating decreases, as the insulation provided by the coating and its thermal expansion coefficient increase in relation to the substrate.     

Polycrystalline silicon-germanium films for integrated microsystems

Two approaches were demonstrated for fabricating microstructures after completion of CMOS circuits with aluminum metallization. The first approach employed n-type poly-Ge deposited at 400/spl deg/C as a structural material with an SiO/sub 2/ sacrificial layer and an HF release. The CMOS circuits were protected from the release etchant with an amorphous Si layer. Clamped-clamped lateral resonator test structures had quality factors in vacuum as high as /spl sim/30000. Following a 500/spl deg/C, 30 s RTA the poly-Ge stress was 200 MPa (tensile) and the resistivity was 5.3 m/spl Omega/-cm. In the second integration approach, p-type poly-Si/sub 0.35/Ge/sub 0.65/ deposited at 450/spl deg/C was the structural material with poly-Ge as the sacrificial material and H/sub 2/O/sub 2/ as the release etchant. The H/sub 2/O/sub 2/ did not significantly etch the p-type poly-SiGe structural layer and no protection of the underlying CMOS layers was needed. For the first time, the fabrication of LPCVD surface microstructures directly on top of standard electronics was demonstrated, providing dramatic reductions in both MEMS-CMOS interconnect parasitics and device area. A folded flexure lateral resonator had a quality factor in vacuum as high as /spl sim/15000. No stress or dopant-activation anneal was needed, since the in situ boron-doped poly-SiGe was found to have an as-deposited stress of only -10 MPa (compressive) and a resistivity of only 1.8 m/spl Omega/-cm.     

Materials Selection and Design of Microelectrothermal Bimaterial Actuators

A common form of MEMS actuator is a thermally actuated bimaterial, which is easy to fabricate by surface micromachining and permits out of plane actuation, which is otherwise difficult to achieve. This paper presents an analytical framework for the design of such microelectrothermal bimaterial actuators. Mechanics relationships for a cantilever bimaterial strip subjected to a uniform temperature were applied to obtain expressions for performance metrics for the actuator, i.e., maximum work/volume, blocked (force) moment, and free-end (displacement) slope. Results from finite-element analysis and closed form relations agree well to within 1%. The optimal performance for a given pair of materials and the corresponding thickness ratio were determined. Contours of equal performance corresponding to commonly used substrates (e.g., Si, SiO₂) were plotted in the domain of governing material properties (thermal expansion coefficient and Young's modulus) to identify candidate materials for further development. These results and the accompanying methodology provide a rational basis for comparing the suitability of "standard" materials for microelectrothermal actuators, as well as identifying materials that might be suitable for further research     

Two-axis single-crystal silicon micromirror arrays

This work presents the design, fabrication, and testing of a two-axis 320 pixel micromirror array. The mirror platform is constructed entirely of single-crystal silicon (SCS) minimizing residual and thermal stresses. The 14-/spl mu/m-thick rectangular (750/spl times/800 /spl mu/m/sup 2/) silicon platform is coated with a 0.1-/spl mu/m-thick metallic (Au) reflector. The mirrors are actuated electrostatically with shaped parallel plate electrodes with 86 /spl mu/m gaps. Large area 320-mirror arrays with fabrication yields of 90% per array have been fabricated using a combination of bulk micromachining of SOI wafers, anodic bonding, deep reactive ion etching, and surface micromachining. Several type of micromirror devices have been fabricated with rectangular and triangular electrodes. Triangular electrode devices displayed stable operation within a (/spl plusmn/5/spl deg/, /spl plusmn/5/spl deg/) (mechanical) angular range with voltage drives as low as 60 V.     

Measurement of mechanical and thermal properties of co-sputtered WSi thin film for MEMS applications

In this study, mechanical and thermal properties of the co-sputtered tungsten silicide (WSi) thin film were evaluated to consider the possibility of its use in MEMS applications. WSi film was prepared by co-sputtering and basic micromachining processes, and its mechanical and thermal properties such as Young’s modulus, temperature coefficient of resistance (TCR), strain gauge factor, coefficient of thermal expansion (CTE) and thermal stress were studied. The measurement method was simple and efficient since only one test pattern was used for all measurements. At room temperature, the TCR, gauge factor, CTE and thermal stress were measured to be −670 ppm/°C, 2.8, 32 ppm/°C and 1.76 GPa, respectively. The dependence of these coefficients on temperature was also evaluated experimentally.     

A low-temperature thin-film electroplated metal vacuum package

This paper presents a packaging technology that employs an electroplated nickel film to vacuum seal a MEMS structure at the wafer level. The package is fabricated in a low-temperature (<250/spl deg/C) 3-mask process by electroplating a 40-/spl mu/m-thick nickel film over an 8-/spl mu/m sacrificial photoresist that is removed prior to package sealing. A large fluidic access port enables an 800/spl times/800 /spl mu/m package to be released in less than three hours. MEMS device release is performed after the formation of the first level package. The maximum fabrication temperature of 250/spl deg/C represents the lowest temperature ever reported for thin film packages (previous low /spl sim/400/spl deg/C). Implementation of electrical feedthroughs in this process requires no planarization. Several mechanisms, based upon localized melting and Pb/Sn solder bumping, for sealing low fluidic resistance feedthroughs have been investigated. This package has been fabricated with an integrated Pirani gauge to further characterize the different sealing technologies. These gauges have been used to establish the hermeticity of the different sealing technologies and have measured a sealing pressure of /spl sim/1.5 torr. Short-term (/spl sim/several weeks) reliability data is also presented.     

薄膜热膨胀系数测试技术研究

热膨胀系数是薄膜的重要热学性能参数,也是薄膜热应力和残余应力计算分析过程中的关键数据.文章基于热诱导弯曲原理,分别采用单基片法和双基片法对氮化钛(TiN)和铝(Al)薄膜的热膨胀系数进行测试,并着重对双基片法的测试误差和适用性进行了分析.研究结果表明,薄膜在不同材质基底上弹性模量的差异是影响双基片法薄膜热膨胀系数测试精度的重要因素.当不同材质基片上薄膜弹性模量差异较小时,双基片法测得的热膨胀系数与单基片法所获结果基本一致;而当不同材质基片上薄膜弹性模量相差较大时,双基片法将不再适用.此外,文章结合薄膜的形貌、结构和残余应力表征测试,对TiN和Al薄膜热膨胀系数与其块体材料的差异进行了分析,结果显示残余压应力会导致薄膜热膨胀系数增大,而残余拉应力则具有相反的效果.     

Magnetic and mechanical properties of micromachined strontiumferrite/polyimide composites

In this work, strontium ferrite/polyimide composite thin films are fabricated and characterized for micromachining applications. The application of these materials in microelectronics and micromachining dictates the use of different polymers than those previously used for conventional plastic magnets due to fabrication compatibility constraints. The material investigated here consists of magnetically anisotropic strontium ferrite particles suspended in a benzophenone tetracarboxylic dianhydride-oxydianiline/metaphenylene diamine polyimide matrix. Magnetic mechanical, and processability properties of these composites are investigated for a strontium ferrite loading range of 55%-80% by volume. Intrinsic coercivity H_ci residual magnetic flux density B_r and maximum energy product (BH)_max have been determined. For an 80% by-volume concentration loading of ferrite, H_ci of 318 kA/m B_r, approaching 0.3 T, and (BH)_max of 11900 T·A/m have been achieved. Biaxial Young's modulus and residual stress are determined using a slightly modified in situ load/deflection technique. The biaxial Young's modulus increases with increasing the magnetic powder loading. The materials have been deposited and patterned using two techniques: (1) screen-printing and (2) spin-casting, followed by photolithography. Finally, a simple magnetic microactuator made with those materials has been fabricated and tested, which demonstrates the usefulness of those materials to micromachining     

A microstructure for in situ determination of residual strain

This work presents a new strain sensor with a compact structure. The strain sensor comprises of a pair of cantilever beams with different lengths connected by a short tip. The residual strain causes two beams to deflect each other, thereby magnifying the deflection, which is measured by the tip. The displacement is independent of both Young's modulus and the film's thickness. An analytical model is derived to relate the measured displacement to residual strain. Finite-element modeling is also used to analyze the model. This work also thoroughly considers other factors that influence the designs and the implicit limitations of the strain sensors. Experimental results with an SiO₂ film as well as undoped LPCVD polysilicon films are used to demonstrate the effectiveness of the proposed structure     

New low-stress PECVD poly-SiGe Layers for MEMS

Thick poly-SiGe layers, deposited by plasma-enhanced chemical vapor deposition (PECVD), are very promising structural layers for use in microaccelerometers, microgyroscopes or for thin-film encapsulation, especially for applications where the thermal budget is limited. In this work it is shown for the first time that these layers are an attractive alternative to low-pressure CVD (LPCVD) poly-Si or poly-SiGe because of their high growth rate (100-200 nm/min) and low deposition temperature (520/spl deg/C-590/spl deg/C). The combination of both of these features is impossible to achieve with either LPCVD SiGe (2-30 nm/min growth rate) or LPCVD poly-Si (annealing temperature higher than 900/spl deg/C to achieve structural layer having low tensile stress). Additional advantages are that no nucleation layer is needed (deposition directly on SiO/sub 2/ is possible) and that the as-deposited layers are polycrystalline. No stress or dopant activation anneal of the structural layer is needed since in situ phosphorus doping gives an as-deposited tensile stress down to 20 MPa, and a resistivity of 10 m/spl Omega/-cm to 30 m/spl Omega/-cm. With in situ boron doping, resistivities down to 0.6 m/spl Omega/-cm are possible. The use of these films as an encapsulation layer above an accelerometer is shown.