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在DSP项目开发中,代码优化是非常重要的环节。本文针对TI公司C6000系列DSP处理芯片的结构特点,阐述了基于C6000硬件结构特点的C语言高效优化方法的原理,提出了展开复杂表达式以达到多指令并行的优化方法,并对其效果进行了对比分析。对语音增强算法项目中所用的一些实际的经验和技巧进行了概括和总结。 相似文献
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本文阐述了一种基于高速DSP器件的嵌入式多DSP系统的组成方法.简单描绘了系统的基本结构,并解释了关键性的程序引导问题与多机通讯问题。 相似文献
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邵永杰 《单片机与嵌入式系统应用》2021,21(5):29-30
随着软件无线电的发展,软件无线电平台的处理能力越来越强大、平台上实现的功能越来越多,平台的硬件结构也多种多样,各平台之间无法实现软硬件资源的共享,在实现通用数字中频的工作中,DSP程序的扩容需求逐步增大。针对上述问题,本文提供一种按需加载的DSP程序扩容方法,这种方法可以根据需要加载不同的DSP函数,相当于对DSP的内存进行了扩容。这种方法减少了加载时间,并且不必保证DSP程序的运行速度。本方法适用于TI公司、ADI公司以及目前国产化DSP,型号不限于TMS320C6713、TMS320C6416、TMS320C6455、TMS320C6678等。 相似文献
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随着1080P高清视频以及4K超高清晰视频的普及和应用,基于传统单核DSP处理器的视频信息处理已有些力不从心。为此TI公司推出了一款专门用于高清视频处理的多核DSP处理器,它拥有4个不同类型的处理器,使得视频处理达到了一个更高水平。本文分析研究了该处理器的多核DSP结构及应用开发方法,并对多核间的协调工作及负载情况进行了测试分析。 相似文献
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探讨了DSP在无刷直流电机中的应用,以及解决直流电动机在实际控制中的PWM波形产生问题。使用TI公司的2000系列DSP芯片,并简单介绍了芯片的结构和原理,设计了应用于三相无刷直流电机的PWM波形产生方法。 相似文献
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随着通信与信息技术的不断发展及数字产品的普及,DSP被越来越多地应用于各种数字系统中。美国德州仪器(TI)公司于20世纪90年代开发了能在其DSP产品上运行的实时操作系统内核DSP/BIOS,并提出一系列DSP软件实施方案来加速应用开发进程。 相似文献
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探讨了DSP在无刷直流电机中的应用,以及解决直流电动机在实际控制中的PWM波形产生问题。使用TI公司的2000系列DSP芯片,并简单介绍了芯片的结构和原理,设计了应用于三相无刷直流电机的PWM波形产生方法。 相似文献
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An everyday mobile phone contains two to four processors executing several hundred million instructions per second (MIPS) in closely coupled or networked configurations that implement the mobile modem as software on a single digital signal processor (DSP). The base stations controlling wireless and wireline communications systems are themselves a hierarchy of closely coupled systems with multiprocessor (typically DSP) subsystems executing billions of instructions per second. A complete base station can incorporate from five to 20 subsystems and 100 separate processors. These supersystems, incorporating possibly dozens of processors in closely coupled or networked topologies, pose a design challenge at least equal to that of designing the component systems and processors. Supersystem design and verification must address hardware complexity that increases with each successive generation of a product family, as well as embedded software content that increases exponentially with time. 相似文献
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These days, the once obscure engineering term “DSP” (digital signal processing) is working its way into common use. It has begun to crop up on the labels of an ever wider range of products, from home audio components to answering machines. This is not merely a reflection of a new marketing strategy, however; there truly is more digital signal processing inside today's products than ever before. But why is the market for DSP processors booming? The answer is somewhat circular: as microprocessor fabrication processes have become more sophisticated, the cost of a microprocessor capable of performing DSP tasks has dropped significantly to the point where such a processor can be used in consumer products and other cost sensitive systems. As a result, more and more products have begun using DSP processors, fueling demand for faster, smaller, cheaper, more energy-efficient chips. Although fundamentally related, DSP processors are significantly different from general purpose processors (GPPs) like the Intel Pentium or PowerPC. The authors explain what DSP processors are and what they do. They also offer a guide to evaluating DSP processors for use in a product or application 相似文献
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HPI的原理及其在DSP与单片机接口中的应用 总被引:5,自引:0,他引:5
主机接口(HPI)是TI公司数字信号处理器(DSP)中用于和主机(通常是微处理器)进行双向数据通信的8位并行接口。本文介绍了HPI的基本原理,并给出了数字信号处理器TMS320C5402和单片机MSP430X33X的硬件接口电路和软件编程。 相似文献
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Digital signal processors (DSPs) with very long instruction word (VLIW) data‐path architectures are increasingly being deployed on embedded devices for multimedia processing applications. To reduce the power consumption and design cost of VLIW DSP processors, distributed register files and multibank register architectures are being adopted to reduce the number of read and write ports associated with register files, which presents new challenges for devising compiler optimization schemes. This paper addresses the issues of reducing the spill code for a VLIW DSP with distributed register files. Spill code produced by register allocation is traditionally handled by memory spills, but the multibank register‐file architecture provides the opportunity to spill‐out register values onto different register banks. We present a conceptual framework based on the universal and the proxy interference graphs to model the live ranges of registers for spilling codes to different register banks. Heuristic algorithms are then developed on the basis of this concept. By heuristically estimating the register pressure for each register file, we treat different register banks as optional spilling locations in addition to traditional spilling to memory. Experiments were performed on the parallel architecture core VLIW DSP with distributed register files by incorporating our proposed optimization schemes into an Open64‐based compiler. The experimental results show that our approach can improve the performances on average for DSPStone and MiBench benchmarks with spilling cases by 7.1% and 21.6%, respectively, compared with the one always handling spill code in memory. Copyright © 2013 John Wiley & Sons, Ltd. 相似文献
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针对传统离散余弦变换的行列法中存在的并行性,提出了一个基于Omap5910平台的并行JPEG压缩算法.该算法利用JPEG图像压缩过程中的数据无关性将任务分配到Omap5910平台的两个处理器(ARM和DSP)上,并以多线程模拟多处理器对JPEG压缩过程中的关键步骤离散余弦变换进行并行处理.实验结果表明,该算法在保证与串行压缩算法具有相同的压缩质量的前提下,能够有效地提高JPEG压缩的速度. 相似文献
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为了克服单DSP码激励线性预测语音系统通用性差、双处理器系统(ARM和DSP)码激励线性预测语音设计成本高和硬件接口设计复杂及稳定性低等问题,提出使用单片S3c2410处理器芯片实现码激励线性预测语音系统;包括算法分析,系统硬件平台设计和系统软件设计.实验结果表明,在不降低系统语音性能的同时,采用单片S3c2410处理器,能够提高系统通用性和稳定性,降低设计的复杂性和成本. 相似文献
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为了提高基于PCI互连多处理器之间大量数据的有效传输,提出了一种针对PCI设备数据传输的驱动程序设计方法.首先描述了嵌入式处理平台由通用处理器PowerPC与数字信号处理器(DSP)组成,DSP处理器需要将处理的图像及视频等数据发送给PowerPC处理器,PowerPC负责事务性管理及远程网络传输,然后讨论了Linux操作系统下PCI数据传输驱动程序设计的关键技术,如DMA传输技术、零拷贝技术等.通过在PowerPC和DSP双处理器平台上进行编程测试,实验结果表明,采用该关键技术设计的PCI驱动程序明显提高了PowerPC与DSP之间的数据传输能力. 相似文献