Genetic algorithms for route discovery.

Packet routing in networks requires knowledge about available paths, which can be either acquired dynamically while the traffic is being forwarded, or statically (in advance) based on prior information of a network's topology. This paper describes an experimental investigation of path discovery using genetic algorithms (GAs). We start with the quality-of-service (QoS)-driven routing protocol called "cognitive packet network" (CPN), which uses smart packets (SPs) to dynamically select routes in a distributed autonomic manner based on a user's QoS requirements. We extend it by introducing a GA at the source routers, which modifies and filters the paths discovered by the CPN. The GA can combine the paths that were previously discovered to create new untested but valid source-to-destination paths, which are then selected on the basis of their "fitness." We present an implementation of this approach, where the GA runs in background mode so as not to overload the ingress routers. Measurements conducted on a network test bed indicate that when the background-traffic load of the network is light to medium, the GA can result in improved QoS. When the background-traffic load is high, it appears that the use of the GA may be detrimental to the QoS experienced by users as compared to CPN routing because the GA uses less timely state information in its decision making.     

高性能路由器中的并行包转发机机制研究

1 引言 Internet的快速发展对网络带宽的要求越来越高,由于光纤技术的进步,尤其是DWDM技术在骨干网络上的应用,光纤能够承载的容量也越来越大。然而,根据摩尔定律,计算能力的增加是每18个月增加一倍,因此,传统的路由器就逐渐成为网络的瓶颈。而且,多媒体以及实时通信技术对服务质量也提出了严格的要求,这又增加了路由器的开销。总之,对下     

基于LSOT的高速IP路由查找算法

由于因特网速度不断提高、网络流量不断增加、路由表规模不断扩大，IP路由查找已经成为制约路由器性能的重要原因，因而受到广泛重视。目前人们已经提出几种算法用于解决IP路由查找问题，但均不能完全满足核心路由器的要求。该文提出一种基于LSOT的IP路由查找方法，它使用可变大小段表和偏移量表，能适应SRAM和FPGA芯片内存储器容量的变化，具有查找速度高、更新时间快、存储代价低、易于实现等特点，使用FPGA设计能满足10Gbps端口速率核心路由器环境的要求，使用ASIC设计能满足40Gbps端口速率核心路由器环境的要求。     

Design and implementation of a random neural network routing engine

Random neural network (RNN) is an analytically tractable spiked neural network model that has been implemented in software for a wide range of applications for over a decade. This paper presents the hardware implementation of the RNN model. Recently, cognitive packet networks (CPN) is proposed as an alternative packet network architecture where there is no routing table, instead the RNN based reinforcement learning is used to route packets. Particularly, we describe implementation details for the RNN based routing engine of a CPN network processor chip: the smart packet processor (SPP). The SPP is a dual port device that stores, modifies, and interprets the defining characteristics of multiple RNN models. In addition to hardware design improvements over the software implementation such as the dual access memory, output calculation step, and reduced output calculation module, this paper introduces a major modification to the reinforcement learning algorithm used in the original CPN specification such that the number of weight terms are reduced from 2n/sup 2/ to 2n. This not only yields significant memory savings, but it also simplifies the calculations for the steady state probabilities (neuron outputs in RNN). Simulations have been conducted to confirm the proper functionality for the isolated SPP design as well as for the multiple SPP's in a networked environment.     

Controlling IP Spoofing through Interdomain Packet Filters

The distributed denial-of-service (DDoS) attack is a serious threat to the legitimate use of the Internet. Prevention mechanisms are thwarted by the ability of attackers to forge or spoof the source addresses in IP packets. By employing IP spoofing, attackers can evade detection and put a substantial burden on the destination network for policing attack packets. In this paper, we propose an interdomain packet filter (IDPF) architecture that can mitigate the level of IP spoofing on the Internet. A key feature of our scheme is that it does not require global routing information. IDPFs are constructed from the information implicit in border gateway protocol (BGP) route updates and are deployed in network border routers. We establish the conditions under which the IDPF framework correctly works in that it does not discard packets with valid source addresses. Based on extensive simulation studies, we show that, even with partial deployment on the Internet, IDPFs can proactively limit the spoofing capability of attackers. In addition, they can help localize the origin of an attack packet to a small number of candidate networks.     

Shared memory multiprocessor architectures for software IP routers

We propose new shared memory multiprocessor architectures and evaluate their performance for future Internet protocol (IP) routers based on symmetric multiprocessor (SMP) and cache coherent nonuniform memory access (CC-NUMA) paradigms. We also propose a benchmark application suite, RouterBench, which consists of four categories of applications representing key functions on the time-critical path of packet processing in routers. An execution driven simulation environment is created to evaluate SMP and CC-NUMA router architectures using this RouterBench. The execution driven simulation can produce accurate cycle-level execution time prediction and reveal the impact of various architectural parameters on the performance of routers. We port the FUNET trace and its routing table for use in our experiments. We find that the CC-NUMA architecture provides an excellent scalability for design of high-performance IP routers. Results also show that the CC-NUMA architecture can sustain good lookup performance, even at a high frequency of route updates.     

Edge-limited scalable QoS flow set-up

Although the Differentiated Services architecture supports scalable packet forwarding based on aggregate flows, the detailed procedure of Quality of Service (QoS) flow set-up within this architecture has not been well established. In this paper we explore the possibility of a scalable QoS flow set-up using a sink-tree paradigm. The paradigm initially constructs a sink tree at each egress edge router using network topology and bandwidth information provided by a QoS extended version of Open Shortest Path First (OSPF), which is a widely used link-state routing protocol. Our sink-tree paradigm dynamically reallocates network bandwidths online according to traffic demands. As a consequence, our paradigm easily supports QoS routing, resource allocation, and admission control at ingress edge routers without consulting core routers in a way that the QoS flow set-up time and overhead are minimized. Simulation results are very encouraging in that the proposed methodology requires significantly less communication overhead in setting up QoS flows compared to the traditional per-flow signaling-based methodology while still maintaining high resource utilization.     

Performance Analysis and Route Optimization: Redistribution between EIGRP,OSPF & BGP Routing Protocols

Routing is the process of data path selection of IP networks. Routers perform path selection on the basis of routing tables stored in their memory. Routing table contains IP routes for route transformation via the best path in the networks. Service providers use different routing protocols in their enterprise networks. These routing-protocols have the limitation of non-convergence in the networks. Route redistribution is the technique which overcomes this limitation. Due to this technique, service providers can get optimized communication with IP networks where multiple routing protocols are being used. This research article focuses on the performance and redistribution of different routing protocols in medium or enterprise IP networks. A simulated network model is established in GNS3 simulator. Five Cisco-7200 series routers and a switch is used in this simulated topology. All these routers are directly connected with each other via serial links. Routing protocols EIGRP, OSPF and BGP are used in this topology and then configured route redistribution on these routers. Different types of data traffic are generated and passed through the network in order to analyze network convergence, throughput and packet delay by the use of software wire shark network analyzer and debug command. EIGRP is better in convergence and through put whereas OSPF is better in packet delay.     

TCAM architecture for IP lookup using prefix properties

In modern IP routers, Internet protocol (IP) lookup forms a bottleneck in packet forwarding because the lookup speed cannot catch up with the increase in link bandwidth. Ternary content-addressable memories (TCAMs) have emerged as viable devices for designing high-throughput forwarding engines on routers. Called ternary because they store don't-care states in addition to 0s and 1s, TCAMs search the data (IP address) in a single clock cycle. Because of this property, TCAMs are particularly attractive for packet forwarding and classifications. Despite these advantages, large TCAM arrays have high power consumption and lack scalable design schemes, which limit their use. We propose a two-level pipelined architecture that reduces power consumption through memory compaction and the selective enablement of only a portion of the TCAM array. We also introduce the idea of prefix aggregation and prefix expansion to reduce the number of routing-table entries in TCAMs for IP lookup. We also discuss an efficient incremental update scheme for the routing of prefixes and provide empirical equations for estimating memory requirements and proportional power consumption for the proposed architecture.     

Optical packet switching with multiple path routing

The performance of packet-switching wavelength routed optical networks critically depends on packet contentions at the intermediate routers. This paper shows through simulations that deflection routing is an effective technique for packet-switching wavelength routed optical networks with irregular meshed topologies. It is shown that multiple path routing (MPR) as the deflection rule mitigates the blocking of packets substantially in cross-connected all-optical networks leading to a significant reduction in hardware volume and cost of all-optical IP routers. The effectiveness of the blocking reduction critically depends on the network topology, and meshed topologies with a high number of interconnections benefit of the largest gain from deflection routing.