计算机支持的协同设计研究

文中讨论了建立计算机支持的协同设计支撑平台的关键技术。在体系结构上提出一个三层的结构，其中ＣＳＣＷ支持层设计为公共的协作代理。对基于共享对象协作的协同设计建立了超媒体结构的信息模型。按照这种思想建立的原型系统能够支持在地理上分布的多个用户，通过异步和同步的协作方式完成协同的设计工作，在异步协作方式下，可支持多用户通过对共享对象的操作完成协作；在同步协作方式下，可支持多用户通过对共享对象的操作完成协     

一种面向IPSec VPN教学的实验系统的设计与实现

设计并实现了一种面向IPSec VPN教学的实验系统，通过采用虚拟设备等技术，实现了对教学实验的大规模支持，同时满足至少两百名实验者参与实验，通过采用ASP、COM组件和信息截取分析等技术，实现了对教学实验的交互式支持，人机接口友好。本教学实验系统使用简单、易于部署、完全支持多种形式的基于IPSec VPN的实验。     

Inventor iLogic设计自动化技巧及案例分享

Inventor iLogic模块提供了对设计自动化的支持。本文通过一些具体的案例，结合客户的实际需求，通过使用iLogic中提供的自动化函数、界面的支持以及良好的扩展性对设计实现自动化，从而使我们更方便的重用设计，提高效率。     

基于语义的数据网格服务

探讨一种基于Wrapper—Mediator结构的支持语义的数据网格服务机制。首先探讨这种机制的总体结构，包括利用基于本体的语义来封装各个异质数据源，并通过Mediator结构来实现对各种异质数据源的支持，以及通过OTX算法来实现虚拟数据源VDS来支持OGSA-DAI接口标准。然后讨论其数据访问机制，即扩展XML代数来支持基于语义的数据访问。最后介绍一种支持语义的网格通信机制及其通信原语。     

虚拟仪器技术及其应用

本文在简述了虚拟仪器的基本构成后，着重对虚拟仪器的硬件支持和软件支持作了介绍，对虚拟仪器的软件功能作了分析，并通过一个示例从一个侧面展示了虚拟仪器技术的应用前景。     

支持服务协作的工作流元模型和建模语言

当前支持Web服务的建模语言存在着复杂度高、互操作困难和缺乏对服务协作关系的有效支持等不足。结合面向服务工作流的服务协作需求，通过扩展工作流管理联盟的相关理论，定义了面向服务工作流的过程定义元模型，并建立了其形式化模型。通过扩展XPDL定义了一种互操作性好、支持服务协作的面向服务工作流建模语言（SoXPDL）。     

Macromedia Dreamweaver MX几大的新功能

1.广泛的代码库使用预置的代码库创建插入和更新表单、记录集导航页和用户认证页。通过用现场数据填充设计视图来测试布局。2.新服务器技术支持DreamweaverMX新增对构建ColdFusionMX、ASP.NET和PHP网站的支持，以及对开发ASP、JSP和传统ColdFusion应用程序的支持。3.XML和Web标准支持通过XML支持保持前沿领先优势，包括编辑、确认和导入纲要。轻易地自省ColdFusion、.NET和Java中基于XML的web服务。通过XHTML输出的默认创建及标准HTML到XHTML的简单转换，确保标准一致性。4.改进的级联样式表2(CSS2)支持使用Dreamwe…     

制造企业生产经营计划的决策支持

本文在对编制制造企业生产经营计划决策过程深入、具体分析的基础上，就产品决策支持的目标、功能、支持方式进行了充分的论述。通过对决策者与各决策支持子系统之间关系的分析以及这些关系的实现，提出了智能型产品决策支持系统的设计思想和方法。     

二次损失函数支持向量机性能的研究

通过比较二次损失函数支持向量机和标准支持向量机在模式识别问题上的表现，分析了二次损失函数支持向量机的性能．实验表明这两种支持向量机对平衡数据有相似的分类能力，但二次损失函数支持向量机的优化参数更小，支持向量更多；对不平衡数据，二次损失函数支持向量机的分类准确率随不平衡度的增加而急剧下降．研究同时表明基于RM界的梯度方法对某些数据无效．文中定性分析了导致上述各种现象的原因．最后提出了一种利用黄金分割原理缩减二次损失函数支持向量机支持向量的方法，该方法冗余的支持向量数不超过一个．     

基于继承的子类型机制

本文扼要介绍继承的一个数学模型，在此基础上，通过对各种继承的形式刻划，研究了各种继承对子类型机制的影响，结果表明，单继承和图式继承支持强类型，线性继承不支持强类型。     

Multiprocessor validation of the Pentium Pro

In the past, multiprocessor systems have taken a year longer than uniprocessor systems to introduce because of the need to develop and validate the additional functionality required for multiprocessor systems. Manufacturers, however, don't want to wait this long to release products using the latest multiprocessor systems. Our challenge in designing Intel's newest microprocessor, the Pentium Pro processor, was to eliminate the lag time. We wanted to accomplish this by introducing systems where the multiprocessor functionality was already an integral part of the main processor and the chipset. Specifically, we wanted to introduce the uniprocessor and the multiprocessor systems at the same time. We thus had to make sure even before first silicon that the multiprocessor system would work. In the past, multiprocessor system validation has generally taken place after first silicon, because the external logic has usually been developed after the processor functionality integrated into the processor and chipset. Intel developed an extensive test methodology for functional and performance validation     

A Mean Value Analysis Multiprocessor Model Incorporating Superscalar Processors and Latency Tolerating Techniques

Several approximate Mean Value Analysis (MVA) shared memory multiprocessor models have been developed and used to evaluate a number of system architectures. In recent years, the use of superscalar processors, multilevel cache hierarchies, and latency tolerating techniques has significantly increased the complexity of multiprocessor system modeling. We present an analytical performance model which extends previous multiprocessor MVA models by incorporating these new features and in addition, increases the level of modeling detail to improve flexibility and accuracy. The extensions required to analyze the impact of these new features are described in detail. We then use the model to demonstrate some of the tradeoffs involved in designing modern multiprocessors, including the impact of highly superscalar architectures on the scalability of multiprocessor systems.     

Minimum and maximum utilization bounds for multiprocessor rate monotonic scheduling

The utilization bound for real-time rate monotonic (RM) scheduling on uniprocessors is extended to multiprocessors with partitioning-based scheduling. This allows fast schedulability tests to be performed on multiprocessors and quantifies the influence of key parameters, such as the number of processors and task sizes on the schedulability of the system. The multiprocessor utilization bound is a function of the allocation algorithm, so among all the allocation algorithms there exists at least one allocation algorithm providing the minimum multiprocessor utilization bound, and one allocation algorithm providing the maximum multiprocessor utilization bound. We prove that the multiprocessor utilization bound associated with the allocation heuristic worst fit (WF) coincides with that minimum if we use Liu and Layland's bound (LLB) as the uniprocessor schedulability condition. In addition, we present a class of allocation algorithms sharing the same multiprocessor utilization bound which coincides with the aforementioned maximum using LLB. The heuristics first fit decreasing (FFD) and best fit decreasing (BFD) belong to this class. Thus, not even an optimal allocation algorithm can guarantee a higher multiprocessor utilization bound than that of FFD and BFD using LLB. Finally, the pessimism of the multiprocessor utilization bounds is estimated through extensive simulations.     

Performance of local search heuristics on scheduling a class of pipelined multiprocessor tasks

This paper presents the evaluation of the solution quality of heuristic algorithms developed for scheduling multiprocessor tasks for a class of multiprocessor architectures designed to exploit temporal and spatial parallelism simultaneously. More specifically, we deal with multi-level or partitionable architectures where MIMD parallelism and multiprogramming support are the two main characteristics of the system. We investigate scheduling a number of pipelined multiprocessor tasks with arbitrary processing times and arbitrary processor requirements in this system. The scheduling problem consists of two interrelated sub-problems, which are finding a sequence of pipelined multiprocessor tasks on a processor and finding a proper mapping of tasks to the processors that are already being sequenced. For the solution of the second problem, various techniques are available. However, the problem remains of generating a feasible sequence for the pipelined operations. We employed three well-known local search heuristic algorithms that are known to be robust methods applicable to various optimization problems. These are Simulated Annealing, Tabu Search, and Genetic Algorithms. We then conduct computational experiments and evaluate the reduction achieved in completion time by each heuristic. We have also compared the results with well-known simple list-based heuristics.     

Power-aware scheduling for makespan and flow

We consider offline scheduling algorithms that incorporate speed scaling to address the bicriteria problem of minimizing energy consumption and a scheduling metric. For makespan, we give a linear-time algorithm to compute all non-dominated solutions for the general uniprocessor problem and a fast arbitrarily-good approximation for multiprocessor problems when every job requires the same amount of work. We also show that the multiprocessor problem becomes NP-hard when jobs can require different amounts of work. For total flow, we show that the optimal flow corresponding to a particular energy budget cannot be exactly computed on a machine supporting exact real arithmetic, including the extraction of roots. This hardness result holds even when scheduling equal-work jobs on a uniprocessor. We do, however, extend previous work by Pruhs et al. to give an arbitrarily-good approximation for scheduling equal-work jobs on a multiprocessor.     

Task management in Ada—A critical evaluation for real-time multiprocessors

As the cost of processor hardware declines multiprocessor architectures become increasingly cost-effective and represent an important area for future research. In order to exploit the full potential of multiprocessors, however, it is necessary to understand how to design software which can make effective use of the available parallelism. This paper considers the impact of multiprocessor architecture on the design of high-level programming languages and, in particular, evaluates the language Ada in the light of the special requirements of realtime multiprocessor systems. We conclude that Ada does not, as currently designed, meet the needs for real-time embedded systems.     

Hierarchical Scheduling for Symmetric Multiprocessors

Hierarchical scheduling has been proposed as a scheduling technique to achieve aggregate resource partitioning among related groups of threads and applications in uniprocessor and packet scheduling environments. Existing hierarchical schedulers are not easily extensible to multiprocessor environments because 1) they do not incorporate the inherent parallelism of a multiprocessor system while resource partitioning and 2) they can result in unbounded unfairness or starvation if applied to a multiprocessor system in a naive manner. In this paper, we present hierarchical multiprocessor scheduling (H-SMP), a novel hierarchical CPU scheduling algorithm designed for a symmetric multiprocessor (SMP) platform. The novelty of this algorithm lies in its combination of space and time multiplexing to achieve the desired bandwidth partition among the nodes of the hierarchical scheduling tree. This algorithm is also characterized by its ability to incorporate existing proportional-share algorithms as auxiliary schedulers to achieve efficient hierarchical CPU partitioning. In addition, we present a generalized weight feasibility constraint that specifies the limit on the achievable CPU bandwidth partitioning in a multiprocessor hierarchical framework and propose a hierarchical weight readjustment algorithm designed to transparently satisfy this feasibility constraint. We evaluate the properties of H-SMP using hierarchical surplus fair scheduling (H-SFS), an instantiation of H-SMP that employs surplus fair scheduling (SFS) as an auxiliary algorithm. This evaluation is carried out through a simulation study that shows that H-SFS provides better fairness properties in multiprocessor environments as compared to existing algorithms and their naive extensions.     

Virtual-address caches.2. Multiprocessor issues

In this two-part survey, we discussed the problems and possible solutions caused by virtual address caches in single-processor systems. In this paper, we continue to explore these topics in the context of multiprocessor systems. Processors may access their cache directly using virtual addresses. We discuss the inherent problems and possible solutions in this approach for multiprocessor systems     

A platform-based design framework for joint SW/HW multiprocessor systems design

We present P-Ware, a framework for joint software and hardware modelling and synthesis of multiprocessor embedded systems. The framework consists of (1) component-based annotated transaction-level models for joint modelling of parallel software and multiprocessor hardware, and (2) exploration-driven methodology for joint software and hardware synthesis. The methodology has the advantage of combining real-time requirements of software with efficient optimization of hardware performance. We describe and apply the methodology to synthesize a scheduler of a H264 video encoder on the Cake multiprocessor. Moreover, experiments show that the framework is scalable while achieving rapid and efficient designs.     

Multiprocessor scheduling by generalized extremal optimization

We propose a solution of the multiprocessor scheduling problem based on applying a relatively new metaheuristic technique, called Generalized Extremal Optimization (GEO). GEO is inspired by a simple coevolutionary model known as the Bak–Sneppen model. The model describes an ecosystem consisting of N species. Evolution in this model is driven by a process in which the weakest species in the ecosystem, together with its nearest neighbors, is always forced to mutate. This process shows the characteristics of a phenomenon called punctuated equilibrium, which is observed in evolutionary biology. We interpret the multiprocessor scheduling problem in terms of the Bak–Sneppen model and apply the GEO algorithm to solve the problem. We show that the proposed optimization technique is simple and yet outperforms genetic algorithm-based and swarm algorithm-based approaches to the multiprocessor scheduling problem.