软件系统体系结构的结构剖析

软件体系结构是对软件系统结构的描述 ,而软件系统展示了多种结构 ,文章介绍了某些常用的软件结构 ,如模块结构、概念结构、进程结构、使用结构、物理结构、调用结构等等 ,并且对这些结构间的相互关系作了概要阐述。     

移动IP的实现结构

本文介绍了通信代理和自行建立两种实现结构。通信代理结构在传统实现结构的基础上增加了通信代理,比较好的解决了传统结构在寻径上的弊端。自行代理结构不仅解决了传统的寻径问题,同时也解决了防火墙的截收数据问题。     

数学领域集体词结构形式化处理研究

根据数学领域自然语言理解的特点，结合集合论的思想深入分析了集体词结构。集体词结构是表示一个可数的集体概念，其外延是一个事物类。集体词结构较好地解决了数学领域中的数量词结构的形式化处理问题。首先给出了集体词结构的语义认知基础，并采用基于知识的方法，应用本体论思想，构造了系统的集体词结构模型。然后对集体词结构的群体关系进行分类和介绍。这种集体词结构的处理方法在数学领域智能辅导领域中得到了较好的应用。     

浅析编写计算机程序的三种结构

介绍了程序顺序执行的概念,分析了程序的顺序结构、选择结构和重复结构等三种结构,为编写程序提供了良好的帮助。     

基于Web的化学结构搜索法的研究

设计了在数据库中化学结构的存储方式,并在系统分析化学结构在计算机中的不同描述法的基础上,提出了一种基于Web的化学结构搜索法。该方法由Robot抓取Web文档中的化学结构信息,利用Oracle建立化学结构数据库,通过建立化学结构的索引,实现对化学结构的全结构、子结构、结构相似性检索。     

短语结构树库向句式结构树库的自动转换研究

该文从短语结构和句式结构的区别与联系入手,设计了一种将短语结构自动转换为句式结构的算法。并以清华短语结构树库(TCT)为测试语料,实现了将大规模短语结构语料向句式结构语料的转换。最后,搭建了一套可扩展的可视化系统,用于不同句法结构语料的可视化查看。这一研究不仅实现了两种结构之间的初步转换,而且极大地丰富了汉语句本位图解树库的语料规模,并为汉语句本位图解树库的后续应用研究奠定了基础。     

C语言中函数的结构比较

针对C语言中函数间的结构比较问题,描述了通过分解函数的结构得到函数的结构字符串表示的方法,给出了两个函数的结构串间公共串的计算方法,定义了函数间的结构相似度,有助于函数根据结构进行分类。     

数学领域集体词结构形式化处理研究

根据数学领域自然语言理解的特点,结合集合论的思想深入分析了集体词结构。集体词结构是表示一个可数的集体概念,其外延是一个事物类。集体词结构较好地解决了数学领域中的数量词结构的形式化处理问题。首先给出了集体词结构的语义认知基础,并采用基于知识的方法,应用本体论思想,构造了系统的集体词结构模型。然后对集体词结构的群体关系进行分类和介绍。这种集体词结构的处理方法在数学领域智能辅导领域中得到了较好的应用。     

基于角色的Agent组织结构演化机制①

Agent组织结构的演化是组织演化问题中的一个重要方面。针对Agent组织结构演化问题,以角色为核心描述了组织结构的整体构建,形式化表达了组织结构的内部特性。并以此为基础,提出了基于角色的Agent组织结构演化机制,即分别从角色目标集合扩大、角色目标集合缩减以及角色关系变更三种变化形式对组织结构演化过程进行了分析,为形成适应性和动态性的组织结构提供了借鉴。     

PDM系统中产品结构树的开发研究

产品配置管理通过产品结构树对产品对象及其相互之间的联系进行维护和管理,因此产品结构树是产品配置管理的基础。论文首先讨论了产品结构的分解方法,介绍了产品结构的配置过程,其次分析了产品结构树的实现和BOM表的自动化生成,最后给出了产品结构树的一个实际应用案例。     

并行程序设计语言中局部性机制的研究

大规模并行应用程序的性能优化和并行化的关键瓶颈之一在于多核CPU中越来越深和越来越复杂的存储层次。文中系统地分析和总结了当前主要多核CPU和并行程序设计语言中的局部性设计方法,提出了两种局部性,即横向局部性和纵向局部性,从这两种局部性的视角深入分析了当前的主要并行程序设计语言的局部性设计机制,进一步总结对比了其优缺点,并指出了新一代并行程序设计语言应具有的特点,重点提出了新语言应同时综合考虑两种局部性支持的设计机制的研究观点。     

Translating submachine locality into locality of reference

In this work, we show that the submachine locality exposed by hierarchical bulk-synchronous computations can be efficiently turned into locality of reference on arbitrarily deep hierarchies. Specifically, we develop efficient schemes to simulate parallel programs written for the Decomposable BSP (a BSP variant which features a hierarchical decomposition into submachines) on the sequential Hierarchical Memory Model (HMM), which rewards the exploitation of temporal locality, and on its extension with block transfer, the BT model, which also rewards the exploitation of spatial locality. The simulations yield good hierarchy-conscious sequential algorithms from parallel ones, and provide evidence of the strict relation between submachine locality in parallel computation and locality of reference in the hierarchical memory setting. We also devise a generalization of the HMM result to the self-simulation of D-BSP augmented with hierarchical memory modules, which yields an interesting analog of Brent's lemma, thus proving that the enhanced model features a seamless integration of memory and network hierarchies.     

Improving Performance of Dynamic Programming via Parallelism and Locality on Multicore Architectures

Dynamic programming (DP) is a popular technique which is used to solve combinatorial search and optimization problems. This paper focuses on one type of DP, which is called nonserial polyadic dynamic programming (NPDP). Owing to the nonuniform data dependencies of NPDP, it is difficult to exploit either parallelism or locality. Worse still, the emerging multi/many-core architectures with small on-chip memory make these issues more challenging. In this paper, we address the challenges of exploiting the fine grain parallelism and locality of NPDP on multicore architectures. We describe a latency-tolerant model and a percolation technique for programming on multicore architectures. On an algorithmic level, both parallelism and locality do benefit from a specific data dependence transformation of NPDP. Next, we propose a parallel pipelining algorithm by decomposing computation operators and percolating data through a memory hierarchy to create just-in-time locality. In order to predict the execution time, we formulate an analytical performance model of the parallel algorithm. The parallel pipelining algorithm achieves not only high scalability on the 160-core IBM Cyclops64, but portable performance as well, across the 8-core Sun Niagara and quad-cores Intel Clovertown.     

Modeling Communication Locality in Multiprocessors

Locality of reference is an important aspect of many computer operations. It is often exploited to optimize the performance of computer functions. In this paper, we apply the locality concept to the communication patterns of parallel programs operating over an interconnection network with a fixed communication latency between any pair of attached nodes. Unbuffered multistage networks and all-optical networks are examples of these. We quantify the notions of spatial and temporal locality in this context, and combine them in a locality measure. This measure is used as the basis for identifying the communication working sets of a parallel program. We focus on programs with a looping structure and investigate conditions under which each working set consists of the complete set of paths required by a single loop.     

一类基于迭代空间条块的并行有限差分Stencil 算法

高效的并行有限差分Stencil 算法对于求解大型线性方程组是十分重要的.针对并行有限差分Stencil 算法中数据局部性差、同步和通信开销大的问题.首先改进传统有限差分Stencil 算法,提出了多层对称遍历有限差分Stencil 算法.然后给出了以迭代空间条块序作为执行序的串行算法,通过沿时间轴对迭代空间进行时滞划分,在不改变迭代算法性质的同时,对迭代空间条块内部多次迭代计算,提高算法的数据局部性.最后提出一种基于迭代空间条块的并行算法,该算法利用改进的多面体模型对迭代空间网格划分,并通过网格条块重排序减少了Cache 缺失率、通信启动和同步次数.理论分析和实验结果表明,该并行模型比传统的区域分解方法和红黑排序并行算法具有更好的数据局部性,并行效率和可扩展性.     

Cacheminer: A runtime approach to exploit cache locality on SMP

Exploiting cache locality of parallel programs at runtime is a complementary approach to a compiler optimization. This is particularly important for those applications with dynamic memory access patterns. We propose a memory-layout oriented technique to exploit cache locality of parallel loops at runtime on Symmetric Multiprocessor (SMP) systems. Guided by application-dependent and targeted architecture-dependent hints, our system, called Cacheminer, reorganizes and partitions a parallel loop using the memory-access space of its execution. Through effective runtime transformations, our system maximizes the data reuse in each partitioned data region assigned in a cache, and minimizes the data sharing among the partitioned data regions assigned to all caches. The executions of tasks in the partitions are scheduled in an adaptive and locality-presented way to minimize the execution time of programs by trading off load balance and locality. We have implemented the Cacheminer runtime library on two commercial SMP servers and an SimCS simulated SMP. Our simulation and measurement results show that our runtime approach can achieve comparable performance with the compiler optimizations for programs with regular computation and memory-access patterns, whose load balance and cache locality can be well optimized by the tiling and other program transformations. However, our experimental results show that our approach is able to significantly improve the memory performance for the applications with irregular computation and dynamic memory access patterns. These types of programs are usually hard to optimize by static compiler optimizations     

Locality-preserving hash functions for general purpose parallel computation

Consider the problem of efficiently simulating the shared-memory parallel random access machine (PRAM) model on massively parallel architectures with physically distributed memory. To prevent network congestion and memory bank contention, it may be advantageous to hash the shared memory address space. The decision on whether or not to use hashing depends on (1) the communication latency in the network and (2) the locality of memory accesses in the algorithm.We relate this decision directly to algorithmic issues by studying the complexity of hashing in the Block PRAM model of Aggarwal, Chandra, and Snir, a shared-memory model of parallel computation which accounts for communication locality. For this model, we exhibit a universal family of hash functions having optimal locality. The complexity of applying these hash functions to the shared address space of the Block PRAM (i.e., by permuting data elements) is asymptotically equivalent to the complexity of performing a square matrix transpose, and this result is best possible for all pairwise independent universal hash families. These complexity bounds provide theoretical evidence that hashing and randomized routing need not destroy communication locality, addressing an open question of Valiant.This work was started when the author was a student at Oxford University, supported by a National Science Foundation Graduate Fellowship and a Rhodes Scholarship. Any opinions, findings, conclusions, or recommendations expressed in this publication are those of the author and do not necessarily reflect the views of the National Science Foundation or the Rhodes Trust.     

迭代空间交错条块并行Gauss-Seidel算法

针对并行GS(Gauss-Seidel)迭代算法中数据局部性差、同步和通信开销大的问题,首先改进传统GS迭代,提出了多层对称GS迭代算法.然后给出了以迭代空间条块序作为执行序的串行执行模型.该模型通过对迭代空间进行"时滞"划分,对迭代空间条块内部多次迭代计算,提高算法的数据局部性.最后提出一种基于迭代空间条块的并行执行模型.该模型改进了迭代空间网格划分,并通过网格条块重排序减少了cache缺失率、通信启动和同步次数.实验结果表明,迭代空间交错条块并行算法比传统的区域分解方法和红黑排序并行算法具有更好的并行效率和可扩展性.     

基于横向局部性的多核计算模型

片内多核已成为延长摩尔定律的方式,并行算法设计、编程模型、编译器和运行时系统都需要利用计算模型进行分析。现有多核模型对线程间共享缓存等资源的竞争已有较精确的模型,但是对于线程间数据共享考虑较少。提出线程间共享缓存的横向局部性和任务共享率概念,基于此扩展串行存储层次模型RAM(h),提出考虑任务共享率的多核并行计算模型MRAM(h)。     

Efficient compiler and run-time support for parallel irregular reductions

Many scientific applications are comprised of irregular reductions on large data sets. In shared-memory parallel programs, these irregular reductions are typically computed in parallel using replicated buffers, then combined using synchronization. We develop L W , a new technique which partitions irregular reductions so that each processor computes values only for locally assigned data, eliminating the need for buffers or synchronized writes. Computation is replicated if its results are needed on multiple processors. We experimentally evaluate its performance for three irregular codes on a software DSM running on a distributed-memory multiprocessor and two shared-memory multiprocessors while varying connectivity, locality, and adaptivity. Results show L W improves performance significantly compared to using replicated buffers, and can match or exceed explicit message-passing gather/scatter for applications with low locality or high adaptivity.