CAT1161在单片机系统中的应用

在以单片机为核心的应用系统中，为提高系统的可靠性及稳定性，对复拉电路、电源监控电路提出了较高的要求．同时为防止因外界干扰而出现的死机现象，一般配有看门狗定时器．有的系统需要存储功能，如数字调谐器、彩色电视机．普通的RC复位电路简单，价格低廉，但可靠性不高，一般不采用．如果复位电路、电源监控电路、看门狗定时器、存储器用多片芯片实现，则系统成本增加、体积加大．为解决以上问题．Catalyst公司生产了集上述功能于一体的CAT1161芯片．CAT1161为基于微控制器的系统提供了一个完整的存储和监控方案，并运用低功耗CMOS技术，在片内集成了带硬件写保护的串行EBPROM（16K位）、复位电路，节能型系统电源监控电路和一个看门狗定时器。由于存储器采用I^2C总线，与单片机系统连接仅占用2个IO口，使用十分方便．下面介绍CAT1161各部分的功能及应用．     

有复位端的三端固定稳压IC——ZV12R

ZV12R是一种新型三端固定稳压电路,其特点是比普通三端稳压电路增设了一个复位端,用户可以利用这个复位端控制输出电压的有和无,用电子开关等简单电路即可实现对于复位端的控制,从而方便了电路设计,简化了电路。 ZV12R采用4脚单列直插封装,如图1所示。应用电路如图2所示,图中4脚为复位     

一种高可靠性的复位电路

介绍了复位电路的一些基本功能和一些常见的复位电路。提出了单片UP监控芯片MAX706在系统复位电路中的应用方法。介绍了在80kV绝缘油测试仪中应用的高可靠性复位电路。     

单片微机系统的复位及自动复位

单片微机系统的复位及自动复位重庆大学金吉成，田逢春１引言通常人们对微机中的复位电路没有引起足够的重视，直接根据手册中给出典型电路来设计，但由于各自应用系统的差异而导致系统工作不可靠，有时能工作，有时需多次手动复位后才能工作，复位电路设计得不完善是一个...     

分布式测控仪器远端复位电路

<正>分布式系统的一个重要问题是如何实现主机控制下的前端机复位,从而实现完全的主机控制.下面给出的两种电路便能在不改变串行口功能条件下,用串口实现主机控制下的前端机复位.其原理和电路介绍如下:电路一,其结构如图1示,在电路中以U1实现对串行通信信号的反相,R1,C1及U2实现对前端机的复位信号的检出,D1完成对C1的快速放电.工作原理如下:正常工作时串口作主机和前端机通信用,因设置的波特率较高(>1200),即使在发00的最坏情况下,C1 上充得的电压始终超不过门限值,因此,该复位电路不产生复位信号.当需要对前端机复位时,     

采用独立复位信号的同步时序电路可测试性设计

针对同步时序电路提出一种结合了插入可观测点的部分复位方法，该方法是基于迭代计算的电路状态信息和冲突分析测度而提出的．根据基于电路状态信息的测度和冲突分析所选择出来的部分复位触发器，可以割断电路中的关键回路，使得电路容易被初始化．同时减少在时序ATPG中的潜在冲突．以前的部分复位方法中，部分复位的触发器不能由独立的复位信号所控制，这也是不能彻底改善可测试性的一个重要原因．当部分复位触发器可以由独立的复位信号所控制时，电路的可测试性会显著提高．该文提出了一种新的可测试性结构来设计部分复位触发器，该方法同时减小了在管脚、延时和面积的开销。     

跨界计划

快捷操作1按住R＋A键可令对话快进；2同时按下L＋R＋START可令游戏快速复位；3复位时按住START键可以跳过标题界面直接读取中断存档；     

抗闩锁效应微处理器复位电路设计研究

主要探究解决控制系统在频繁通断电情况下容易死机的问题。通过对传统微处理器复位电路的理论分析和工作波形仿真,发现在电源掉电时,微处理器在其复位引脚受到外部复位电容的放电冲击时,容易进入闩锁状态。由此提出上电复位电路也是容易导致CMOS电路进入闩锁的外部触发条件之一,并在此基础上设计了一种新型抗闩锁复位电路,能够自动检测电源掉电,导通泄流回路,使复位电容避开复位引脚放电。仿真分析和样机测试验证了其抗闩锁功能的有效性。     

一种SoC时钟复位管理电路设计与验证

提出一种适用于片上系统的时钟与复位管理电路，并搭建验证平台予以验证。该设计集成复位信号生成电路、复位同步释放电路、基准电压源、压控振荡器、锁相环、时钟门控电路等。数字电路设计基于180 nm标准单元库搭建，基于System Verilog语言搭建了一个功能完备的自动化测试平台，代码覆盖率与功能覆盖率达到100%。相比传统设计，该电路所有单元均在内部，集成度高、可靠性强。     

MAX6303电路在抗恶劣环境计算机系统中的应用

介绍了以MAX6303组成的时间控制电路，该电路主要应用于抗恶劣环境计算机系 统中，在低温状态控制计算机复位预热达到升温效果。     

Influence of wall charge distribution on time lag of address discharge in AC plasma display panels

The influence of wall charge distribution on the time lag of address discharge in an AC plasma display panel is investigated using two different reset waveforms: one (typical reset) induces both face and surface discharges and the other (TR reset) induces face discharges only. The measured formative time lag and statistical time lag of address discharge for TR were 21–31 ns and 31–74 ns shorter than the one for the typical reset, respectively. The TR reset resulted in much less increase of statistical time lag than the typical reset when the reset-to-address time interval was increased, and 70 ns smaller deviation of the statistical time lag among different color cells. Calculations show that the TR reset forms a much smoother wall charge profile, which is less susceptible to cell parameter variations, than the typical reset. The observed differences in the time lags of address discharge between different scan lines and color cells are strongly correlated to the differences of the wall charge profile, indicating that a smooth wall charge profile formed by the reset using face discharges only reduces the time lag of address discharge and minimizes the susceptibility of address discharge to cell parameter variation.     

Reset law design based on robust model predictive strategy for uncertain systems

In a continuous time control system, if some of the controller states are reset, certain limitations on the system response can be removed. Moreover, the stability and performance of such a reset control system may be improved. Resetting action has two main characteristics which should be determined: (a) when the controller states are reset and (b) how the after reset values of the controller states are determined. By defining a reset set, when the system states enter this set, the instants for the controller states reset, can be determined. This paper addresses the second question on how to determine the after reset values. In order to design a reset law for real time applications, a model predictive strategy is proposed that specifies the after reset values by minimizing a quadratic performance index. The quadratic minimization problem is converted to a LMI formulation and the reset law is determined by solving this LMI optimization problem at certain reset times. This approach is applied to a typical CSTR system to demonstrate the effectiveness of the proposed method for industrial process control application.     

Reset machines

A reset tape has one read-write head which moves only left-to-right except that the head can be reset once to the left end and the tape rescanned; a multiple-reset machine has reset tapes as auxiliary storage and a one-way input tape. Linear time is no more powerful than real time for nondeterministic multiple-reset machines and so the family MULTI-RESET of languages accepted in real time by nondeterministic multiple-reset machines is closed under linear erasing. MULTI-RESET is closed under Kleene. It can be characterized as the smallest family of languages containing the regular sets and closed under intersection and linear-erasing homomorphic duplication or as the smallest intersection-closed semiAFL containing $\text{COPY}\text{= {ww | w}\text{in}\text{{a, b}1}}$. A circular tape is read full-sweep from left-to-right only and then reset to the left, any number of times; a nonwriting circular tape cannot be altered after the first sweep. For nondeterministic machines operating in real time, multiple reset tapes, circular tapes or nonwriting circular tapes have the same power. Languages in MULTI-RESET can be accepted in real time by nondeterministic machines using only three reset tapes or using only one reset tape and one nonwriting circular tape.     

广义最小方差自校正重置PID控制器及其在压力系统中的应用研究

针对压力系统的纯延迟、大惯性、非线性、时变等特点,本文将重置控制和以广义最小方差为性能指标的自校正PID控制相结合,提出一种广义最小方差自校正重置PID控制方法。该方法首先根据被控对象的数学模型,以广义最小方差为目标设计广义最小方差控制器,通过选择该控制器的分母多项式,求解Diophantine方程,得到具有PID结构形式的广义最小方差控制器,再在该控制器的积分项中引入重置控制,构成广义最小方差重置PID控制;对于模型未知或参数慢时变的被控对象,通过采用带遗忘因子的递推最小二乘法构建系统的自适应机制,增强控制系统的自适应能力和鲁棒性。最后,将该控制方法应用于压力容器的恒值控制中,获得了比较满意的控制效果。     

A Reset‐Time Dependent Approach for Stability Analysis of Nonlinear Reset Control Systems

A reset mechanism in controller can affect the stability property of a closed loop control system. In a simple word, there are stable reset control systems with unstable base‐systems and also unstable reset systems with stable base‐systems. The Lyapunov stability theory is a strong tool to investigate the stability of a nonlinear system. In this paper, based on the well‐known Lyapunov stability concept, some stability conditions for nonlinear reset control systems are addressed. These conditions are dependent on the reset‐times and hence the reset‐time intervals are explicitly emerged in the stability conditions. Some applications of these results are used in numerical examples to show the effectiveness of the proposed approach.     

节电设计中掉电状态MCU的复位唤醒速度

针对采用掉电方式进行MCU节电设计时能否用硬件复位实现快速唤醒,分析讨论了上电复位、运行复位和掉电复位等三类复位方式的一些区别和特点,得出了掉电复位唤醒所需时间远小于上电复位、复位信号应维持多宽方能快速唤醒MCU、以及采用片外时钟可使复位唤醒速度最快等结论。     

一种FPGA+多DSP系统复位信号的设计方法

针对FPGA和多DSP系统中各部分所需的复位信号需满足相应的复位时间和正确次序的要求,在介绍了两种传统复位信号产生方法的基础上,提出了一种利用外部器件TPS3307产生原始复位信号,并在FPGA中构建逻辑硬件看门狗,采用异步复位、同步释放的方式复位多DSP的设计方法。给出部分关键设计的源程序,并在一片Xilinx公司的FPGA(XC2V1000)芯片与4片ADI公司的DSP(TS201)组成的系统中进行了验证,结果表明该设计方法能提高系统稳定性和可靠性。     

Performance improvement by optimal reset dynamic output feedback control based on model predictive strategy

This paper proposes a systematic approach for designing a reset dynamic output feedback controller (DOFC). The reset controller is designed in three steps. First, the D-stability approach is used to design the gain matrices of the DOFC for the base system such that the poles of the closed-loop system are placed in a predefined region. This region is chosen based on the control objectives. Moreover, the sufficient conditions for existence of base controller are formulated in terms of linear matrix inequalities. Second, the reset times are derived by applying genetic algorithm to minimize a novel cost function of certain transient performances. Third, an optimization problem based on model prediction strategy is solved for finding the after reset value at each reset time. The proposed method is applied to two different systems: continuous stirred tank reactor and distillation column. The effectiveness of the proposed reset controller is shown by comparing the results with other approaches.     

Stability analysis and design of reset systems: Theory and an application

This paper investigates stability analysis and design of reset control systems where the reset time instants are pre-specified. Firstly, in order to quantify stability of reset control systems, we propose an approach which does not rely on the stability of base linear systems. Based on this, some Lie-algebraic conditions for stability of reset control systems are obtained. Then, we develop a method for reset law design which aims at improving transient responses of the base linear systems. In addition, observer-based design is also considered. We prove that under some mild conditions, reset controller and observer can be designed separately. The obtained results are applied to short-span-seeking control of a kind of single stage hard disk drive servo systems. Simulations show that the proposed design is much more capable of improving transient response than traditional control design techniques.     

实时在线嵌入式系统复位设计

实时在线嵌入式系统要求业务不间断、并便于在线诊断与维护。目前嵌入式设备的复位大多是通过看门狗全局复位,业务模块与管理模块复位耦合,无法实现在线诊断,可维护性差,不能满足实时在线系统的要求。针对这种情况,在分析实时在线嵌入式设备的电路特点和复位设计要求的基础上,提出了支持多源复位,具备临终遗言、复位原因监测、快速启动等功能,且业务处理与设备管理分离的新型复位方案。测试表明,该方案可保障业务持续或中断时间最短,并具备较好的可靠性和可维护性。