基于分片后备存储的WebKit嵌入式浏览器渲染优化研究

嵌入式浏览器越来越成为嵌入式系统上最重要的系统软件,随着HTML5的发展,对嵌入式浏览器性能的要求越来越高.通过对WebKit嵌入式浏览器渲染流程的研究,提出一种针对WebKit的基于分片后备存储的WebKit嵌入式浏览器渲染优化算法.该方法使用分片的后备存储优化渲染、缓存页面的可见区域,将Web页面的渲染区域精确到小的区域上,减少了不必要的区域的重新绘制,对于计算资源有限的嵌入式设备,大大减少了Web页面渲染的时间.实验表明,该方法有效地提高了嵌入式浏览器的页面渲染速度,提升了用户体验.     

维吾尔文网页研究及Android维文浏览器的实现

通过二次修改WebKit内核来定制浏览器功能是当前嵌入式应用开发的热点。在研究Android平台浏览器引擎WebKit的基础上,综合分析多款浏览器在访问维吾尔文网站时出现的显示问题,找出访问维文网页时显示异常的原因。最后根据维吾尔文文字特点进行研究、设计维文浏览器架构,提出在应用层开发维文网页渲染引擎,实现Android平台的维吾尔文浏览器。     

基于Elastos的WebKit引擎的研究与移植

在嵌入式系统中,使用WebKit作为其显示层内核可以降低程序人员的编程难度和提高程序的运行效率.文中的目的是将WebKit移植到Elastos嵌入式系统中,使其可以作为Elastos操作系统中浏览器的引擎.所采用的方法是利用CAR构件技术,完成WebKit在Elastos上的接El的定义,并将Weber所依赖的图形库与Elastos图形库进行衔接.通过对WebKit的移植,最终结果是可以在Elastos系统上提供一个基于WebKit引擎的浏览器.结论是浏览器可以正确地运行在Pc机上并准确的显示相关网页.     

基于WebKit内核的焦点查询策略研究与优化

为解决智能电视平台上带内联框架的网页存在焦点查询不友好的问题,对基于WebKit内核的嵌入式浏览器焦点查询策略进行研究,详细说明该策略对焦点查询的执行过程,并针对带内联框架的网页存在的焦点查询不友好问题进行查询算法的优化。在智能电视平台上根据操控特征进行针对性优化,修正了焦点查询错误,大大提升了用户体验。实验结果表明,使用优化后的焦点查询策略在智能电视上可有效解决基于WebKit内核的嵌入式浏览器焦点查询错误问题。     

WebKit引擎一统江山,网络将成另一个App Store

作为独立浏览器中硕果仅存的代表之一,Opera也踏上了变革之路。很快,Opera就将弃用其自主渲染的Presto引擎,改用WebKit引擎。时下人气最旺的GoogleChrome浏览器以及苹果的Safari浏览器采用的也是WebKit引擎。而在移动端最流行的浏览器——iPhone和iPad上的移动版Safari,以及安卓系统的默认浏览器,同样基于WebKit技术。换句话说,WebKit已经悄无声息的完成了浏览器领域的"大一统"。可以毫不夸张的说,WebKit在这场战役中已经大获全胜。     

基于WebKit的一种渲染改进方法

移动浏览器是移动互联网产业界关键的竞争之地。在分析WebKit浏览器引擎的页面解析、渲染过程和方法的基础上,提出一种针对WebKit渲染机制的改进方法。该方法依据浏览局部性原理,改变对页面元素的渲染顺序,优先渲染ViewPort范围内的页面元素。这对于硬件有限的移动终端,大大减少了用户浏览复杂页面时的等待时间。实验表明,该方法有效地提高了移动终端Web页面显示速度,改善了用户体验。     

双核浏览器漫谈

历史 随着Google Chrome浏览器攻城略地,市场份额逐步提升,其使用的WebKit网页渲染引擎也逐渐步入开发者的视野。在国内越来越多的第三方浏览器厂商开始尝试使用WebKit渲染引擎,并结合中国的具体国情（网银插件使用ActiveX,     

基于WebKit的嵌入式浏览器关键技术研究与实现

随着嵌入式设备的大量普及,具有自主知识产权嵌入式浏览器的研究也逐步深入.通过对WebKit的基本框架的分析,研究了其关键技术,并针对特定的硬件平台进行了移植和裁剪,实验表明该研究为自主知识产权浏览器的开发提供了重要的参考价值.     

基于WebKit的嵌入式浏览器关键技术研究与实现

随着嵌入式设备的大量普及,具有自主知识产权嵌入式浏览器的研究也逐步深入。通过对WebKit的基本框架的分析,研究了其关键技术,并针对特定的硬件平台进行了移植和裁剪,实验表明该研究为自主知识产权浏览器的开发提供了重要的参考价值。     

WebKi t内核的嵌入式浏览器磁盘缓存方法

为提高嵌入式浏览器的页面加载速度,研究WebKit网络资源下载的流程,分析 HTTP协议栈中缓存控制原理,提出一种WebKit内核的嵌入式浏览器磁盘缓存方法。设计磁盘缓存快速映射算法,在网络资源的URL与数据之间建立映射关系。为防止磁盘缓存存储空间过载,结合LRU‐K算法和缓存资源的优先级给出磁盘缓存置换算法,提出了磁盘缓存系统架构及其实现方案,在家庭网络环境中进行性能评估。实验结果表明,浏览器加载速度提升了3?19倍,增强了用户体验。     

基于MDA思想的嵌入式机电控制器设计框架

嵌入式机电控制器的硬件耦合关系复杂，软件受制于运行环境和开发环境，由此导致该类系统的可移植性和可重用性较差。该文针对软硬件约束，基于MDA思想提出了一种电动车控制器设计框架。该设计框架中的软硬件划分模块和各模块的功能定义使得此类嵌入式应用系统可以顺利地在不同硬件平台和软件开发环境之间进行移植并根据用户需求定制。在该设计框架的指导下，在EM78P458、P87LPC768、ATMega8L 3种硬件平台上实现了控制器系统的移植。     

An architecture for Java-based real-time distributed visualization

In this paper, we present a Java-based software architecture for real-time visualization that utilizes a cluster of conventional PCs to generate high-quality interactive graphics. Normally, a large multiprocessor computer would be needed for interactive visualization tasks requiring more processing power than a single PC can provide. By using clusters of PCs, enormous cost savings can be realized, and proprietary "high-end" hardware is no longer necessary for these tasks. Our architecture minimizes the amount of synchronization needed between PCs, resulting in excellent scalability. It provides a modular framework that can accommodate a wide variety of rendering algorithms and data formats, provided that the rendering algorithms can generate pixels individually and the data is duplicated on each PC. Demonstration modules that implement ray tracing, fractal rendering, and volume rendering algorithms were developed to evaluate the architecture. Results are encouraging-using 15 PCs connected to a standard 100 Megabit/s Ethernet network, the system can interactively render simple to moderately complex data sets at modest resolution. Excellent scalability is achieved; however, our tests were limited to a cluster of 15 PCs. Results also demonstrate that Java is a viable platform for real-time distributed visualization.     

How many system architectures?

Developers often call an embedded system's hardware architecture a platform. The idea is that you select a hardware platform, then write software to fit onto it. Matters are, however, more complicated. The platform provides the computing resources required to run the embedded application, and the decisions about what hardware should go into the platform often depend on what sort of software you want to run. It is predicted that constant pressure on the cost and power consumption of embedded systems will continue to spawn a diversity of uniprocessor and multiprocessor platforms.     

基于COM的嵌入式系统通用硬件抽象层框架设计

随着嵌入式系统的飞速发展,各种嵌入式处理器以及片上系统（Systemon Chip,SoC）应用于各种设备,从传感器、手机、PDA等到笔记本电脑。嵌入式系统的广泛应用促进了嵌入式软件,特别是嵌入式操作系统的发展,但嵌入式系统硬件体系结构的多样性又给嵌入式软件、嵌入式操作系统的开发、维护带来了极大的不便。文中针对硬件平台依赖性制约嵌入式操作系统发展问题,提出了一种应用COM技术开发的硬件抽象层设计,实现嵌入式操作系统跨硬件平台移植。     

The MainStreetXpress 36190: a scalable and highly reliable ATM core services switch

This paper describes the architecture and some of the main features of the MainStreetXpress 36190 ATM core services switch. This switch has been designed from the start as a fully functional, central office class ATM switch which can be used already today to create the backbone layer for commercial ATM-based multi-service networks. Due to its modular hardware and software architecture, it provides the required flexibility with respect to interface requirements, signalling/control capabilities and service support. The architecture together with the ATM chip set specifically developed for this switch allows to extend the data throughput of the MainStreetXpress 36190 from 5 Gbit/s into the Tbit/s range by just scaling the central switch fabric. The call processing capability can be scaled well into the MBHCA range (Million Busy Hour Call Attempts) by taking advantage of the specifically developed multi-processor control platform. Full redundancy for all central hardware components and optional redundancy for interface boards and external transmission lines is provided. In combination with a comprehensive hardware/software maintenance and recovery concept based on the vast experience with the EWSD line of digital switches these capabilities provide the reliability and availability required for large ATM carrier networks. Together with the full line of MainStreetXpress components – ranging from network terminations and LAN service units via flexible access multiplexers/switches to scalable ATM multi-service switches and a variety of specific server types all controlled by a common network and service management – the MainStreetXpress 36190 provides carriers with the means to realize fully functional, cost effective ATM based multi-service platforms already today.     

A Multithreaded Message Passing Interface (MPI) Architecture: Performance and Program Issues

This paper discusses a multithreaded software architecture for message-passing interface (MPI) software specification. The architecture is thread-safe, allows for concurrent communication over several communications media (multifabric communication), efficiently utilizes available hardware concurrency over a wide range of target platforms, and allows for concurrent communication and computation within the limits imposed by the hardware. The architecture is developed in the framework of the MPICH software architecture, a well-known MPI implementation used worldwide. The proposed architecture adopts wide portability of the MPICH design and remedies some of its deficiencies such as inefficient multifabric communication and non-thread-safety. The paper also considers the issues concerning development of high-performance portable message-passing systems for general-purpose architectures. The contributions of the paper are improving architecture and addressing thread safety of modern reliable messaging software, as well as identifying and taking advantage of inherent concurrency in the message-passing software itself.     

Embedding of a real time image stabilization algorithm on a parameterizable SoPC architecture a chip multi-processor approach

Highly regular multi-processor architectures are suitable for inherently highly parallelizable applications such as most of the image processing domain. Systems embedded in a single programmable chip platform (SoPC) allow hardware designers to tailor every aspect of the architecture in order to match the specific application needs. These platforms are now large enough to embed an increasing number of cores, allowing implementation of a multi-processor architecture with an embedded communication network. In this paper we present the parallelization and the embedding of a real time image stabilization algorithm on a SoPC platform. Our overall hardware implementation method is based upon meeting algorithm processing power requirements and communication needs with refinement of a generic parallel architecture model. Actual implementation is done by the choice and parameterization of readily available reconfigurable hardware modules and customizable commercially available IPs (Intellectual Property). We present both software and hardware implementation with performance results on a Xilinx SoPC target.     

An order of magnitude faster isosurface rendering in software on aPC than using dedicated, general purpose rendering hardware

The purpose of this work is to compare the speed of isosurface rendering in software with that using dedicated hardware. Input data consist of 10 different objects from various parts of the body and various modalities (CT, MR, and MRA) with a variety of surface sizes (up to 1 million voxels/2 million triangles) and shapes. The software rendering technique consists of a particular method of voxel-based surface rendering, called shell rendering. The hardware method is OpenGL-based and uses the surfaces constructed from our implementation of the Marching Cubes algorithm. The hardware environment consists of a variety of platforms, including a Sun Ultra I with a Creator3D graphics card and a Silicon Graphics Reality Engine II, both with polygon rendering hardware, and a 300 MHz Pentium PC. The results indicate that the software method (shell rendering) was 18 to 31 times faster than any hardware rendering methods. This work demonstrates that a software implementation of a particular rendering algorithm (shell rendering) can outperform dedicated hardware. We conclude that, for medical surface visualization, expensive dedicated hardware engines are not required. More importantly, available software algorithms (shell rendering) on a 300 MHz Pentium PC outperform the speed of rendering via hardware engines by a factor of 18 to 31     

Interactive texture-based volume rendering for large data sets

To employ direct volume rendering, TRex uses parallel graphics hardware, software-based compositing, and high-performance I/O to provide near-interactive display rates for time-varying, terabyte-sized data sets. We present a scalable, pipelined approach for rendering data sets too large for a single graphics card. To do so, we take advantage of multiple hardware rendering units and parallel software compositing. The goals of TRex, our system for interactive volume rendering of large data sets, are to provide near-interactive display rates for time-varying, terabyte-sized uniformly sampled data sets and provide a low-latency platform for volume visualization in immersive environments. We consider 5 frames per second (fps) to be near-interactive rates for normal viewing environments and immersive environments to have a lower bound frame rate of l0 fps. Using TRex for virtual reality environments requires low latency - around 50 ms per frame or 100 ms per view update or stereo pair. To achieve lower latency renderings, we either render smaller portions of the volume on more graphics pipes or subsample the volume to render fewer samples per frame by each graphics pipe. Unstructured data sets must be resampled to appropriately leverage the 3D texture volume rendering method