多核CPU和GPU加速分子动力学模拟

在多核中央处理器(CPU)—图形处理器(GPU)异构并行体系结构上,采用OpenMP和计算统一设备架构(CUDA)编程实现了基于AMBER力场的蛋白质分子动力学模拟程序。通过合理地将程序划分为CPU单线程、CPU多线程和GPU多线程执行部分,高效地利用了计算机的处理能力。性能测试结果表明,相对于优化后的CPU串行计算,多核CPU-GPU异构并行计算模型有强大的性能优势,特别是将占整个程序执行时间90%的作用力的计算移植到GPU上执行,获得了最高可达12倍的计算加速比。     

异构平台下格子Boltzmann方法实现及性能分析

对CPU+GPU异构平台下的多种并行编程模式进行了研究,并针对格子Boltzmann方法实现了CUDA,MPI+CUDA,MPI+OpenMP+CUDA多级并行算法。结果表明,算法具有较好的加速性能;提出的根据计算量比例参数调节CPU和GPU之间负载均衡的方法,对于在异构平台上实现多级并行处理及资源的有效利用具有一定的参考和应用价值。     

蚁群算法的三种并行模型分析

在单机多核下分别构造基于OpenMP和MPI的并行蚁群算法模型,在多核集群机下构造基于MPI和MPI+OpenMP的并行蚁群算法模型,并提出动态蚁群择优策略及分段周期交流策略。基于实际路网的路径寻优问题对上述模型进行比较,实验结果表明,在单机多核下,基于MPI的模型与基于OpenMP的模型相比,运行时间短,加速比高,在多核集群机下,基于MPI+OpenMP的混合模型相比基于MPI的模型,在进程数较多时仍具有较高的加速比。     

TBB多核编程及其混合编程模型的研究

多核处理器越来越普及,如何通过软件技术最大提升CPU每个核心的使用率,成为热点问题.引入多核并行编程模型Threading Building Blocks,并与raw threads、OpenMP进行各方面详细比较,分析了其优劣.并研究了TBB结合MPI在SMP集群系统上实现高效的混合并行计算应用的方法.最终发现TBB在多核编程方面有显著的优势.TTB和MPI的结合,又为多核处理器结点集群提供了并行层次化结构,大大优化集群的性能.     

基于GPU的H.264并行解码算法

针对并行处理H.264标准视频流解码问题,提出基于CPU/GPU的协同运算算法。以统一设备计算架构(CUDA)语言作为GPU编程模型,实现DCT逆变换与帧内预测在GPU中的加速运算。在保持较高计算精度的前提下,结合CUDA混合编程,提高系统的计算性能。利用NIVIDIA提供的CUDA语言,在解码过程中使DCT逆变换和帧内预测在GPU上并行实现,将并行算法与CPU单机实现进行比较,并用不同数量的视频流验证并行解码算法的加速效果。实验结果表明,该算法可大幅提高视频流的编解码效率,比CPU单机的平均计算加速比提高10倍。     

基于CPU与GPU的异构模板计算优化研究

模板计算是一类使用固定模板的算法，被广泛应用于图像处理、计算流体动力学模拟等领域，现有的模板计算存在计算并行度弱、缓存命中率低、无法充分利用计算资源等问题。在消息传递接口（MPI）计算模型和跨平台多线程（OpenMP)计算模型的基础上提出MPI+OpenMP、统一计算设备架构（CUDA）+OpenMP两种混合计算模型。相较于常规的MPI计算模型，MPI+OpenMP计算模型通过使用MPI进行多节点之间的粗粒度通信，使用OpenMP实现进程内部的细粒度并行计算，并结合单指令多数据、非一致内存访问、数据预取、数据分块等技术，提高模板计算过程中的缓存命中率与计算并行能力，加快计算速度。在只采用CUDA进行模板计算时，CPU的计算资源没有得到充分利用，浪费了大量计算资源，CUDA+OpenMP计算模型通过对计算任务的负载划分让CPU也参与到计算中，以减少通信开销及充分利用CPU的多核并行计算能力。实验结果表明，OpenMP+MPI计算模型相较于MPI计算模型的平均加速比为3.67,CUDA+OpenMP计算模型相较于CUDA计算模型的平均加速比为1.26,OpenMP+MPI和CUDA+Ope...     

一种基于Hadoop+CUDA实现相关器的方法

根据21CMA相关器的算法特点,在对比基于CPU并行的MPI集群、MPI+CUDA异构并行集群和Hadoop+CUDA异构并行集群的架构特点的基础上,提出了一种基于Hadoop+CUDA平台实现软相关器的方法。本方法利用GPU在计算FFT、向量乘和向量加等密集型计算模型的优势,设计相关器的并行模型,使其性能较前期在CPU并行的MPI集群实现的相关器有了大幅提升。同时,本文选择广泛应用于大数据处理平台的Hadoop软件架构,利用Hadoop Streaming工具实现非Java编写的程序在分布式系统中并行执行,非常便捷地获得了集群系统的线性加速比。Hadoop HDFS并行文件系统管理结果数据和过程日志更加灵活可靠,为后续的大数据分析提供了支撑环境。     

基于SMP集群的MPI+CUDA模型的研究与实现

为了研究GPU的通用计算能力和适合SMP集群的编程模型,首次提出MPI+CUDA多粒度混合并行编程的新方法,节点间采用MPI实现粗粒度并行,节点内采用CUDA实现细粒度并行的混合编程方式.利用此方法在搭建的3节点SMP集群环境中,测试了大规模矩阵乘问题的并行计算能力.实验结果表明,该方法能够显著提升并行效率,同时证明MPI+CUDA混合编程模型能够充分发挥SMP集群节点间分布式存储和节点内共享内存的优势,为装有CUDA-enabled GPU的SMP集群提供了一种有效的并行策略.     

LBM算法在GPU组中的应用

为提高大规模并行计算的并行效率,充分发挥CPU与GPU的功能特点,特别是体现GPU强大的运算能力,提出了用消息传递接口(MPI)将一组GPU连接起来。使GPU通用计算与计算流体力学中的LBM(latticeBoltzmannmethod)算法相结合。根据GPU通用计算与LBM算法的原理,使MPI作为计算分配的机制,CUDA(compute unified device architecture)作为主要的计算执行引擎,建立支持CUDA的GPU集群,在集群上对LBM算法中的D2Q9模型进行二维方腔流数值模拟。实验结果表明,利用GPU组模拟与CPU模拟结果一致,更充分发挥了GPU的计算能力,提高了并行效率。     

MPI+OpenMP混合并行编程模型应用研究

多处理器结点集群在高性能计算市场上日趋流行,如何在多处理器上编写出高效的并行代码成为研究的热点。MPI+OpenMP为多处理器结点集群提供了一种有效的并行策略,结点内部共享内存空间编程模式适合 OpenMP并行,消息传递模型MPI被用在集群的结点与结点之间,这样就实现了并行的层次结构化。     

CPU+GPU海量信息集群高速显示技术

针对集群显示系统中存在的CPU多核闲置、GPU利用不足、CPU与GPU结合困难等问题,研究了CPU多核多线程处理、GPU并行处理及CPU+GPU整合运算等技术,提出并构建了CPU+GPU集群并行显示系统,提升了集群并行显示系统的综合运算能力,实验结果表明CPU+GPU集群并行显示技术是有效的,为海量信息高速显示提供了有效的解决方案。     

Autonomic Coordination of Skeleton-Based Applications Over CPU/GPU Multi-Core Architectures

Widely adumbrated as patterns of parallel computation and communication, algorithmic skeletons introduce a viable solution for efficiently programming modern heterogeneous multi-core architectures equipped not only with traditional multi-core CPUs, but also with one or more programmable Graphics Processing Units (GPUs). By systematically applying algorithmic skeletons to address complex programming tasks, it is arguably possible to separate the coordination from the computation in a parallel program, and therefore subdivide a complex program into building blocks (modules, skids, or components) that can be independently created and then used in different systems to drive multiple functionalities. By exploiting such systematic division, it is feasible to automate coordination by addressing extra-functional and non-functional features such as application performance, portability, and resource utilisation from the component level in heterogeneous multi-core architectures. In this paper, we introduce a novel approach to exploit the inherent features of skeleton-based applications in order to automatically coordinate them over heterogeneous (CPU/GPU) multi-core architectures and improve their performance. Our systematic evaluation demonstrates up to one order of magnitude speed-up on heterogeneous multi-core architectures.     

流式缩减技术在GPU上的研究与应用

随着GPU通用计算技术应用的不断深入,如何把某些并行计算任务从传统的CPU平台向GPU平台转移,把串行编程模型向并行的流式编程模型转变等,已经成为了研究的热点.讨论了基于GPU的流式编程模型,探讨了基于流式编程模型的GPU与CPU编程之间的差别与联系,最后描述了一种在GPU上的流式缩减操作算法的设计与实现.为把图形处理器应用在通用计算领域提供参考和帮助.     

Algorithm level power efficiency optimization for CPU-GPU processing element in data intensive SIMD/SPMD computing

Power efficiency investigation has been required in each level of a High Performance Computing (HPC) system because of the increasing computation demands of scientific and engineering applications. Focusing on handling the critical design constraints in the software level that run beyond a parallel system composed of huge numbers of power-hungry components, we optimize HPC program design in order to achieve the best possible power performance on the target hardware platform. The power performance of a CUDA Processing Element (PE) is determined by both hardware factors including power features of each component including with CPU, GPU, main memory and PCI buses, and their interconnection architecture; and software factors including algorithm design and the character of executable instructions performed on it. In this paper, approaches to model and evaluate the power consumption of large scale SIMD computation by CUDA PEs on multi-core and GPU platforms are introduced. The model allows obtaining design characteristic values at the early programming stage, thus benefitting programmers by providing the necessary environment information for choosing the best power-efficient alternative. Based on the model, CPU Dynamic frequency scaling (DFS) can be applied on CUDA PE architecture that adjusts CPU frequency to enhance power efficiency of the entire PE without compromising its computing performance. The power model and power efficiency improvements of the new designs have been validated by measuring the new programs on the real GPU multiprocessing system.     

在集群多核CPU环境下的等高线并行提取方法

分析集群环境下分布式存储编程模型和多核CPU环境下共享存储编程模型各自的优缺点,采用结合集群和多核CPU的并行环境来取长补短;并研究其在等高线提取中的相关并行算法,其中以建立三角网和跟踪等高线作为共享存储并行的研究实例;最后通过实验验证了该并行方案的可行性。     

基于GPU平台的二维离散余弦算法

本文介绍了GPU并行计算的优越性,并对基于GPU平台的开发框架和编程环境CUDA给予概述;在CUDA环境中开发DCT算法代码,实现了DCT算法代码从CPU平台向GPU平台的移植;并通过对比两个计算平台上DCT算法的计算耗时,分析了GPU计算平台的优越性。     

MPtostream:an OpenMP compiler for CPU-GPU heterogeneous parallel systems

In light of GPUs’ powerful floating-point operation capacity,heterogeneous parallel systems incorporating general purpose CPUs and GPUs have become a highlight in the research field of high performance computing(HPC).However,due to the complexity of programming on GPUs,porting a large number of existing scientific computing applications to the heterogeneous parallel systems remains a big challenge.The OpenMP programming interface is widely adopted on multi-core CPUs in the field of scientific computing.To effectively inherit existing OpenMP applications and reduce the transplant cost,we extend OpenMP with a group of compiler directives,which explicitly divide tasks among the CPU and the GPU,and map time-consuming computing fragments to run on the GPU,thus dramatically simplifying the transplantation.We have designed and implemented MPtoStream,a compiler of the extended OpenMP for AMD’s stream processing GPUs.Our experimental results show that programming with the extended directives deviates from programming with OpenMP by less than 11% modification and achieves significant speedup ranging from 3.1 to 17.3 on a heterogeneous system,incorporating an Intel Xeon E5405 CPU and an AMD FireStream 9250 GPU,over the execution on the Xeon CPU alone.     

Parallel sparse linear solver with GMRES method using minimization techniques of communications for GPU clusters

In this paper, we aim at exploiting the power computing of a graphics processing unit (GPU) cluster for solving large sparse linear systems. We implement the parallel algorithm of the generalized minimal residual iterative method using the Compute Unified Device Architecture programming language and the MPI parallel environment. The experiments show that a GPU cluster is more efficient than a CPU cluster. In order to optimize the performances, we use a compressed storage format for the sparse vectors and the hypergraph partitioning. These solutions improve the spatial and temporal localization of the shared data between the computing nodes of the GPU cluster.     

并行时空处理模型下的快速N-body算法

图形处理器(graphic processing unit,GPU)的最新发展已经能够以低廉的成本提供高性能的通用计算。基于GPU的CUDA(compute unified device architecture)和OpenCL(open computing language)编程模型为程序员提供了充足的类似于C语言的应用程序接口(application programming interface,API),便于程序员发挥GPU的并行计算能力。采用图形硬件进行加速计算,通过一种新的GPU处理模型——并行时间空间模型,对现有GPU上的N-body实现进行了分析,从而提出了一种新的GPU上快速仿真N-body问题的算法,并在AMD的HD Radeon 5850上进行了实现。实验结果表明,相对于CPU上的实现,获得了400倍左右的加速;相对于已有GPU上的实现,也获得了2至5倍的加速。